xref: /qemu/tcg/ppc/tcg-target-con-str.h (revision 33956e476802a6ae9b9a8e047f6a78e09e9ae180)
1  /* SPDX-License-Identifier: MIT */
2  /*
3   * Define PowerPC target-specific operand constraints.
4   * Copyright (c) 2021 Linaro
5   */
6  
7  /*
8   * Define constraint letters for register sets:
9   * REGS(letter, register_mask)
10   */
11  REGS('r', ALL_GENERAL_REGS)
12  REGS('o', ALL_GENERAL_REGS & 0xAAAAAAAAu)  /* odd registers */
13  REGS('v', ALL_VECTOR_REGS)
14  
15  /*
16   * Define constraint letters for constants:
17   * CONST(letter, TCG_CT_CONST_* bit set)
18   */
19  CONST('C', TCG_CT_CONST_CMP)
20  CONST('I', TCG_CT_CONST_S16)
21  CONST('M', TCG_CT_CONST_MONE)
22  CONST('T', TCG_CT_CONST_S32)
23  CONST('U', TCG_CT_CONST_U32)
24  CONST('W', TCG_CT_CONST_WSZ)
25  CONST('Z', TCG_CT_CONST_ZERO)
26