xref: /qemu/tcg/i386/tcg-target.h (revision 66896cb803b4865c0c35b218dbc407e1fcf7f7f7)
1c896fe29Sbellard /*
2c896fe29Sbellard  * Tiny Code Generator for QEMU
3c896fe29Sbellard  *
4c896fe29Sbellard  * Copyright (c) 2008 Fabrice Bellard
5c896fe29Sbellard  *
6c896fe29Sbellard  * Permission is hereby granted, free of charge, to any person obtaining a copy
7c896fe29Sbellard  * of this software and associated documentation files (the "Software"), to deal
8c896fe29Sbellard  * in the Software without restriction, including without limitation the rights
9c896fe29Sbellard  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10c896fe29Sbellard  * copies of the Software, and to permit persons to whom the Software is
11c896fe29Sbellard  * furnished to do so, subject to the following conditions:
12c896fe29Sbellard  *
13c896fe29Sbellard  * The above copyright notice and this permission notice shall be included in
14c896fe29Sbellard  * all copies or substantial portions of the Software.
15c896fe29Sbellard  *
16c896fe29Sbellard  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17c896fe29Sbellard  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18c896fe29Sbellard  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19c896fe29Sbellard  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20c896fe29Sbellard  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21c896fe29Sbellard  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22c896fe29Sbellard  * THE SOFTWARE.
23c896fe29Sbellard  */
24c896fe29Sbellard #define TCG_TARGET_I386 1
25c896fe29Sbellard 
26c896fe29Sbellard #define TCG_TARGET_REG_BITS 32
27c896fe29Sbellard //#define TCG_TARGET_WORDS_BIGENDIAN
28c896fe29Sbellard 
29c896fe29Sbellard #define TCG_TARGET_NB_REGS 8
30c896fe29Sbellard 
31c896fe29Sbellard enum {
32c896fe29Sbellard     TCG_REG_EAX = 0,
33c896fe29Sbellard     TCG_REG_ECX,
34c896fe29Sbellard     TCG_REG_EDX,
35c896fe29Sbellard     TCG_REG_EBX,
36c896fe29Sbellard     TCG_REG_ESP,
37c896fe29Sbellard     TCG_REG_EBP,
38c896fe29Sbellard     TCG_REG_ESI,
39c896fe29Sbellard     TCG_REG_EDI,
40c896fe29Sbellard };
41c896fe29Sbellard 
42c896fe29Sbellard /* used for function call generation */
43c896fe29Sbellard #define TCG_REG_CALL_STACK TCG_REG_ESP
44c896fe29Sbellard #define TCG_TARGET_STACK_ALIGN 16
4539cf05d3Sbellard #define TCG_TARGET_CALL_STACK_OFFSET 0
46c896fe29Sbellard 
479619376cSaurel32 /* optional instructions */
48*66896cb8Saurel32 #define TCG_TARGET_HAS_bswap32_i32
499619376cSaurel32 #define TCG_TARGET_HAS_neg_i32
509619376cSaurel32 #define TCG_TARGET_HAS_not_i32
519619376cSaurel32 #define TCG_TARGET_HAS_ext8s_i32
529619376cSaurel32 #define TCG_TARGET_HAS_ext16s_i32
539619376cSaurel32 #define TCG_TARGET_HAS_rot_i32
549619376cSaurel32 
55c896fe29Sbellard /* Note: must be synced with dyngen-exec.h */
56c896fe29Sbellard #define TCG_AREG0 TCG_REG_EBP
57c896fe29Sbellard #define TCG_AREG1 TCG_REG_EBX
58c896fe29Sbellard #define TCG_AREG2 TCG_REG_ESI
59c896fe29Sbellard 
60c896fe29Sbellard static inline void flush_icache_range(unsigned long start, unsigned long stop)
61c896fe29Sbellard {
62c896fe29Sbellard }
63