xref: /qemu/tcg/arm/tcg-target.h (revision 99a0949b720a0936da2052cb9a46db04ffc6db29)
1 /*
2  * Tiny Code Generator for QEMU
3  *
4  * Copyright (c) 2008 Fabrice Bellard
5  * Copyright (c) 2008 Andrzej Zaborowski
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 #define TCG_TARGET_ARM 1
26 
27 #define TCG_TARGET_REG_BITS 32
28 #undef TCG_TARGET_WORDS_BIGENDIAN
29 #undef TCG_TARGET_HAS_div_i32
30 #undef TCG_TARGET_HAS_div_i64
31 #undef TCG_TARGET_HAS_bswap32_i32
32 #define TCG_TARGET_HAS_ext8s_i32
33 #define TCG_TARGET_HAS_ext16s_i32
34 #define TCG_TARGET_HAS_neg_i32
35 #undef TCG_TARGET_HAS_neg_i64
36 #define TCG_TARGET_HAS_not_i32
37 #undef TCG_TARGET_STACK_GROWSUP
38 
39 enum {
40     TCG_REG_R0 = 0,
41     TCG_REG_R1,
42     TCG_REG_R2,
43     TCG_REG_R3,
44     TCG_REG_R4,
45     TCG_REG_R5,
46     TCG_REG_R6,
47     TCG_REG_R7,
48     TCG_REG_R8,
49     TCG_REG_R9,
50     TCG_REG_R10,
51     TCG_REG_R11,
52     TCG_REG_R12,
53     TCG_REG_R13,
54     TCG_REG_R14,
55 };
56 
57 #define TCG_TARGET_NB_REGS 15
58 
59 #define TCG_CT_CONST_ARM 0x100
60 
61 /* used for function call generation */
62 #define TCG_REG_CALL_STACK		TCG_REG_R13
63 #define TCG_TARGET_STACK_ALIGN		8
64 #define TCG_TARGET_CALL_STACK_OFFSET	0
65 
66 #define TCG_TARGET_HAS_GUEST_BASE
67 
68 enum {
69     /* Note: must be synced with dyngen-exec.h */
70     TCG_AREG0 = TCG_REG_R7,
71     TCG_AREG1 = TCG_REG_R4,
72     TCG_AREG2 = TCG_REG_R5,
73 };
74 
75 static inline void flush_icache_range(unsigned long start, unsigned long stop)
76 {
77 #if QEMU_GNUC_PREREQ(4, 1)
78     __builtin___clear_cache((char *) start, (char *) stop);
79 #else
80     register unsigned long _beg __asm ("a1") = start;
81     register unsigned long _end __asm ("a2") = stop;
82     register unsigned long _flg __asm ("a3") = 0;
83     __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
84 #endif
85 }
86