xref: /qemu/tcg/arm/tcg-target.h (revision 2d69f3590d533ee029fb9739a2bd5339dde22bcb)
1811d4cf4Sbalrog /*
2811d4cf4Sbalrog  * Tiny Code Generator for QEMU
3811d4cf4Sbalrog  *
4811d4cf4Sbalrog  * Copyright (c) 2008 Fabrice Bellard
5811d4cf4Sbalrog  * Copyright (c) 2008 Andrzej Zaborowski
6811d4cf4Sbalrog  *
7811d4cf4Sbalrog  * Permission is hereby granted, free of charge, to any person obtaining a copy
8811d4cf4Sbalrog  * of this software and associated documentation files (the "Software"), to deal
9811d4cf4Sbalrog  * in the Software without restriction, including without limitation the rights
10811d4cf4Sbalrog  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11811d4cf4Sbalrog  * copies of the Software, and to permit persons to whom the Software is
12811d4cf4Sbalrog  * furnished to do so, subject to the following conditions:
13811d4cf4Sbalrog  *
14811d4cf4Sbalrog  * The above copyright notice and this permission notice shall be included in
15811d4cf4Sbalrog  * all copies or substantial portions of the Software.
16811d4cf4Sbalrog  *
17811d4cf4Sbalrog  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18811d4cf4Sbalrog  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19811d4cf4Sbalrog  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20811d4cf4Sbalrog  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21811d4cf4Sbalrog  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22811d4cf4Sbalrog  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23811d4cf4Sbalrog  * THE SOFTWARE.
24811d4cf4Sbalrog  */
25811d4cf4Sbalrog #define TCG_TARGET_ARM 1
26811d4cf4Sbalrog 
27811d4cf4Sbalrog #define TCG_TARGET_REG_BITS 32
28811d4cf4Sbalrog #undef TCG_TARGET_WORDS_BIGENDIAN
29811d4cf4Sbalrog #undef TCG_TARGET_HAS_div_i32
30811d4cf4Sbalrog #undef TCG_TARGET_HAS_div_i64
3166896cb8Saurel32 #undef TCG_TARGET_HAS_bswap32_i32
32811d4cf4Sbalrog #define TCG_TARGET_HAS_ext8s_i32
33811d4cf4Sbalrog #define TCG_TARGET_HAS_ext16s_i32
34650bbb36Sbalrog #define TCG_TARGET_HAS_neg_i32
35650bbb36Sbalrog #undef TCG_TARGET_HAS_neg_i64
36811d4cf4Sbalrog #undef TCG_TARGET_STACK_GROWSUP
37811d4cf4Sbalrog 
38811d4cf4Sbalrog enum {
39811d4cf4Sbalrog     TCG_REG_R0 = 0,
40811d4cf4Sbalrog     TCG_REG_R1,
41811d4cf4Sbalrog     TCG_REG_R2,
42811d4cf4Sbalrog     TCG_REG_R3,
43811d4cf4Sbalrog     TCG_REG_R4,
44811d4cf4Sbalrog     TCG_REG_R5,
45811d4cf4Sbalrog     TCG_REG_R6,
46811d4cf4Sbalrog     TCG_REG_R7,
47811d4cf4Sbalrog     TCG_REG_R8,
48811d4cf4Sbalrog     TCG_REG_R9,
49811d4cf4Sbalrog     TCG_REG_R10,
50811d4cf4Sbalrog     TCG_REG_R11,
51811d4cf4Sbalrog     TCG_REG_R12,
52811d4cf4Sbalrog     TCG_REG_R13,
53811d4cf4Sbalrog     TCG_REG_R14,
54811d4cf4Sbalrog };
55811d4cf4Sbalrog 
56*2d69f359SPaul Brook #define TCG_TARGET_NB_REGS 15
57*2d69f359SPaul Brook 
58811d4cf4Sbalrog /* used for function call generation */
59811d4cf4Sbalrog #define TCG_REG_CALL_STACK		TCG_REG_R13
60811d4cf4Sbalrog #define TCG_TARGET_STACK_ALIGN		8
61bedba0cdSbalrog #define TCG_TARGET_CALL_STACK_OFFSET	0
62811d4cf4Sbalrog 
63811d4cf4Sbalrog enum {
64811d4cf4Sbalrog     /* Note: must be synced with dyngen-exec.h */
65811d4cf4Sbalrog     TCG_AREG0 = TCG_REG_R7,
66811d4cf4Sbalrog     TCG_AREG1 = TCG_REG_R4,
67811d4cf4Sbalrog     TCG_AREG2 = TCG_REG_R5,
68811d4cf4Sbalrog };
69811d4cf4Sbalrog 
70811d4cf4Sbalrog static inline void flush_icache_range(unsigned long start, unsigned long stop)
71811d4cf4Sbalrog {
723233f0d4Sbalrog #if QEMU_GNUC_PREREQ(4, 1)
73*2d69f359SPaul Brook     __builtin___clear_cache((char *) start, (char *) stop);
743233f0d4Sbalrog #else
75811d4cf4Sbalrog     register unsigned long _beg __asm ("a1") = start;
76811d4cf4Sbalrog     register unsigned long _end __asm ("a2") = stop;
77811d4cf4Sbalrog     register unsigned long _flg __asm ("a3") = 0;
78811d4cf4Sbalrog     __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
793233f0d4Sbalrog #endif
80811d4cf4Sbalrog }
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