1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Define target-specific opcode support 4 * Copyright (c) 2013 Huawei Technologies Duesseldorf GmbH 5 */ 6 7 #ifndef TCG_TARGET_HAS_H 8 #define TCG_TARGET_HAS_H 9 10 #include "host/cpuinfo.h" 11 12 #define have_lse (cpuinfo & CPUINFO_LSE) 13 #define have_lse2 (cpuinfo & CPUINFO_LSE2) 14 15 /* optional instructions */ 16 #define TCG_TARGET_HAS_extr_i64_i32 0 17 18 /* 19 * Without FEAT_LSE2, we must use LDXP+STXP to implement atomic 128-bit load, 20 * which requires writable pages. We must defer to the helper for user-only, 21 * but in system mode all ram is writable for the host. 22 */ 23 #ifdef CONFIG_USER_ONLY 24 #define TCG_TARGET_HAS_qemu_ldst_i128 have_lse2 25 #else 26 #define TCG_TARGET_HAS_qemu_ldst_i128 1 27 #endif 28 29 #define TCG_TARGET_HAS_tst 1 30 31 #define TCG_TARGET_HAS_v64 1 32 #define TCG_TARGET_HAS_v128 1 33 #define TCG_TARGET_HAS_v256 0 34 35 #define TCG_TARGET_HAS_andc_vec 1 36 #define TCG_TARGET_HAS_orc_vec 1 37 #define TCG_TARGET_HAS_nand_vec 0 38 #define TCG_TARGET_HAS_nor_vec 0 39 #define TCG_TARGET_HAS_eqv_vec 0 40 #define TCG_TARGET_HAS_not_vec 1 41 #define TCG_TARGET_HAS_neg_vec 1 42 #define TCG_TARGET_HAS_abs_vec 1 43 #define TCG_TARGET_HAS_roti_vec 0 44 #define TCG_TARGET_HAS_rots_vec 0 45 #define TCG_TARGET_HAS_rotv_vec 0 46 #define TCG_TARGET_HAS_shi_vec 1 47 #define TCG_TARGET_HAS_shs_vec 0 48 #define TCG_TARGET_HAS_shv_vec 1 49 #define TCG_TARGET_HAS_mul_vec 1 50 #define TCG_TARGET_HAS_sat_vec 1 51 #define TCG_TARGET_HAS_minmax_vec 1 52 #define TCG_TARGET_HAS_bitsel_vec 1 53 #define TCG_TARGET_HAS_cmpsel_vec 0 54 #define TCG_TARGET_HAS_tst_vec 1 55 56 #define TCG_TARGET_extract_valid(type, ofs, len) 1 57 #define TCG_TARGET_sextract_valid(type, ofs, len) 1 58 #define TCG_TARGET_deposit_valid(type, ofs, len) 1 59 60 #endif 61