1e03cf27dSRichard Henderson /* SPDX-License-Identifier: GPL-2.0-or-later */ 2e03cf27dSRichard Henderson /* 3e03cf27dSRichard Henderson * Define target-specific opcode support 4e03cf27dSRichard Henderson * Copyright (c) 2013 Huawei Technologies Duesseldorf GmbH 5e03cf27dSRichard Henderson */ 6e03cf27dSRichard Henderson 7e03cf27dSRichard Henderson #ifndef TCG_TARGET_HAS_H 8e03cf27dSRichard Henderson #define TCG_TARGET_HAS_H 9e03cf27dSRichard Henderson 10e03cf27dSRichard Henderson #include "host/cpuinfo.h" 11e03cf27dSRichard Henderson 12e03cf27dSRichard Henderson #define have_lse (cpuinfo & CPUINFO_LSE) 13e03cf27dSRichard Henderson #define have_lse2 (cpuinfo & CPUINFO_LSE2) 14e03cf27dSRichard Henderson 15e03cf27dSRichard Henderson /* optional instructions */ 16e03cf27dSRichard Henderson #define TCG_TARGET_HAS_extr_i64_i32 0 17e03cf27dSRichard Henderson 18e03cf27dSRichard Henderson /* 19e03cf27dSRichard Henderson * Without FEAT_LSE2, we must use LDXP+STXP to implement atomic 128-bit load, 20e03cf27dSRichard Henderson * which requires writable pages. We must defer to the helper for user-only, 21e03cf27dSRichard Henderson * but in system mode all ram is writable for the host. 22e03cf27dSRichard Henderson */ 23e03cf27dSRichard Henderson #ifdef CONFIG_USER_ONLY 24e03cf27dSRichard Henderson #define TCG_TARGET_HAS_qemu_ldst_i128 have_lse2 25e03cf27dSRichard Henderson #else 26e03cf27dSRichard Henderson #define TCG_TARGET_HAS_qemu_ldst_i128 1 27e03cf27dSRichard Henderson #endif 28e03cf27dSRichard Henderson 29e03cf27dSRichard Henderson #define TCG_TARGET_HAS_tst 1 30e03cf27dSRichard Henderson 31e03cf27dSRichard Henderson #define TCG_TARGET_HAS_v64 1 32e03cf27dSRichard Henderson #define TCG_TARGET_HAS_v128 1 33e03cf27dSRichard Henderson #define TCG_TARGET_HAS_v256 0 34e03cf27dSRichard Henderson 35e03cf27dSRichard Henderson #define TCG_TARGET_HAS_andc_vec 1 36e03cf27dSRichard Henderson #define TCG_TARGET_HAS_orc_vec 1 37e03cf27dSRichard Henderson #define TCG_TARGET_HAS_nand_vec 0 38e03cf27dSRichard Henderson #define TCG_TARGET_HAS_nor_vec 0 39e03cf27dSRichard Henderson #define TCG_TARGET_HAS_eqv_vec 0 40e03cf27dSRichard Henderson #define TCG_TARGET_HAS_not_vec 1 41e03cf27dSRichard Henderson #define TCG_TARGET_HAS_neg_vec 1 42e03cf27dSRichard Henderson #define TCG_TARGET_HAS_abs_vec 1 43e03cf27dSRichard Henderson #define TCG_TARGET_HAS_roti_vec 0 44e03cf27dSRichard Henderson #define TCG_TARGET_HAS_rots_vec 0 45e03cf27dSRichard Henderson #define TCG_TARGET_HAS_rotv_vec 0 46e03cf27dSRichard Henderson #define TCG_TARGET_HAS_shi_vec 1 47e03cf27dSRichard Henderson #define TCG_TARGET_HAS_shs_vec 0 48e03cf27dSRichard Henderson #define TCG_TARGET_HAS_shv_vec 1 49e03cf27dSRichard Henderson #define TCG_TARGET_HAS_mul_vec 1 50e03cf27dSRichard Henderson #define TCG_TARGET_HAS_sat_vec 1 51e03cf27dSRichard Henderson #define TCG_TARGET_HAS_minmax_vec 1 52e03cf27dSRichard Henderson #define TCG_TARGET_HAS_bitsel_vec 1 53e03cf27dSRichard Henderson #define TCG_TARGET_HAS_cmpsel_vec 0 54e03cf27dSRichard Henderson #define TCG_TARGET_HAS_tst_vec 1 55e03cf27dSRichard Henderson 5642ace086SRichard Henderson #define TCG_TARGET_extract_valid(type, ofs, len) 1 5742ace086SRichard Henderson #define TCG_TARGET_sextract_valid(type, ofs, len) 1 58*6482e9d2SRichard Henderson #define TCG_TARGET_deposit_valid(type, ofs, len) 1 5942ace086SRichard Henderson 60e03cf27dSRichard Henderson #endif 61