xref: /qemu/target/xtensa/core-dsp3400.c (revision b1224d8395de9be79c8cddbc2f60d29d9f1c10fe)
1c621b414SMax Filippov /*
2c621b414SMax Filippov  * Copyright (c) 2020, Max Filippov, Open Source and Linux Lab.
3c621b414SMax Filippov  * All rights reserved.
4c621b414SMax Filippov  *
5c621b414SMax Filippov  * Redistribution and use in source and binary forms, with or without
6c621b414SMax Filippov  * modification, are permitted provided that the following conditions are met:
7c621b414SMax Filippov  *     * Redistributions of source code must retain the above copyright
8c621b414SMax Filippov  *       notice, this list of conditions and the following disclaimer.
9c621b414SMax Filippov  *     * Redistributions in binary form must reproduce the above copyright
10c621b414SMax Filippov  *       notice, this list of conditions and the following disclaimer in the
11c621b414SMax Filippov  *       documentation and/or other materials provided with the distribution.
12c621b414SMax Filippov  *     * Neither the name of the Open Source and Linux Lab nor the
13c621b414SMax Filippov  *       names of its contributors may be used to endorse or promote products
14c621b414SMax Filippov  *       derived from this software without specific prior written permission.
15c621b414SMax Filippov  *
16c621b414SMax Filippov  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17c621b414SMax Filippov  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18c621b414SMax Filippov  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19c621b414SMax Filippov  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20c621b414SMax Filippov  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21c621b414SMax Filippov  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22c621b414SMax Filippov  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23c621b414SMax Filippov  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24c621b414SMax Filippov  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25c621b414SMax Filippov  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26c621b414SMax Filippov  */
27c621b414SMax Filippov 
28c621b414SMax Filippov #include "qemu/osdep.h"
29c621b414SMax Filippov #include "cpu.h"
30*4ea5fe99SAlex Bennée #include "gdbstub/helpers.h"
31c621b414SMax Filippov #include "qemu/host-utils.h"
32c621b414SMax Filippov 
33c621b414SMax Filippov #include "core-dsp3400/core-isa.h"
34c621b414SMax Filippov #include "core-dsp3400/core-matmap.h"
35c621b414SMax Filippov #include "overlay_tool.h"
36c621b414SMax Filippov 
37c621b414SMax Filippov #define xtensa_modules xtensa_modules_dsp3400
38c621b414SMax Filippov #include "core-dsp3400/xtensa-modules.c.inc"
39c621b414SMax Filippov 
40c621b414SMax Filippov static XtensaConfig dsp3400 __attribute__((unused)) = {
41c621b414SMax Filippov     .name = "dsp3400",
42c621b414SMax Filippov     .gdb_regmap = {
43c621b414SMax Filippov         .reg = {
44c621b414SMax Filippov #include "core-dsp3400/gdb-config.c.inc"
45c621b414SMax Filippov         }
46c621b414SMax Filippov     },
47c621b414SMax Filippov     .isa_internal = &xtensa_modules,
48c621b414SMax Filippov     .clock_freq_khz = 40000,
49c621b414SMax Filippov     .opcode_translators = (const XtensaOpcodeTranslators *[]){
50c621b414SMax Filippov         &xtensa_core_opcodes,
51c621b414SMax Filippov         &xtensa_fpu2000_opcodes,
52c621b414SMax Filippov         NULL,
53c621b414SMax Filippov     },
54c621b414SMax Filippov     DEFAULT_SECTIONS
55c621b414SMax Filippov };
56c621b414SMax Filippov 
57c621b414SMax Filippov REGISTER_CORE(dsp3400)
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