xref: /qemu/target/xtensa/core-de233_fpu.c (revision b1224d8395de9be79c8cddbc2f60d29d9f1c10fe)
179bc0fb5SMax Filippov /*
279bc0fb5SMax Filippov  * Copyright (c) 2020, Max Filippov, Open Source and Linux Lab.
379bc0fb5SMax Filippov  * All rights reserved.
479bc0fb5SMax Filippov  *
579bc0fb5SMax Filippov  * Redistribution and use in source and binary forms, with or without
679bc0fb5SMax Filippov  * modification, are permitted provided that the following conditions are met:
779bc0fb5SMax Filippov  *     * Redistributions of source code must retain the above copyright
879bc0fb5SMax Filippov  *       notice, this list of conditions and the following disclaimer.
979bc0fb5SMax Filippov  *     * Redistributions in binary form must reproduce the above copyright
1079bc0fb5SMax Filippov  *       notice, this list of conditions and the following disclaimer in the
1179bc0fb5SMax Filippov  *       documentation and/or other materials provided with the distribution.
1279bc0fb5SMax Filippov  *     * Neither the name of the Open Source and Linux Lab nor the
1379bc0fb5SMax Filippov  *       names of its contributors may be used to endorse or promote products
1479bc0fb5SMax Filippov  *       derived from this software without specific prior written permission.
1579bc0fb5SMax Filippov  *
1679bc0fb5SMax Filippov  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1779bc0fb5SMax Filippov  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1879bc0fb5SMax Filippov  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1979bc0fb5SMax Filippov  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
2079bc0fb5SMax Filippov  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2179bc0fb5SMax Filippov  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2279bc0fb5SMax Filippov  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
2379bc0fb5SMax Filippov  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2479bc0fb5SMax Filippov  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2579bc0fb5SMax Filippov  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2679bc0fb5SMax Filippov  */
2779bc0fb5SMax Filippov 
2879bc0fb5SMax Filippov #include "qemu/osdep.h"
2979bc0fb5SMax Filippov #include "cpu.h"
30*4ea5fe99SAlex Bennée #include "gdbstub/helpers.h"
3179bc0fb5SMax Filippov #include "qemu/host-utils.h"
3279bc0fb5SMax Filippov 
3379bc0fb5SMax Filippov #include "core-de233_fpu/core-isa.h"
3479bc0fb5SMax Filippov #include "core-de233_fpu/core-matmap.h"
3579bc0fb5SMax Filippov #include "overlay_tool.h"
3679bc0fb5SMax Filippov 
3779bc0fb5SMax Filippov #define xtensa_modules xtensa_modules_de233_fpu
3879bc0fb5SMax Filippov #include "core-de233_fpu/xtensa-modules.c.inc"
3979bc0fb5SMax Filippov 
4079bc0fb5SMax Filippov static XtensaConfig de233_fpu __attribute__((unused)) = {
4179bc0fb5SMax Filippov     .name = "de233_fpu",
4279bc0fb5SMax Filippov     .gdb_regmap = {
4379bc0fb5SMax Filippov         .reg = {
4479bc0fb5SMax Filippov #include "core-de233_fpu/gdb-config.c.inc"
4579bc0fb5SMax Filippov         }
4679bc0fb5SMax Filippov     },
4779bc0fb5SMax Filippov     .isa_internal = &xtensa_modules,
4879bc0fb5SMax Filippov     .clock_freq_khz = 40000,
4979bc0fb5SMax Filippov     .opcode_translators = (const XtensaOpcodeTranslators *[]){
5079bc0fb5SMax Filippov         &xtensa_core_opcodes,
5179bc0fb5SMax Filippov         &xtensa_fpu_opcodes,
5279bc0fb5SMax Filippov         NULL,
5379bc0fb5SMax Filippov     },
5479bc0fb5SMax Filippov     DEFAULT_SECTIONS
5579bc0fb5SMax Filippov };
5679bc0fb5SMax Filippov 
5779bc0fb5SMax Filippov REGISTER_CORE(de233_fpu)
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