1*74433bf0SRichard Henderson /* 2*74433bf0SRichard Henderson * TriCore cpu parameters for qemu. 3*74433bf0SRichard Henderson * 4*74433bf0SRichard Henderson * Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn 5*74433bf0SRichard Henderson * SPDX-License-Identifier: LGPL-2.1+ 6*74433bf0SRichard Henderson */ 7*74433bf0SRichard Henderson 8*74433bf0SRichard Henderson #ifndef TRICORE_CPU_PARAM_H 9*74433bf0SRichard Henderson #define TRICORE_CPU_PARAM_H 1 10*74433bf0SRichard Henderson 11*74433bf0SRichard Henderson #define TARGET_LONG_BITS 32 12*74433bf0SRichard Henderson #define TARGET_PAGE_BITS 14 13*74433bf0SRichard Henderson #define TARGET_PHYS_ADDR_SPACE_BITS 32 14*74433bf0SRichard Henderson #define TARGET_VIRT_ADDR_SPACE_BITS 32 15*74433bf0SRichard Henderson #define NB_MMU_MODES 3 16*74433bf0SRichard Henderson 17*74433bf0SRichard Henderson #endif 18