xref: /qemu/target/sparc/insns.decode (revision 668bb9b755e3d4e4e88625aefab14f8e642ca2f3)
1878cc677SRichard Henderson# SPDX-License-Identifier: LGPL-2.0+
2878cc677SRichard Henderson#
3878cc677SRichard Henderson# Sparc instruction decode definitions.
4878cc677SRichard Henderson# Copyright (c) 2023 Richard Henderson <rth@twiddle.net>
5878cc677SRichard Henderson
66d2a0768SRichard Henderson##
76d2a0768SRichard Henderson## Major Opcodes 00 and 01 -- branches, call, and sethi.
86d2a0768SRichard Henderson##
96d2a0768SRichard Henderson
10276567aaSRichard Henderson&bcc    i a cond cc
11276567aaSRichard HendersonBPcc    00 a:1 cond:4   001 cc:1 0 - i:s19                 &bcc
12276567aaSRichard HendersonBicc    00 a:1 cond:4   010          i:s22                 &bcc cc=0
1345196ea4SRichard HendersonFBPfcc  00 a:1 cond:4   101 cc:2   - i:s19                 &bcc
1445196ea4SRichard HendersonFBfcc   00 a:1 cond:4   110          i:s22                 &bcc cc=0
15276567aaSRichard Henderson
16ab9ffe98SRichard Henderson%d16    20:s2 0:14
17ab9ffe98SRichard HendersonBPr     00 a:1 0 cond:3 011 ..     - rs1:5 ..............  i=%d16
18ab9ffe98SRichard Henderson
1945196ea4SRichard HendersonNCP     00 -   ----     111 ----------------------         # CBcc
2045196ea4SRichard Henderson
216d2a0768SRichard HendersonSETHI   00 rd:5         100 i:22
226d2a0768SRichard Henderson
2323ada1b1SRichard HendersonCALL    01 i:s30
2430376636SRichard Henderson
25af25071cSRichard Henderson{
26af25071cSRichard Henderson  [
27af25071cSRichard Henderson    STBAR           10 00000 101000 01111 0 0000000000000
28af25071cSRichard Henderson    MEMBAR          10 00000 101000 01111 1 000000 cmask:3 mmask:4
29af25071cSRichard Henderson
30af25071cSRichard Henderson    RDCCR           10 rd:5  101000 00010 0 0000000000000
31af25071cSRichard Henderson    RDASI           10 rd:5  101000 00011 0 0000000000000
32af25071cSRichard Henderson    RDTICK          10 rd:5  101000 00100 0 0000000000000
33af25071cSRichard Henderson    RDPC            10 rd:5  101000 00101 0 0000000000000
34af25071cSRichard Henderson    RDFPRS          10 rd:5  101000 00110 0 0000000000000
35af25071cSRichard Henderson    RDASR17         10 rd:5  101000 10001 0 0000000000000
36af25071cSRichard Henderson    RDGSR           10 rd:5  101000 10011 0 0000000000000
37af25071cSRichard Henderson    RDSOFTINT       10 rd:5  101000 10110 0 0000000000000
38af25071cSRichard Henderson    RDTICK_CMPR     10 rd:5  101000 10111 0 0000000000000
39af25071cSRichard Henderson    RDSTICK         10 rd:5  101000 11000 0 0000000000000
40af25071cSRichard Henderson    RDSTICK_CMPR    10 rd:5  101000 11001 0 0000000000000
41af25071cSRichard Henderson    RDSTRAND_STATUS 10 rd:5  101000 11010 0 0000000000000
42af25071cSRichard Henderson  ]
43af25071cSRichard Henderson  # Before v8, all rs1 accepted; otherwise rs1==0.
44af25071cSRichard Henderson  RDY               10 rd:5  101000 rs1:5 0 0000000000000
45af25071cSRichard Henderson}
46af25071cSRichard Henderson
47*668bb9b7SRichard Henderson{
48*668bb9b7SRichard Henderson  RDPSR             10 rd:5  101001 00000 0 0000000000000
49*668bb9b7SRichard Henderson  RDHPR_hpstate     10 rd:5  101001 00000 0 0000000000000
50*668bb9b7SRichard Henderson}
51*668bb9b7SRichard HendersonRDHPR_htstate       10 rd:5  101001 00001 0 0000000000000
52*668bb9b7SRichard HendersonRDHPR_hintp         10 rd:5  101001 00011 0 0000000000000
53*668bb9b7SRichard HendersonRDHPR_htba          10 rd:5  101001 00101 0 0000000000000
54*668bb9b7SRichard HendersonRDHPR_hver          10 rd:5  101001 00110 0 0000000000000
55*668bb9b7SRichard HendersonRDHPR_hstick_cmpr   10 rd:5  101001 11111 0 0000000000000
56*668bb9b7SRichard Henderson
5730376636SRichard HendersonTcc_r       10 0 cond:4 111010 rs1:5 0 cc:1 0000000 rs2:5
5830376636SRichard Henderson{
5930376636SRichard Henderson  # For v7, the entire simm13 field is present, but masked to 7 bits.
6030376636SRichard Henderson  # For v8, [12:7] are reserved.  However, a compatibility note for
6130376636SRichard Henderson  # the Tcc insn in the v9 manual suggests that the v8 reserved field
6230376636SRichard Henderson  # was ignored and did not produce traps.
6330376636SRichard Henderson  Tcc_i_v7  10 0 cond:4 111010 rs1:5 1 ------ i:7
6430376636SRichard Henderson
6530376636SRichard Henderson  # For v9, bits [12:11] are cc1 and cc0 (and cc0 must be 0).
6630376636SRichard Henderson  # Bits [10:8] are reserved and the OSA2011 manual says they must be 0.
6730376636SRichard Henderson  Tcc_i_v9  10 0 cond:4 111010 rs1:5 1 cc:1 0 000 i:8
6830376636SRichard Henderson}
69