xref: /qemu/target/sparc/insns.decode (revision 3037663616db929a3f9c21daa64ff9605bb6ac6f)
1878cc677SRichard Henderson# SPDX-License-Identifier: LGPL-2.0+
2878cc677SRichard Henderson#
3878cc677SRichard Henderson# Sparc instruction decode definitions.
4878cc677SRichard Henderson# Copyright (c) 2023 Richard Henderson <rth@twiddle.net>
5878cc677SRichard Henderson
66d2a0768SRichard Henderson##
76d2a0768SRichard Henderson## Major Opcodes 00 and 01 -- branches, call, and sethi.
86d2a0768SRichard Henderson##
96d2a0768SRichard Henderson
10276567aaSRichard Henderson&bcc    i a cond cc
11276567aaSRichard HendersonBPcc    00 a:1 cond:4   001 cc:1 0 - i:s19                 &bcc
12276567aaSRichard HendersonBicc    00 a:1 cond:4   010          i:s22                 &bcc cc=0
1345196ea4SRichard HendersonFBPfcc  00 a:1 cond:4   101 cc:2   - i:s19                 &bcc
1445196ea4SRichard HendersonFBfcc   00 a:1 cond:4   110          i:s22                 &bcc cc=0
15276567aaSRichard Henderson
16ab9ffe98SRichard Henderson%d16    20:s2 0:14
17ab9ffe98SRichard HendersonBPr     00 a:1 0 cond:3 011 ..     - rs1:5 ..............  i=%d16
18ab9ffe98SRichard Henderson
1945196ea4SRichard HendersonNCP     00 -   ----     111 ----------------------         # CBcc
2045196ea4SRichard Henderson
216d2a0768SRichard HendersonSETHI   00 rd:5         100 i:22
226d2a0768SRichard Henderson
2323ada1b1SRichard HendersonCALL    01 i:s30
24*30376636SRichard Henderson
25*30376636SRichard HendersonTcc_r       10 0 cond:4 111010 rs1:5 0 cc:1 0000000 rs2:5
26*30376636SRichard Henderson{
27*30376636SRichard Henderson  # For v7, the entire simm13 field is present, but masked to 7 bits.
28*30376636SRichard Henderson  # For v8, [12:7] are reserved.  However, a compatibility note for
29*30376636SRichard Henderson  # the Tcc insn in the v9 manual suggests that the v8 reserved field
30*30376636SRichard Henderson  # was ignored and did not produce traps.
31*30376636SRichard Henderson  Tcc_i_v7  10 0 cond:4 111010 rs1:5 1 ------ i:7
32*30376636SRichard Henderson
33*30376636SRichard Henderson  # For v9, bits [12:11] are cc1 and cc0 (and cc0 must be 0).
34*30376636SRichard Henderson  # Bits [10:8] are reserved and the OSA2011 manual says they must be 0.
35*30376636SRichard Henderson  Tcc_i_v9  10 0 cond:4 111010 rs1:5 1 cc:1 0 000 i:8
36*30376636SRichard Henderson}
37