1e8af50a3Sbellard /* 2163fa5caSBlue Swirl * Misc Sparc helpers 3e8af50a3Sbellard * 483469015Sbellard * Copyright (c) 2003-2005 Fabrice Bellard 5e8af50a3Sbellard * 6e8af50a3Sbellard * This library is free software; you can redistribute it and/or 7e8af50a3Sbellard * modify it under the terms of the GNU Lesser General Public 8e8af50a3Sbellard * License as published by the Free Software Foundation; either 9e8af50a3Sbellard * version 2 of the License, or (at your option) any later version. 10e8af50a3Sbellard * 11e8af50a3Sbellard * This library is distributed in the hope that it will be useful, 12e8af50a3Sbellard * but WITHOUT ANY WARRANTY; without even the implied warranty of 13e8af50a3Sbellard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14e8af50a3Sbellard * Lesser General Public License for more details. 15e8af50a3Sbellard * 16e8af50a3Sbellard * You should have received a copy of the GNU Lesser General Public 178167ee88SBlue Swirl * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18e8af50a3Sbellard */ 19ee5bbe38Sbellard 20db5ebe5fSPeter Maydell #include "qemu/osdep.h" 21ee5bbe38Sbellard #include "cpu.h" 2263c91552SPaolo Bonzini #include "exec/exec-all.h" 231de7afc9SPaolo Bonzini #include "qemu/host-utils.h" 242ef6175aSRichard Henderson #include "exec/helper-proto.h" 259c17d615SPaolo Bonzini #include "sysemu/sysemu.h" 26e8af50a3Sbellard 27c5f9864eSAndreas Färber void helper_raise_exception(CPUSPARCState *env, int tt) 28bc265319SBlue Swirl { 2927103424SAndreas Färber CPUState *cs = CPU(sparc_env_get_cpu(env)); 3027103424SAndreas Färber 3127103424SAndreas Färber cs->exception_index = tt; 325638d180SAndreas Färber cpu_loop_exit(cs); 33bc265319SBlue Swirl } 34bc265319SBlue Swirl 35c5f9864eSAndreas Färber void helper_debug(CPUSPARCState *env) 36bc265319SBlue Swirl { 3727103424SAndreas Färber CPUState *cs = CPU(sparc_env_get_cpu(env)); 3827103424SAndreas Färber 3927103424SAndreas Färber cs->exception_index = EXCP_DEBUG; 405638d180SAndreas Färber cpu_loop_exit(cs); 41bc265319SBlue Swirl } 42bc265319SBlue Swirl 432336c1f1SBlue Swirl #ifdef TARGET_SPARC64 442336c1f1SBlue Swirl target_ulong helper_popc(target_ulong val) 452336c1f1SBlue Swirl { 462336c1f1SBlue Swirl return ctpop64(val); 472336c1f1SBlue Swirl } 482336c1f1SBlue Swirl 492336c1f1SBlue Swirl void helper_tick_set_count(void *opaque, uint64_t count) 502336c1f1SBlue Swirl { 512336c1f1SBlue Swirl #if !defined(CONFIG_USER_ONLY) 522336c1f1SBlue Swirl cpu_tick_set_count(opaque, count); 532336c1f1SBlue Swirl #endif 542336c1f1SBlue Swirl } 552336c1f1SBlue Swirl 56c9a46442SMark Cave-Ayland uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx) 572336c1f1SBlue Swirl { 582336c1f1SBlue Swirl #if !defined(CONFIG_USER_ONLY) 59c9a46442SMark Cave-Ayland CPUTimer *timer = opaque; 60c9a46442SMark Cave-Ayland 61c9a46442SMark Cave-Ayland if (timer->npt && mem_idx < MMU_KERNEL_IDX) { 62c9a46442SMark Cave-Ayland helper_raise_exception(env, TT_PRIV_INSN); 63c9a46442SMark Cave-Ayland } 64c9a46442SMark Cave-Ayland 65c9a46442SMark Cave-Ayland return cpu_tick_get_count(timer); 662336c1f1SBlue Swirl #else 672336c1f1SBlue Swirl return 0; 682336c1f1SBlue Swirl #endif 692336c1f1SBlue Swirl } 702336c1f1SBlue Swirl 712336c1f1SBlue Swirl void helper_tick_set_limit(void *opaque, uint64_t limit) 722336c1f1SBlue Swirl { 732336c1f1SBlue Swirl #if !defined(CONFIG_USER_ONLY) 742336c1f1SBlue Swirl cpu_tick_set_limit(opaque, limit); 752336c1f1SBlue Swirl #endif 762336c1f1SBlue Swirl } 772336c1f1SBlue Swirl #endif 787a5e4488SBlue Swirl 79c5f9864eSAndreas Färber static target_ulong helper_udiv_common(CPUSPARCState *env, target_ulong a, 807a5e4488SBlue Swirl target_ulong b, int cc) 817a5e4488SBlue Swirl { 823f38f309SAndreas Färber SPARCCPU *cpu = sparc_env_get_cpu(env); 837a5e4488SBlue Swirl int overflow = 0; 847a5e4488SBlue Swirl uint64_t x0; 857a5e4488SBlue Swirl uint32_t x1; 867a5e4488SBlue Swirl 877a5e4488SBlue Swirl x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32); 887a5e4488SBlue Swirl x1 = (b & 0xffffffff); 897a5e4488SBlue Swirl 907a5e4488SBlue Swirl if (x1 == 0) { 913f38f309SAndreas Färber cpu_restore_state(CPU(cpu), GETPC()); 927a5e4488SBlue Swirl helper_raise_exception(env, TT_DIV_ZERO); 937a5e4488SBlue Swirl } 947a5e4488SBlue Swirl 957a5e4488SBlue Swirl x0 = x0 / x1; 966a5b69a9SOlivier Danet if (x0 > UINT32_MAX) { 976a5b69a9SOlivier Danet x0 = UINT32_MAX; 987a5e4488SBlue Swirl overflow = 1; 997a5e4488SBlue Swirl } 1007a5e4488SBlue Swirl 1017a5e4488SBlue Swirl if (cc) { 1027a5e4488SBlue Swirl env->cc_dst = x0; 1037a5e4488SBlue Swirl env->cc_src2 = overflow; 1047a5e4488SBlue Swirl env->cc_op = CC_OP_DIV; 1057a5e4488SBlue Swirl } 1067a5e4488SBlue Swirl return x0; 1077a5e4488SBlue Swirl } 1087a5e4488SBlue Swirl 109c5f9864eSAndreas Färber target_ulong helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b) 1107a5e4488SBlue Swirl { 1117a5e4488SBlue Swirl return helper_udiv_common(env, a, b, 0); 1127a5e4488SBlue Swirl } 1137a5e4488SBlue Swirl 114c5f9864eSAndreas Färber target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b) 1157a5e4488SBlue Swirl { 1167a5e4488SBlue Swirl return helper_udiv_common(env, a, b, 1); 1177a5e4488SBlue Swirl } 1187a5e4488SBlue Swirl 119c5f9864eSAndreas Färber static target_ulong helper_sdiv_common(CPUSPARCState *env, target_ulong a, 1207a5e4488SBlue Swirl target_ulong b, int cc) 1217a5e4488SBlue Swirl { 1223f38f309SAndreas Färber SPARCCPU *cpu = sparc_env_get_cpu(env); 1237a5e4488SBlue Swirl int overflow = 0; 1247a5e4488SBlue Swirl int64_t x0; 1257a5e4488SBlue Swirl int32_t x1; 1267a5e4488SBlue Swirl 1277a5e4488SBlue Swirl x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32); 1287a5e4488SBlue Swirl x1 = (b & 0xffffffff); 1297a5e4488SBlue Swirl 1307a5e4488SBlue Swirl if (x1 == 0) { 1313f38f309SAndreas Färber cpu_restore_state(CPU(cpu), GETPC()); 1327a5e4488SBlue Swirl helper_raise_exception(env, TT_DIV_ZERO); 1336a5b69a9SOlivier Danet } else if (x1 == -1 && x0 == INT64_MIN) { 1346a5b69a9SOlivier Danet x0 = INT32_MAX; 1356a5b69a9SOlivier Danet overflow = 1; 1366a5b69a9SOlivier Danet } else { 1377a5e4488SBlue Swirl x0 = x0 / x1; 1387a5e4488SBlue Swirl if ((int32_t) x0 != x0) { 1396a5b69a9SOlivier Danet x0 = x0 < 0 ? INT32_MIN : INT32_MAX; 1407a5e4488SBlue Swirl overflow = 1; 1417a5e4488SBlue Swirl } 1426a5b69a9SOlivier Danet } 1437a5e4488SBlue Swirl 1447a5e4488SBlue Swirl if (cc) { 1457a5e4488SBlue Swirl env->cc_dst = x0; 1467a5e4488SBlue Swirl env->cc_src2 = overflow; 1477a5e4488SBlue Swirl env->cc_op = CC_OP_DIV; 1487a5e4488SBlue Swirl } 1497a5e4488SBlue Swirl return x0; 1507a5e4488SBlue Swirl } 1517a5e4488SBlue Swirl 152c5f9864eSAndreas Färber target_ulong helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b) 1537a5e4488SBlue Swirl { 1547a5e4488SBlue Swirl return helper_sdiv_common(env, a, b, 0); 1557a5e4488SBlue Swirl } 1567a5e4488SBlue Swirl 157c5f9864eSAndreas Färber target_ulong helper_sdiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b) 1587a5e4488SBlue Swirl { 1597a5e4488SBlue Swirl return helper_sdiv_common(env, a, b, 1); 1607a5e4488SBlue Swirl } 161c28ae41eSRichard Henderson 162c28ae41eSRichard Henderson #ifdef TARGET_SPARC64 163c28ae41eSRichard Henderson int64_t helper_sdivx(CPUSPARCState *env, int64_t a, int64_t b) 164c28ae41eSRichard Henderson { 165c28ae41eSRichard Henderson if (b == 0) { 166c28ae41eSRichard Henderson /* Raise divide by zero trap. */ 1673f38f309SAndreas Färber SPARCCPU *cpu = sparc_env_get_cpu(env); 1683f38f309SAndreas Färber 1693f38f309SAndreas Färber cpu_restore_state(CPU(cpu), GETPC()); 170c28ae41eSRichard Henderson helper_raise_exception(env, TT_DIV_ZERO); 171c28ae41eSRichard Henderson } else if (b == -1) { 172c28ae41eSRichard Henderson /* Avoid overflow trap with i386 divide insn. */ 173c28ae41eSRichard Henderson return -a; 174c28ae41eSRichard Henderson } else { 175c28ae41eSRichard Henderson return a / b; 176c28ae41eSRichard Henderson } 177c28ae41eSRichard Henderson } 178c28ae41eSRichard Henderson 179c28ae41eSRichard Henderson uint64_t helper_udivx(CPUSPARCState *env, uint64_t a, uint64_t b) 180c28ae41eSRichard Henderson { 181c28ae41eSRichard Henderson if (b == 0) { 182c28ae41eSRichard Henderson /* Raise divide by zero trap. */ 1833f38f309SAndreas Färber SPARCCPU *cpu = sparc_env_get_cpu(env); 1843f38f309SAndreas Färber 1853f38f309SAndreas Färber cpu_restore_state(CPU(cpu), GETPC()); 186c28ae41eSRichard Henderson helper_raise_exception(env, TT_DIV_ZERO); 187c28ae41eSRichard Henderson } 188c28ae41eSRichard Henderson return a / b; 189c28ae41eSRichard Henderson } 190c28ae41eSRichard Henderson #endif 191a2ea4aa9SRichard Henderson 192a2ea4aa9SRichard Henderson target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1, 193a2ea4aa9SRichard Henderson target_ulong src2) 194a2ea4aa9SRichard Henderson { 1953f38f309SAndreas Färber SPARCCPU *cpu = sparc_env_get_cpu(env); 196a2ea4aa9SRichard Henderson target_ulong dst; 197a2ea4aa9SRichard Henderson 198a2ea4aa9SRichard Henderson /* Tag overflow occurs if either input has bits 0 or 1 set. */ 199a2ea4aa9SRichard Henderson if ((src1 | src2) & 3) { 200a2ea4aa9SRichard Henderson goto tag_overflow; 201a2ea4aa9SRichard Henderson } 202a2ea4aa9SRichard Henderson 203a2ea4aa9SRichard Henderson dst = src1 + src2; 204a2ea4aa9SRichard Henderson 205a2ea4aa9SRichard Henderson /* Tag overflow occurs if the addition overflows. */ 206a2ea4aa9SRichard Henderson if (~(src1 ^ src2) & (src1 ^ dst) & (1u << 31)) { 207a2ea4aa9SRichard Henderson goto tag_overflow; 208a2ea4aa9SRichard Henderson } 209a2ea4aa9SRichard Henderson 210a2ea4aa9SRichard Henderson /* Only modify the CC after any exceptions have been generated. */ 211a2ea4aa9SRichard Henderson env->cc_op = CC_OP_TADDTV; 212a2ea4aa9SRichard Henderson env->cc_src = src1; 213a2ea4aa9SRichard Henderson env->cc_src2 = src2; 214a2ea4aa9SRichard Henderson env->cc_dst = dst; 215a2ea4aa9SRichard Henderson return dst; 216a2ea4aa9SRichard Henderson 217a2ea4aa9SRichard Henderson tag_overflow: 2183f38f309SAndreas Färber cpu_restore_state(CPU(cpu), GETPC()); 219a2ea4aa9SRichard Henderson helper_raise_exception(env, TT_TOVF); 220a2ea4aa9SRichard Henderson } 221a2ea4aa9SRichard Henderson 222a2ea4aa9SRichard Henderson target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1, 223a2ea4aa9SRichard Henderson target_ulong src2) 224a2ea4aa9SRichard Henderson { 2253f38f309SAndreas Färber SPARCCPU *cpu = sparc_env_get_cpu(env); 226a2ea4aa9SRichard Henderson target_ulong dst; 227a2ea4aa9SRichard Henderson 228a2ea4aa9SRichard Henderson /* Tag overflow occurs if either input has bits 0 or 1 set. */ 229a2ea4aa9SRichard Henderson if ((src1 | src2) & 3) { 230a2ea4aa9SRichard Henderson goto tag_overflow; 231a2ea4aa9SRichard Henderson } 232a2ea4aa9SRichard Henderson 233a2ea4aa9SRichard Henderson dst = src1 - src2; 234a2ea4aa9SRichard Henderson 235a2ea4aa9SRichard Henderson /* Tag overflow occurs if the subtraction overflows. */ 236a2ea4aa9SRichard Henderson if ((src1 ^ src2) & (src1 ^ dst) & (1u << 31)) { 237a2ea4aa9SRichard Henderson goto tag_overflow; 238a2ea4aa9SRichard Henderson } 239a2ea4aa9SRichard Henderson 240a2ea4aa9SRichard Henderson /* Only modify the CC after any exceptions have been generated. */ 241a2ea4aa9SRichard Henderson env->cc_op = CC_OP_TSUBTV; 242a2ea4aa9SRichard Henderson env->cc_src = src1; 243a2ea4aa9SRichard Henderson env->cc_src2 = src2; 244a2ea4aa9SRichard Henderson env->cc_dst = dst; 245a2ea4aa9SRichard Henderson return dst; 246a2ea4aa9SRichard Henderson 247a2ea4aa9SRichard Henderson tag_overflow: 2483f38f309SAndreas Färber cpu_restore_state(CPU(cpu), GETPC()); 249a2ea4aa9SRichard Henderson helper_raise_exception(env, TT_TOVF); 250a2ea4aa9SRichard Henderson } 251d1c36ba7SRonald Hecht 252d1c36ba7SRonald Hecht #ifndef TARGET_SPARC64 253d1c36ba7SRonald Hecht void helper_power_down(CPUSPARCState *env) 254d1c36ba7SRonald Hecht { 255259186a7SAndreas Färber CPUState *cs = CPU(sparc_env_get_cpu(env)); 256259186a7SAndreas Färber 257259186a7SAndreas Färber cs->halted = 1; 25827103424SAndreas Färber cs->exception_index = EXCP_HLT; 259d1c36ba7SRonald Hecht env->pc = env->npc; 260d1c36ba7SRonald Hecht env->npc = env->pc + 4; 2615638d180SAndreas Färber cpu_loop_exit(cs); 262d1c36ba7SRonald Hecht } 263d1c36ba7SRonald Hecht #endif 264