1ab7ab3d7SAndreas Färber /* 2*2d56be5aSPhilippe Mathieu-Daudé * QEMU SPARC CPU QOM header (target agnostic) 3ab7ab3d7SAndreas Färber * 4ab7ab3d7SAndreas Färber * Copyright (c) 2012 SUSE LINUX Products GmbH 5ab7ab3d7SAndreas Färber * 6ab7ab3d7SAndreas Färber * This library is free software; you can redistribute it and/or 7ab7ab3d7SAndreas Färber * modify it under the terms of the GNU Lesser General Public 8ab7ab3d7SAndreas Färber * License as published by the Free Software Foundation; either 9ab7ab3d7SAndreas Färber * version 2.1 of the License, or (at your option) any later version. 10ab7ab3d7SAndreas Färber * 11ab7ab3d7SAndreas Färber * This library is distributed in the hope that it will be useful, 12ab7ab3d7SAndreas Färber * but WITHOUT ANY WARRANTY; without even the implied warranty of 13ab7ab3d7SAndreas Färber * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14ab7ab3d7SAndreas Färber * Lesser General Public License for more details. 15ab7ab3d7SAndreas Färber * 16ab7ab3d7SAndreas Färber * You should have received a copy of the GNU Lesser General Public 17ab7ab3d7SAndreas Färber * License along with this library; if not, see 18ab7ab3d7SAndreas Färber * <http://www.gnu.org/licenses/lgpl-2.1.html> 19ab7ab3d7SAndreas Färber */ 20ab7ab3d7SAndreas Färber #ifndef QEMU_SPARC_CPU_QOM_H 21ab7ab3d7SAndreas Färber #define QEMU_SPARC_CPU_QOM_H 22ab7ab3d7SAndreas Färber 232e5b09fdSMarkus Armbruster #include "hw/core/cpu.h" 24db1015e9SEduardo Habkost #include "qom/object.h" 25ab7ab3d7SAndreas Färber 26ab7ab3d7SAndreas Färber #ifdef TARGET_SPARC64 27ab7ab3d7SAndreas Färber #define TYPE_SPARC_CPU "sparc64-cpu" 28ab7ab3d7SAndreas Färber #else 29ab7ab3d7SAndreas Färber #define TYPE_SPARC_CPU "sparc-cpu" 30ab7ab3d7SAndreas Färber #endif 31ab7ab3d7SAndreas Färber 329295b1aaSPhilippe Mathieu-Daudé OBJECT_DECLARE_CPU_TYPE(SPARCCPU, SPARCCPUClass, SPARC_CPU) 33ab7ab3d7SAndreas Färber 34*2d56be5aSPhilippe Mathieu-Daudé #define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU 35*2d56be5aSPhilippe Mathieu-Daudé #define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX 36*2d56be5aSPhilippe Mathieu-Daudé 3712a6c15eSIgor Mammedov typedef struct sparc_def_t sparc_def_t; 38ab7ab3d7SAndreas Färber /** 39ab7ab3d7SAndreas Färber * SPARCCPUClass: 40b6e91ebfSAndreas Färber * @parent_realize: The parent class' realize handler. 413b4fff1bSPeter Maydell * @parent_phases: The parent class' reset phase handlers. 42ab7ab3d7SAndreas Färber * 43ab7ab3d7SAndreas Färber * A SPARC CPU model. 44ab7ab3d7SAndreas Färber */ 45db1015e9SEduardo Habkost struct SPARCCPUClass { 46ab7ab3d7SAndreas Färber CPUClass parent_class; 47ab7ab3d7SAndreas Färber 48b6e91ebfSAndreas Färber DeviceRealize parent_realize; 493b4fff1bSPeter Maydell ResettablePhases parent_phases; 5012a6c15eSIgor Mammedov sparc_def_t *cpu_def; 51db1015e9SEduardo Habkost }; 52ab7ab3d7SAndreas Färber 5397a8ea5aSAndreas Färber 54ab7ab3d7SAndreas Färber #endif 55