174433bf0SRichard Henderson /* 274433bf0SRichard Henderson * SH4 cpu parameters for qemu. 374433bf0SRichard Henderson * 474433bf0SRichard Henderson * Copyright (c) 2005 Samuel Tardieu 574433bf0SRichard Henderson * SPDX-License-Identifier: LGPL-2.0+ 674433bf0SRichard Henderson */ 774433bf0SRichard Henderson 874433bf0SRichard Henderson #ifndef SH4_CPU_PARAM_H 9*4f31b54bSMarkus Armbruster #define SH4_CPU_PARAM_H 1074433bf0SRichard Henderson 1174433bf0SRichard Henderson #define TARGET_LONG_BITS 32 1274433bf0SRichard Henderson #define TARGET_PAGE_BITS 12 /* 4k */ 1374433bf0SRichard Henderson #define TARGET_PHYS_ADDR_SPACE_BITS 32 1474433bf0SRichard Henderson #ifdef CONFIG_USER_ONLY 1574433bf0SRichard Henderson # define TARGET_VIRT_ADDR_SPACE_BITS 31 1674433bf0SRichard Henderson #else 1774433bf0SRichard Henderson # define TARGET_VIRT_ADDR_SPACE_BITS 32 1874433bf0SRichard Henderson #endif 1974433bf0SRichard Henderson #define NB_MMU_MODES 2 2074433bf0SRichard Henderson 2174433bf0SRichard Henderson #endif 22