xref: /qemu/target/s390x/tcg/fpu_helper.c (revision 2b91240f95fdb9acfa35ccac6cda2a42a16ac7f2)
1e72ca652SBlue Swirl /*
2e72ca652SBlue Swirl  *  S/390 FPU helper routines
3e72ca652SBlue Swirl  *
4e72ca652SBlue Swirl  *  Copyright (c) 2009 Ulrich Hecht
5e72ca652SBlue Swirl  *  Copyright (c) 2009 Alexander Graf
6e72ca652SBlue Swirl  *
7e72ca652SBlue Swirl  * This library is free software; you can redistribute it and/or
8e72ca652SBlue Swirl  * modify it under the terms of the GNU Lesser General Public
9e72ca652SBlue Swirl  * License as published by the Free Software Foundation; either
1041c6a6ddSThomas Huth  * version 2.1 of the License, or (at your option) any later version.
11e72ca652SBlue Swirl  *
12e72ca652SBlue Swirl  * This library is distributed in the hope that it will be useful,
13e72ca652SBlue Swirl  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14e72ca652SBlue Swirl  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15e72ca652SBlue Swirl  * Lesser General Public License for more details.
16e72ca652SBlue Swirl  *
17e72ca652SBlue Swirl  * You should have received a copy of the GNU Lesser General Public
18e72ca652SBlue Swirl  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19e72ca652SBlue Swirl  */
20e72ca652SBlue Swirl 
219615495aSPeter Maydell #include "qemu/osdep.h"
22e72ca652SBlue Swirl #include "cpu.h"
23b6b47223SCho, Yu-Chen #include "s390x-internal.h"
24bbf6ea3bSDavid Hildenbrand #include "tcg_s390x.h"
2563c91552SPaolo Bonzini #include "exec/exec-all.h"
26f08b6170SPaolo Bonzini #include "exec/cpu_ldst.h"
272ef6175aSRichard Henderson #include "exec/helper-proto.h"
2824f91e81SAlex Bennée #include "fpu/softfloat.h"
29e72ca652SBlue Swirl 
30e72ca652SBlue Swirl /* #define DEBUG_HELPER */
31e72ca652SBlue Swirl #ifdef DEBUG_HELPER
32e72ca652SBlue Swirl #define HELPER_LOG(x...) qemu_log(x)
33e72ca652SBlue Swirl #else
34e72ca652SBlue Swirl #define HELPER_LOG(x...)
35e72ca652SBlue Swirl #endif
36e72ca652SBlue Swirl 
37ee5e866fSRichard Henderson static inline Int128 RET128(float128 f)
38ee5e866fSRichard Henderson {
39ee5e866fSRichard Henderson     return int128_make128(f.low, f.high);
40ee5e866fSRichard Henderson }
41587626f8SRichard Henderson 
42*2b91240fSRichard Henderson static inline float128 ARG128(Int128 i)
43*2b91240fSRichard Henderson {
44*2b91240fSRichard Henderson     return make_float128(int128_gethi(i), int128_getlo(i));
45*2b91240fSRichard Henderson }
46*2b91240fSRichard Henderson 
474b70fc54SDavid Hildenbrand uint8_t s390_softfloat_exc_to_ieee(unsigned int exc)
484b70fc54SDavid Hildenbrand {
494b70fc54SDavid Hildenbrand     uint8_t s390_exc = 0;
504b70fc54SDavid Hildenbrand 
514b70fc54SDavid Hildenbrand     s390_exc |= (exc & float_flag_invalid) ? S390_IEEE_MASK_INVALID : 0;
524b70fc54SDavid Hildenbrand     s390_exc |= (exc & float_flag_divbyzero) ? S390_IEEE_MASK_DIVBYZERO : 0;
534b70fc54SDavid Hildenbrand     s390_exc |= (exc & float_flag_overflow) ? S390_IEEE_MASK_OVERFLOW : 0;
544b70fc54SDavid Hildenbrand     s390_exc |= (exc & float_flag_underflow) ? S390_IEEE_MASK_UNDERFLOW : 0;
554b70fc54SDavid Hildenbrand     s390_exc |= (exc & float_flag_inexact) ? S390_IEEE_MASK_INEXACT : 0;
564b70fc54SDavid Hildenbrand 
574b70fc54SDavid Hildenbrand     return s390_exc;
584b70fc54SDavid Hildenbrand }
59587626f8SRichard Henderson 
60587626f8SRichard Henderson /* Should be called after any operation that may raise IEEE exceptions.  */
61cf97f9ffSDavid Hildenbrand static void handle_exceptions(CPUS390XState *env, bool XxC, uintptr_t retaddr)
62587626f8SRichard Henderson {
63587626f8SRichard Henderson     unsigned s390_exc, qemu_exc;
64587626f8SRichard Henderson 
65587626f8SRichard Henderson     /* Get the exceptions raised by the current operation.  Reset the
66587626f8SRichard Henderson        fpu_status contents so that the next operation has a clean slate.  */
67587626f8SRichard Henderson     qemu_exc = env->fpu_status.float_exception_flags;
68587626f8SRichard Henderson     if (qemu_exc == 0) {
69587626f8SRichard Henderson         return;
70587626f8SRichard Henderson     }
71587626f8SRichard Henderson     env->fpu_status.float_exception_flags = 0;
724b70fc54SDavid Hildenbrand     s390_exc = s390_softfloat_exc_to_ieee(qemu_exc);
73587626f8SRichard Henderson 
74fcb9e9f2SDavid Hildenbrand     /*
756d6ad1d1SDavid Hildenbrand      * IEEE-Underflow exception recognition exists if a tininess condition
766d6ad1d1SDavid Hildenbrand      * (underflow) exists and
776d6ad1d1SDavid Hildenbrand      * - The mask bit in the FPC is zero and the result is inexact
786d6ad1d1SDavid Hildenbrand      * - The mask bit in the FPC is one
796d6ad1d1SDavid Hildenbrand      * So tininess conditions that are not inexact don't trigger any
806d6ad1d1SDavid Hildenbrand      * underflow action in case the mask bit is not one.
816d6ad1d1SDavid Hildenbrand      */
826d6ad1d1SDavid Hildenbrand     if (!(s390_exc & S390_IEEE_MASK_INEXACT) &&
836d6ad1d1SDavid Hildenbrand         !((env->fpc >> 24) & S390_IEEE_MASK_UNDERFLOW)) {
846d6ad1d1SDavid Hildenbrand         s390_exc &= ~S390_IEEE_MASK_UNDERFLOW;
856d6ad1d1SDavid Hildenbrand     }
866d6ad1d1SDavid Hildenbrand 
876d6ad1d1SDavid Hildenbrand     /*
88fcb9e9f2SDavid Hildenbrand      * FIXME:
89fcb9e9f2SDavid Hildenbrand      * 1. Right now, all inexact conditions are inidicated as
90fcb9e9f2SDavid Hildenbrand      *    "truncated" (0) and never as "incremented" (1) in the DXC.
91fcb9e9f2SDavid Hildenbrand      * 2. Only traps due to invalid/divbyzero are suppressing. Other traps
92fcb9e9f2SDavid Hildenbrand      *    are completing, meaning the target register has to be written!
93fcb9e9f2SDavid Hildenbrand      *    This, however will mean that we have to write the register before
94fcb9e9f2SDavid Hildenbrand      *    triggering the trap - impossible right now.
95fcb9e9f2SDavid Hildenbrand      */
96587626f8SRichard Henderson 
97fcb9e9f2SDavid Hildenbrand     /*
98fcb9e9f2SDavid Hildenbrand      * invalid/divbyzero cannot coexist with other conditions.
99fcb9e9f2SDavid Hildenbrand      * overflow/underflow however can coexist with inexact, we have to
10044ee69eaSThomas Huth      * handle it separately.
101fcb9e9f2SDavid Hildenbrand      */
102fcb9e9f2SDavid Hildenbrand     if (s390_exc & ~S390_IEEE_MASK_INEXACT) {
103fcb9e9f2SDavid Hildenbrand         if (s390_exc & ~S390_IEEE_MASK_INEXACT & env->fpc >> 24) {
104fcb9e9f2SDavid Hildenbrand             /* trap condition - inexact reported along */
105bbf6ea3bSDavid Hildenbrand             tcg_s390_data_exception(env, s390_exc, retaddr);
106587626f8SRichard Henderson         }
107fcb9e9f2SDavid Hildenbrand         /* nontrap condition - inexact handled differently */
108fcb9e9f2SDavid Hildenbrand         env->fpc |= (s390_exc & ~S390_IEEE_MASK_INEXACT) << 16;
109fcb9e9f2SDavid Hildenbrand     }
110fcb9e9f2SDavid Hildenbrand 
111fcb9e9f2SDavid Hildenbrand     /* inexact handling */
112cf97f9ffSDavid Hildenbrand     if (s390_exc & S390_IEEE_MASK_INEXACT && !XxC) {
113fcb9e9f2SDavid Hildenbrand         /* trap condition - overflow/underflow _not_ reported along */
114fcb9e9f2SDavid Hildenbrand         if (s390_exc & S390_IEEE_MASK_INEXACT & env->fpc >> 24) {
115fcb9e9f2SDavid Hildenbrand             tcg_s390_data_exception(env, s390_exc & S390_IEEE_MASK_INEXACT,
116fcb9e9f2SDavid Hildenbrand                                     retaddr);
117fcb9e9f2SDavid Hildenbrand         }
118fcb9e9f2SDavid Hildenbrand         /* nontrap condition */
119fcb9e9f2SDavid Hildenbrand         env->fpc |= (s390_exc & S390_IEEE_MASK_INEXACT) << 16;
120fcb9e9f2SDavid Hildenbrand     }
121587626f8SRichard Henderson }
122587626f8SRichard Henderson 
12371bfd65cSRichard Henderson int float_comp_to_cc(CPUS390XState *env, FloatRelation float_compare)
124e72ca652SBlue Swirl {
125e72ca652SBlue Swirl     switch (float_compare) {
126e72ca652SBlue Swirl     case float_relation_equal:
127e72ca652SBlue Swirl         return 0;
128e72ca652SBlue Swirl     case float_relation_less:
129e72ca652SBlue Swirl         return 1;
130e72ca652SBlue Swirl     case float_relation_greater:
131e72ca652SBlue Swirl         return 2;
132e72ca652SBlue Swirl     case float_relation_unordered:
133e72ca652SBlue Swirl         return 3;
134e72ca652SBlue Swirl     default:
135dc79e928SRichard Henderson         cpu_abort(env_cpu(env), "unknown return value for float compare\n");
136e72ca652SBlue Swirl     }
137e72ca652SBlue Swirl }
138e72ca652SBlue Swirl 
139e72ca652SBlue Swirl /* condition codes for unary FP ops */
140e72ca652SBlue Swirl uint32_t set_cc_nz_f32(float32 v)
141e72ca652SBlue Swirl {
142e72ca652SBlue Swirl     if (float32_is_any_nan(v)) {
143e72ca652SBlue Swirl         return 3;
144e72ca652SBlue Swirl     } else if (float32_is_zero(v)) {
145e72ca652SBlue Swirl         return 0;
146e72ca652SBlue Swirl     } else if (float32_is_neg(v)) {
147e72ca652SBlue Swirl         return 1;
148e72ca652SBlue Swirl     } else {
149e72ca652SBlue Swirl         return 2;
150e72ca652SBlue Swirl     }
151e72ca652SBlue Swirl }
152e72ca652SBlue Swirl 
153e72ca652SBlue Swirl uint32_t set_cc_nz_f64(float64 v)
154e72ca652SBlue Swirl {
155e72ca652SBlue Swirl     if (float64_is_any_nan(v)) {
156e72ca652SBlue Swirl         return 3;
157e72ca652SBlue Swirl     } else if (float64_is_zero(v)) {
158e72ca652SBlue Swirl         return 0;
159e72ca652SBlue Swirl     } else if (float64_is_neg(v)) {
160e72ca652SBlue Swirl         return 1;
161e72ca652SBlue Swirl     } else {
162e72ca652SBlue Swirl         return 2;
163e72ca652SBlue Swirl     }
164e72ca652SBlue Swirl }
165e72ca652SBlue Swirl 
166587626f8SRichard Henderson uint32_t set_cc_nz_f128(float128 v)
167e72ca652SBlue Swirl {
168e72ca652SBlue Swirl     if (float128_is_any_nan(v)) {
169e72ca652SBlue Swirl         return 3;
170e72ca652SBlue Swirl     } else if (float128_is_zero(v)) {
171e72ca652SBlue Swirl         return 0;
172e72ca652SBlue Swirl     } else if (float128_is_neg(v)) {
173e72ca652SBlue Swirl         return 1;
174e72ca652SBlue Swirl     } else {
175e72ca652SBlue Swirl         return 2;
176e72ca652SBlue Swirl     }
177e72ca652SBlue Swirl }
178e72ca652SBlue Swirl 
17928761057SUlrich Weigand /* condition codes for FP to integer conversion ops */
18028761057SUlrich Weigand static uint32_t set_cc_conv_f32(float32 v, float_status *stat)
18128761057SUlrich Weigand {
18228761057SUlrich Weigand     if (stat->float_exception_flags & float_flag_invalid) {
18328761057SUlrich Weigand         return 3;
18428761057SUlrich Weigand     } else {
18528761057SUlrich Weigand         return set_cc_nz_f32(v);
18628761057SUlrich Weigand     }
18728761057SUlrich Weigand }
18828761057SUlrich Weigand 
18928761057SUlrich Weigand static uint32_t set_cc_conv_f64(float64 v, float_status *stat)
19028761057SUlrich Weigand {
19128761057SUlrich Weigand     if (stat->float_exception_flags & float_flag_invalid) {
19228761057SUlrich Weigand         return 3;
19328761057SUlrich Weigand     } else {
19428761057SUlrich Weigand         return set_cc_nz_f64(v);
19528761057SUlrich Weigand     }
19628761057SUlrich Weigand }
19728761057SUlrich Weigand 
19828761057SUlrich Weigand static uint32_t set_cc_conv_f128(float128 v, float_status *stat)
19928761057SUlrich Weigand {
20028761057SUlrich Weigand     if (stat->float_exception_flags & float_flag_invalid) {
20128761057SUlrich Weigand         return 3;
20228761057SUlrich Weigand     } else {
20328761057SUlrich Weigand         return set_cc_nz_f128(v);
20428761057SUlrich Weigand     }
20528761057SUlrich Weigand }
20628761057SUlrich Weigand 
207dce0a58fSDavid Hildenbrand static inline uint8_t round_from_m34(uint32_t m34)
208dce0a58fSDavid Hildenbrand {
209dce0a58fSDavid Hildenbrand     return extract32(m34, 0, 4);
210dce0a58fSDavid Hildenbrand }
211dce0a58fSDavid Hildenbrand 
212dce0a58fSDavid Hildenbrand static inline bool xxc_from_m34(uint32_t m34)
213dce0a58fSDavid Hildenbrand {
214dce0a58fSDavid Hildenbrand     /* XxC is bit 1 of m4 */
215dce0a58fSDavid Hildenbrand     return extract32(m34, 4 + 3 - 1, 1);
216dce0a58fSDavid Hildenbrand }
217dce0a58fSDavid Hildenbrand 
218587626f8SRichard Henderson /* 32-bit FP addition */
219587626f8SRichard Henderson uint64_t HELPER(aeb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
220e72ca652SBlue Swirl {
221587626f8SRichard Henderson     float32 ret = float32_add(f1, f2, &env->fpu_status);
222cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
223587626f8SRichard Henderson     return ret;
224e72ca652SBlue Swirl }
225e72ca652SBlue Swirl 
226587626f8SRichard Henderson /* 64-bit FP addition */
227587626f8SRichard Henderson uint64_t HELPER(adb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
228e72ca652SBlue Swirl {
229587626f8SRichard Henderson     float64 ret = float64_add(f1, f2, &env->fpu_status);
230cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
231587626f8SRichard Henderson     return ret;
232587626f8SRichard Henderson }
233e72ca652SBlue Swirl 
234587626f8SRichard Henderson /* 128-bit FP addition */
235*2b91240fSRichard Henderson Int128 HELPER(axb)(CPUS390XState *env, Int128 a, Int128 b)
236587626f8SRichard Henderson {
237*2b91240fSRichard Henderson     float128 ret = float128_add(ARG128(a), ARG128(b), &env->fpu_status);
238cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
239587626f8SRichard Henderson     return RET128(ret);
240e72ca652SBlue Swirl }
241e72ca652SBlue Swirl 
2421a800a2dSRichard Henderson /* 32-bit FP subtraction */
2431a800a2dSRichard Henderson uint64_t HELPER(seb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
244e72ca652SBlue Swirl {
2451a800a2dSRichard Henderson     float32 ret = float32_sub(f1, f2, &env->fpu_status);
246cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
2471a800a2dSRichard Henderson     return ret;
248e72ca652SBlue Swirl }
249e72ca652SBlue Swirl 
2501a800a2dSRichard Henderson /* 64-bit FP subtraction */
2511a800a2dSRichard Henderson uint64_t HELPER(sdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
252e72ca652SBlue Swirl {
2531a800a2dSRichard Henderson     float64 ret = float64_sub(f1, f2, &env->fpu_status);
254cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
2551a800a2dSRichard Henderson     return ret;
2561a800a2dSRichard Henderson }
257e72ca652SBlue Swirl 
2581a800a2dSRichard Henderson /* 128-bit FP subtraction */
259*2b91240fSRichard Henderson Int128 HELPER(sxb)(CPUS390XState *env, Int128 a, Int128 b)
2601a800a2dSRichard Henderson {
261*2b91240fSRichard Henderson     float128 ret = float128_sub(ARG128(a), ARG128(b), &env->fpu_status);
262cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
2631a800a2dSRichard Henderson     return RET128(ret);
264e72ca652SBlue Swirl }
265e72ca652SBlue Swirl 
266f08a5c31SRichard Henderson /* 32-bit FP division */
267f08a5c31SRichard Henderson uint64_t HELPER(deb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
268e72ca652SBlue Swirl {
269f08a5c31SRichard Henderson     float32 ret = float32_div(f1, f2, &env->fpu_status);
270cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
271f08a5c31SRichard Henderson     return ret;
272e72ca652SBlue Swirl }
273e72ca652SBlue Swirl 
274f08a5c31SRichard Henderson /* 64-bit FP division */
275f08a5c31SRichard Henderson uint64_t HELPER(ddb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
276e72ca652SBlue Swirl {
277f08a5c31SRichard Henderson     float64 ret = float64_div(f1, f2, &env->fpu_status);
278cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
279f08a5c31SRichard Henderson     return ret;
280f08a5c31SRichard Henderson }
281e72ca652SBlue Swirl 
282f08a5c31SRichard Henderson /* 128-bit FP division */
283*2b91240fSRichard Henderson Int128 HELPER(dxb)(CPUS390XState *env, Int128 a, Int128 b)
284f08a5c31SRichard Henderson {
285*2b91240fSRichard Henderson     float128 ret = float128_div(ARG128(a), ARG128(b), &env->fpu_status);
286cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
287f08a5c31SRichard Henderson     return RET128(ret);
288e72ca652SBlue Swirl }
289e72ca652SBlue Swirl 
29083b00736SRichard Henderson /* 32-bit FP multiplication */
29183b00736SRichard Henderson uint64_t HELPER(meeb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
292e72ca652SBlue Swirl {
29383b00736SRichard Henderson     float32 ret = float32_mul(f1, f2, &env->fpu_status);
294cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
29583b00736SRichard Henderson     return ret;
296e72ca652SBlue Swirl }
297e72ca652SBlue Swirl 
29883b00736SRichard Henderson /* 64-bit FP multiplication */
29983b00736SRichard Henderson uint64_t HELPER(mdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
300e72ca652SBlue Swirl {
30183b00736SRichard Henderson     float64 ret = float64_mul(f1, f2, &env->fpu_status);
302cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
30383b00736SRichard Henderson     return ret;
30483b00736SRichard Henderson }
305e72ca652SBlue Swirl 
30683b00736SRichard Henderson /* 64/32-bit FP multiplication */
30783b00736SRichard Henderson uint64_t HELPER(mdeb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
30883b00736SRichard Henderson {
30983b00736SRichard Henderson     float64 ret = float32_to_float64(f2, &env->fpu_status);
31083b00736SRichard Henderson     ret = float64_mul(f1, ret, &env->fpu_status);
311cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
31283b00736SRichard Henderson     return ret;
31383b00736SRichard Henderson }
31483b00736SRichard Henderson 
31583b00736SRichard Henderson /* 128-bit FP multiplication */
316*2b91240fSRichard Henderson Int128 HELPER(mxb)(CPUS390XState *env, Int128 a, Int128 b)
31783b00736SRichard Henderson {
318*2b91240fSRichard Henderson     float128 ret = float128_mul(ARG128(a), ARG128(b), &env->fpu_status);
319cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
32083b00736SRichard Henderson     return RET128(ret);
32183b00736SRichard Henderson }
32283b00736SRichard Henderson 
32383b00736SRichard Henderson /* 128/64-bit FP multiplication */
324*2b91240fSRichard Henderson Int128 HELPER(mxdb)(CPUS390XState *env, Int128 a, uint64_t f2)
32583b00736SRichard Henderson {
32683b00736SRichard Henderson     float128 ret = float64_to_float128(f2, &env->fpu_status);
327*2b91240fSRichard Henderson     ret = float128_mul(ARG128(a), ret, &env->fpu_status);
328cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
32983b00736SRichard Henderson     return RET128(ret);
330e72ca652SBlue Swirl }
331e72ca652SBlue Swirl 
332e72ca652SBlue Swirl /* convert 32-bit float to 64-bit float */
333587626f8SRichard Henderson uint64_t HELPER(ldeb)(CPUS390XState *env, uint64_t f2)
334e72ca652SBlue Swirl {
335587626f8SRichard Henderson     float64 ret = float32_to_float64(f2, &env->fpu_status);
336cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
337d0cfecb5SRichard Henderson     return ret;
338e72ca652SBlue Swirl }
339e72ca652SBlue Swirl 
340e72ca652SBlue Swirl /* convert 128-bit float to 64-bit float */
341*2b91240fSRichard Henderson uint64_t HELPER(ldxb)(CPUS390XState *env, Int128 a, uint32_t m34)
342e72ca652SBlue Swirl {
343bdcfcd44SDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
344*2b91240fSRichard Henderson     float64 ret = float128_to_float64(ARG128(a), &env->fpu_status);
345bdcfcd44SDavid Hildenbrand 
346bdcfcd44SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
347bdcfcd44SDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
348d0cfecb5SRichard Henderson     return ret;
349e72ca652SBlue Swirl }
350e72ca652SBlue Swirl 
351e72ca652SBlue Swirl /* convert 64-bit float to 128-bit float */
352ee5e866fSRichard Henderson Int128 HELPER(lxdb)(CPUS390XState *env, uint64_t f2)
353e72ca652SBlue Swirl {
354587626f8SRichard Henderson     float128 ret = float64_to_float128(f2, &env->fpu_status);
355cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
356d0cfecb5SRichard Henderson     return RET128(ret);
357587626f8SRichard Henderson }
358e72ca652SBlue Swirl 
359587626f8SRichard Henderson /* convert 32-bit float to 128-bit float */
360ee5e866fSRichard Henderson Int128 HELPER(lxeb)(CPUS390XState *env, uint64_t f2)
361587626f8SRichard Henderson {
362587626f8SRichard Henderson     float128 ret = float32_to_float128(f2, &env->fpu_status);
363cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
364d0cfecb5SRichard Henderson     return RET128(ret);
365e72ca652SBlue Swirl }
366e72ca652SBlue Swirl 
367e72ca652SBlue Swirl /* convert 64-bit float to 32-bit float */
368bdcfcd44SDavid Hildenbrand uint64_t HELPER(ledb)(CPUS390XState *env, uint64_t f2, uint32_t m34)
369e72ca652SBlue Swirl {
370bdcfcd44SDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
371587626f8SRichard Henderson     float32 ret = float64_to_float32(f2, &env->fpu_status);
372bdcfcd44SDavid Hildenbrand 
373bdcfcd44SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
374bdcfcd44SDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
375d0cfecb5SRichard Henderson     return ret;
376e72ca652SBlue Swirl }
377e72ca652SBlue Swirl 
378e72ca652SBlue Swirl /* convert 128-bit float to 32-bit float */
379*2b91240fSRichard Henderson uint64_t HELPER(lexb)(CPUS390XState *env, Int128 a, uint32_t m34)
380e72ca652SBlue Swirl {
381bdcfcd44SDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
382*2b91240fSRichard Henderson     float32 ret = float128_to_float32(ARG128(a), &env->fpu_status);
383bdcfcd44SDavid Hildenbrand 
384bdcfcd44SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
385bdcfcd44SDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
386d0cfecb5SRichard Henderson     return ret;
387e72ca652SBlue Swirl }
388e72ca652SBlue Swirl 
389587626f8SRichard Henderson /* 32-bit FP compare */
390587626f8SRichard Henderson uint32_t HELPER(ceb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
391e72ca652SBlue Swirl {
39271bfd65cSRichard Henderson     FloatRelation cmp = float32_compare_quiet(f1, f2, &env->fpu_status);
393cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
394587626f8SRichard Henderson     return float_comp_to_cc(env, cmp);
395e72ca652SBlue Swirl }
396e72ca652SBlue Swirl 
397587626f8SRichard Henderson /* 64-bit FP compare */
398587626f8SRichard Henderson uint32_t HELPER(cdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
399e72ca652SBlue Swirl {
40071bfd65cSRichard Henderson     FloatRelation cmp = float64_compare_quiet(f1, f2, &env->fpu_status);
401cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
402587626f8SRichard Henderson     return float_comp_to_cc(env, cmp);
403e72ca652SBlue Swirl }
404e72ca652SBlue Swirl 
405587626f8SRichard Henderson /* 128-bit FP compare */
406*2b91240fSRichard Henderson uint32_t HELPER(cxb)(CPUS390XState *env, Int128 a, Int128 b)
407e72ca652SBlue Swirl {
408*2b91240fSRichard Henderson     FloatRelation cmp = float128_compare_quiet(ARG128(a), ARG128(b),
409587626f8SRichard Henderson                                                &env->fpu_status);
410cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
411587626f8SRichard Henderson     return float_comp_to_cc(env, cmp);
412e72ca652SBlue Swirl }
413e72ca652SBlue Swirl 
414c0ee7015SDavid Hildenbrand int s390_swap_bfp_rounding_mode(CPUS390XState *env, int m3)
415e72ca652SBlue Swirl {
41668c8bd93SRichard Henderson     int ret = env->fpu_status.float_rounding_mode;
417b12b103eSDavid Hildenbrand 
418e72ca652SBlue Swirl     switch (m3) {
419e72ca652SBlue Swirl     case 0:
420e72ca652SBlue Swirl         /* current mode */
421e72ca652SBlue Swirl         break;
422e72ca652SBlue Swirl     case 1:
423b12b103eSDavid Hildenbrand         /* round to nearest with ties away from 0 */
424b12b103eSDavid Hildenbrand         set_float_rounding_mode(float_round_ties_away, &env->fpu_status);
425b12b103eSDavid Hildenbrand         break;
426b12b103eSDavid Hildenbrand     case 3:
427b12b103eSDavid Hildenbrand         /* round to prepare for shorter precision */
428b12b103eSDavid Hildenbrand         set_float_rounding_mode(float_round_to_odd, &env->fpu_status);
429b12b103eSDavid Hildenbrand         break;
430e72ca652SBlue Swirl     case 4:
431b12b103eSDavid Hildenbrand         /* round to nearest with ties to even */
432e72ca652SBlue Swirl         set_float_rounding_mode(float_round_nearest_even, &env->fpu_status);
433e72ca652SBlue Swirl         break;
434e72ca652SBlue Swirl     case 5:
435e72ca652SBlue Swirl         /* round to zero */
436e72ca652SBlue Swirl         set_float_rounding_mode(float_round_to_zero, &env->fpu_status);
437e72ca652SBlue Swirl         break;
438e72ca652SBlue Swirl     case 6:
439e72ca652SBlue Swirl         /* round to +inf */
440e72ca652SBlue Swirl         set_float_rounding_mode(float_round_up, &env->fpu_status);
441e72ca652SBlue Swirl         break;
442e72ca652SBlue Swirl     case 7:
443e72ca652SBlue Swirl         /* round to -inf */
444e72ca652SBlue Swirl         set_float_rounding_mode(float_round_down, &env->fpu_status);
445e72ca652SBlue Swirl         break;
446b12b103eSDavid Hildenbrand     default:
447b12b103eSDavid Hildenbrand         g_assert_not_reached();
448e72ca652SBlue Swirl     }
44968c8bd93SRichard Henderson     return ret;
450e72ca652SBlue Swirl }
451e72ca652SBlue Swirl 
452c0ee7015SDavid Hildenbrand void s390_restore_bfp_rounding_mode(CPUS390XState *env, int old_mode)
453c0ee7015SDavid Hildenbrand {
454c0ee7015SDavid Hildenbrand     set_float_rounding_mode(old_mode, &env->fpu_status);
455c0ee7015SDavid Hildenbrand }
456c0ee7015SDavid Hildenbrand 
457683bb9a8SRichard Henderson /* convert 64-bit int to 32-bit float */
458dce0a58fSDavid Hildenbrand uint64_t HELPER(cegb)(CPUS390XState *env, int64_t v2, uint32_t m34)
459683bb9a8SRichard Henderson {
460dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
461683bb9a8SRichard Henderson     float32 ret = int64_to_float32(v2, &env->fpu_status);
462c0ee7015SDavid Hildenbrand 
463c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
464dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
465683bb9a8SRichard Henderson     return ret;
466683bb9a8SRichard Henderson }
467683bb9a8SRichard Henderson 
468683bb9a8SRichard Henderson /* convert 64-bit int to 64-bit float */
469dce0a58fSDavid Hildenbrand uint64_t HELPER(cdgb)(CPUS390XState *env, int64_t v2, uint32_t m34)
470683bb9a8SRichard Henderson {
471dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
472683bb9a8SRichard Henderson     float64 ret = int64_to_float64(v2, &env->fpu_status);
473c0ee7015SDavid Hildenbrand 
474c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
475dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
476683bb9a8SRichard Henderson     return ret;
477683bb9a8SRichard Henderson }
478683bb9a8SRichard Henderson 
479683bb9a8SRichard Henderson /* convert 64-bit int to 128-bit float */
480ee5e866fSRichard Henderson Int128 HELPER(cxgb)(CPUS390XState *env, int64_t v2, uint32_t m34)
481683bb9a8SRichard Henderson {
482dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
483683bb9a8SRichard Henderson     float128 ret = int64_to_float128(v2, &env->fpu_status);
484c0ee7015SDavid Hildenbrand 
485c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
486dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
487683bb9a8SRichard Henderson     return RET128(ret);
488683bb9a8SRichard Henderson }
489683bb9a8SRichard Henderson 
4902112bf1bSRichard Henderson /* convert 64-bit uint to 32-bit float */
491dce0a58fSDavid Hildenbrand uint64_t HELPER(celgb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
4922112bf1bSRichard Henderson {
493dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
4942112bf1bSRichard Henderson     float32 ret = uint64_to_float32(v2, &env->fpu_status);
495c0ee7015SDavid Hildenbrand 
496c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
497dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
4982112bf1bSRichard Henderson     return ret;
4992112bf1bSRichard Henderson }
5002112bf1bSRichard Henderson 
5012112bf1bSRichard Henderson /* convert 64-bit uint to 64-bit float */
502dce0a58fSDavid Hildenbrand uint64_t HELPER(cdlgb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
5032112bf1bSRichard Henderson {
504dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
5052112bf1bSRichard Henderson     float64 ret = uint64_to_float64(v2, &env->fpu_status);
506c0ee7015SDavid Hildenbrand 
507c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
508dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
5092112bf1bSRichard Henderson     return ret;
5102112bf1bSRichard Henderson }
5112112bf1bSRichard Henderson 
5122112bf1bSRichard Henderson /* convert 64-bit uint to 128-bit float */
513ee5e866fSRichard Henderson Int128 HELPER(cxlgb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
5142112bf1bSRichard Henderson {
515dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
516d2d9feacSRichard Henderson     float128 ret = uint64_to_float128(v2, &env->fpu_status);
517c0ee7015SDavid Hildenbrand 
518c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
519dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
5202112bf1bSRichard Henderson     return RET128(ret);
5212112bf1bSRichard Henderson }
5222112bf1bSRichard Henderson 
523e72ca652SBlue Swirl /* convert 32-bit float to 64-bit int */
524dce0a58fSDavid Hildenbrand uint64_t HELPER(cgeb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
525e72ca652SBlue Swirl {
526dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
52768c8bd93SRichard Henderson     int64_t ret = float32_to_int64(v2, &env->fpu_status);
52828761057SUlrich Weigand     uint32_t cc = set_cc_conv_f32(v2, &env->fpu_status);
529c0ee7015SDavid Hildenbrand 
530c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
531dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
53228761057SUlrich Weigand     env->cc_op = cc;
5330a3be7beSDavid Hildenbrand     if (float32_is_any_nan(v2)) {
5340a3be7beSDavid Hildenbrand         return INT64_MIN;
5350a3be7beSDavid Hildenbrand     }
53668c8bd93SRichard Henderson     return ret;
537e72ca652SBlue Swirl }
538e72ca652SBlue Swirl 
539e72ca652SBlue Swirl /* convert 64-bit float to 64-bit int */
540dce0a58fSDavid Hildenbrand uint64_t HELPER(cgdb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
541e72ca652SBlue Swirl {
542dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
54368c8bd93SRichard Henderson     int64_t ret = float64_to_int64(v2, &env->fpu_status);
54428761057SUlrich Weigand     uint32_t cc = set_cc_conv_f64(v2, &env->fpu_status);
545c0ee7015SDavid Hildenbrand 
546c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
547dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
54828761057SUlrich Weigand     env->cc_op = cc;
5490a3be7beSDavid Hildenbrand     if (float64_is_any_nan(v2)) {
5500a3be7beSDavid Hildenbrand         return INT64_MIN;
5510a3be7beSDavid Hildenbrand     }
55268c8bd93SRichard Henderson     return ret;
553e72ca652SBlue Swirl }
554e72ca652SBlue Swirl 
555e72ca652SBlue Swirl /* convert 128-bit float to 64-bit int */
556*2b91240fSRichard Henderson uint64_t HELPER(cgxb)(CPUS390XState *env, Int128 i2, uint32_t m34)
557e72ca652SBlue Swirl {
558dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
559*2b91240fSRichard Henderson     float128 v2 = ARG128(i2);
56068c8bd93SRichard Henderson     int64_t ret = float128_to_int64(v2, &env->fpu_status);
56128761057SUlrich Weigand     uint32_t cc = set_cc_conv_f128(v2, &env->fpu_status);
562c0ee7015SDavid Hildenbrand 
563c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
564dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
56528761057SUlrich Weigand     env->cc_op = cc;
5660a3be7beSDavid Hildenbrand     if (float128_is_any_nan(v2)) {
5670a3be7beSDavid Hildenbrand         return INT64_MIN;
5680a3be7beSDavid Hildenbrand     }
56968c8bd93SRichard Henderson     return ret;
570e72ca652SBlue Swirl }
571e72ca652SBlue Swirl 
572e72ca652SBlue Swirl /* convert 32-bit float to 32-bit int */
573dce0a58fSDavid Hildenbrand uint64_t HELPER(cfeb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
574e72ca652SBlue Swirl {
575dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
57668c8bd93SRichard Henderson     int32_t ret = float32_to_int32(v2, &env->fpu_status);
57728761057SUlrich Weigand     uint32_t cc = set_cc_conv_f32(v2, &env->fpu_status);
578c0ee7015SDavid Hildenbrand 
579c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
580dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
58128761057SUlrich Weigand     env->cc_op = cc;
5820a3be7beSDavid Hildenbrand     if (float32_is_any_nan(v2)) {
5830a3be7beSDavid Hildenbrand         return INT32_MIN;
5840a3be7beSDavid Hildenbrand     }
58568c8bd93SRichard Henderson     return ret;
586e72ca652SBlue Swirl }
587e72ca652SBlue Swirl 
588e72ca652SBlue Swirl /* convert 64-bit float to 32-bit int */
589dce0a58fSDavid Hildenbrand uint64_t HELPER(cfdb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
590e72ca652SBlue Swirl {
591dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
59268c8bd93SRichard Henderson     int32_t ret = float64_to_int32(v2, &env->fpu_status);
59328761057SUlrich Weigand     uint32_t cc = set_cc_conv_f64(v2, &env->fpu_status);
594c0ee7015SDavid Hildenbrand 
595c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
596dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
59728761057SUlrich Weigand     env->cc_op = cc;
5980a3be7beSDavid Hildenbrand     if (float64_is_any_nan(v2)) {
5990a3be7beSDavid Hildenbrand         return INT32_MIN;
6000a3be7beSDavid Hildenbrand     }
60168c8bd93SRichard Henderson     return ret;
602e72ca652SBlue Swirl }
603e72ca652SBlue Swirl 
604e72ca652SBlue Swirl /* convert 128-bit float to 32-bit int */
605*2b91240fSRichard Henderson uint64_t HELPER(cfxb)(CPUS390XState *env, Int128 i2, uint32_t m34)
606e72ca652SBlue Swirl {
607dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
608*2b91240fSRichard Henderson     float128 v2 = ARG128(i2);
60968c8bd93SRichard Henderson     int32_t ret = float128_to_int32(v2, &env->fpu_status);
61028761057SUlrich Weigand     uint32_t cc = set_cc_conv_f128(v2, &env->fpu_status);
611c0ee7015SDavid Hildenbrand 
612c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
613dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
61428761057SUlrich Weigand     env->cc_op = cc;
6150a3be7beSDavid Hildenbrand     if (float128_is_any_nan(v2)) {
6160a3be7beSDavid Hildenbrand         return INT32_MIN;
6170a3be7beSDavid Hildenbrand     }
61868c8bd93SRichard Henderson     return ret;
619e72ca652SBlue Swirl }
620e72ca652SBlue Swirl 
6216ac1b45fSRichard Henderson /* convert 32-bit float to 64-bit uint */
622dce0a58fSDavid Hildenbrand uint64_t HELPER(clgeb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
6236ac1b45fSRichard Henderson {
624dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
6250a3be7beSDavid Hildenbrand     uint64_t ret = float32_to_uint64(v2, &env->fpu_status);
62628761057SUlrich Weigand     uint32_t cc = set_cc_conv_f32(v2, &env->fpu_status);
62728761057SUlrich Weigand 
628c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
629dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
63028761057SUlrich Weigand     env->cc_op = cc;
6310a3be7beSDavid Hildenbrand     if (float32_is_any_nan(v2)) {
6320a3be7beSDavid Hildenbrand         return 0;
6330a3be7beSDavid Hildenbrand     }
6346ac1b45fSRichard Henderson     return ret;
6356ac1b45fSRichard Henderson }
6366ac1b45fSRichard Henderson 
6376ac1b45fSRichard Henderson /* convert 64-bit float to 64-bit uint */
638dce0a58fSDavid Hildenbrand uint64_t HELPER(clgdb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
6396ac1b45fSRichard Henderson {
640dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
6416ac1b45fSRichard Henderson     uint64_t ret = float64_to_uint64(v2, &env->fpu_status);
64228761057SUlrich Weigand     uint32_t cc = set_cc_conv_f64(v2, &env->fpu_status);
643c0ee7015SDavid Hildenbrand 
644c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
645dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
64628761057SUlrich Weigand     env->cc_op = cc;
6470a3be7beSDavid Hildenbrand     if (float64_is_any_nan(v2)) {
6480a3be7beSDavid Hildenbrand         return 0;
6490a3be7beSDavid Hildenbrand     }
6506ac1b45fSRichard Henderson     return ret;
6516ac1b45fSRichard Henderson }
6526ac1b45fSRichard Henderson 
6536ac1b45fSRichard Henderson /* convert 128-bit float to 64-bit uint */
654*2b91240fSRichard Henderson uint64_t HELPER(clgxb)(CPUS390XState *env, Int128 i2, uint32_t m34)
6556ac1b45fSRichard Henderson {
656dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
657*2b91240fSRichard Henderson     float128 v2 = ARG128(i2);
65828761057SUlrich Weigand     uint64_t ret = float128_to_uint64(v2, &env->fpu_status);
65928761057SUlrich Weigand     uint32_t cc = set_cc_conv_f128(v2, &env->fpu_status);
660c0ee7015SDavid Hildenbrand 
661c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
662dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
66328761057SUlrich Weigand     env->cc_op = cc;
66428761057SUlrich Weigand     if (float128_is_any_nan(v2)) {
6650a3be7beSDavid Hildenbrand         return 0;
6660a3be7beSDavid Hildenbrand     }
6676ac1b45fSRichard Henderson     return ret;
6686ac1b45fSRichard Henderson }
6696ac1b45fSRichard Henderson 
6706ac1b45fSRichard Henderson /* convert 32-bit float to 32-bit uint */
671dce0a58fSDavid Hildenbrand uint64_t HELPER(clfeb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
6726ac1b45fSRichard Henderson {
673dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
6746ac1b45fSRichard Henderson     uint32_t ret = float32_to_uint32(v2, &env->fpu_status);
67528761057SUlrich Weigand     uint32_t cc = set_cc_conv_f32(v2, &env->fpu_status);
676c0ee7015SDavid Hildenbrand 
677c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
678dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
67928761057SUlrich Weigand     env->cc_op = cc;
6800a3be7beSDavid Hildenbrand     if (float32_is_any_nan(v2)) {
6810a3be7beSDavid Hildenbrand         return 0;
6820a3be7beSDavid Hildenbrand     }
6836ac1b45fSRichard Henderson     return ret;
6846ac1b45fSRichard Henderson }
6856ac1b45fSRichard Henderson 
6866ac1b45fSRichard Henderson /* convert 64-bit float to 32-bit uint */
687dce0a58fSDavid Hildenbrand uint64_t HELPER(clfdb)(CPUS390XState *env, uint64_t v2, uint32_t m34)
6886ac1b45fSRichard Henderson {
689dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
6906ac1b45fSRichard Henderson     uint32_t ret = float64_to_uint32(v2, &env->fpu_status);
69128761057SUlrich Weigand     uint32_t cc = set_cc_conv_f64(v2, &env->fpu_status);
692c0ee7015SDavid Hildenbrand 
693c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
694dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
69528761057SUlrich Weigand     env->cc_op = cc;
6960a3be7beSDavid Hildenbrand     if (float64_is_any_nan(v2)) {
6970a3be7beSDavid Hildenbrand         return 0;
6980a3be7beSDavid Hildenbrand     }
6996ac1b45fSRichard Henderson     return ret;
7006ac1b45fSRichard Henderson }
7016ac1b45fSRichard Henderson 
7026ac1b45fSRichard Henderson /* convert 128-bit float to 32-bit uint */
703*2b91240fSRichard Henderson uint64_t HELPER(clfxb)(CPUS390XState *env, Int128 i2, uint32_t m34)
7046ac1b45fSRichard Henderson {
705dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
706*2b91240fSRichard Henderson     float128 v2 = ARG128(i2);
70728761057SUlrich Weigand     uint32_t ret = float128_to_uint32(v2, &env->fpu_status);
70828761057SUlrich Weigand     uint32_t cc = set_cc_conv_f128(v2, &env->fpu_status);
709c0ee7015SDavid Hildenbrand 
710c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
711dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
71228761057SUlrich Weigand     env->cc_op = cc;
71328761057SUlrich Weigand     if (float128_is_any_nan(v2)) {
7140a3be7beSDavid Hildenbrand         return 0;
7150a3be7beSDavid Hildenbrand     }
7166ac1b45fSRichard Henderson     return ret;
7176ac1b45fSRichard Henderson }
7186ac1b45fSRichard Henderson 
719ed0bceceSAurelien Jarno /* round to integer 32-bit */
720dce0a58fSDavid Hildenbrand uint64_t HELPER(fieb)(CPUS390XState *env, uint64_t f2, uint32_t m34)
721ed0bceceSAurelien Jarno {
722dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
723ed0bceceSAurelien Jarno     float32 ret = float32_round_to_int(f2, &env->fpu_status);
724c0ee7015SDavid Hildenbrand 
725c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
726dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
727ed0bceceSAurelien Jarno     return ret;
728ed0bceceSAurelien Jarno }
729ed0bceceSAurelien Jarno 
730ed0bceceSAurelien Jarno /* round to integer 64-bit */
731dce0a58fSDavid Hildenbrand uint64_t HELPER(fidb)(CPUS390XState *env, uint64_t f2, uint32_t m34)
732ed0bceceSAurelien Jarno {
733dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
734ed0bceceSAurelien Jarno     float64 ret = float64_round_to_int(f2, &env->fpu_status);
735c0ee7015SDavid Hildenbrand 
736c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
737dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
738ed0bceceSAurelien Jarno     return ret;
739ed0bceceSAurelien Jarno }
740ed0bceceSAurelien Jarno 
741ed0bceceSAurelien Jarno /* round to integer 128-bit */
742*2b91240fSRichard Henderson Int128 HELPER(fixb)(CPUS390XState *env, Int128 a, uint32_t m34)
743ed0bceceSAurelien Jarno {
744dce0a58fSDavid Hildenbrand     int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34));
745*2b91240fSRichard Henderson     float128 ret = float128_round_to_int(ARG128(a), &env->fpu_status);
746cf97f9ffSDavid Hildenbrand 
747c0ee7015SDavid Hildenbrand     s390_restore_bfp_rounding_mode(env, old_mode);
748dce0a58fSDavid Hildenbrand     handle_exceptions(env, xxc_from_m34(m34), GETPC());
749ed0bceceSAurelien Jarno     return RET128(ret);
750ed0bceceSAurelien Jarno }
751ed0bceceSAurelien Jarno 
7529c8be598SAurelien Jarno /* 32-bit FP compare and signal */
7539c8be598SAurelien Jarno uint32_t HELPER(keb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
7549c8be598SAurelien Jarno {
75571bfd65cSRichard Henderson     FloatRelation cmp = float32_compare(f1, f2, &env->fpu_status);
756cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
7579c8be598SAurelien Jarno     return float_comp_to_cc(env, cmp);
7589c8be598SAurelien Jarno }
7599c8be598SAurelien Jarno 
7609c8be598SAurelien Jarno /* 64-bit FP compare and signal */
7619c8be598SAurelien Jarno uint32_t HELPER(kdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
7629c8be598SAurelien Jarno {
76371bfd65cSRichard Henderson     FloatRelation cmp = float64_compare(f1, f2, &env->fpu_status);
764cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
7659c8be598SAurelien Jarno     return float_comp_to_cc(env, cmp);
7669c8be598SAurelien Jarno }
7679c8be598SAurelien Jarno 
7689c8be598SAurelien Jarno /* 128-bit FP compare and signal */
769*2b91240fSRichard Henderson uint32_t HELPER(kxb)(CPUS390XState *env, Int128 a, Int128 b)
7709c8be598SAurelien Jarno {
771*2b91240fSRichard Henderson     FloatRelation cmp = float128_compare(ARG128(a), ARG128(b),
7729c8be598SAurelien Jarno                                          &env->fpu_status);
773cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
7749c8be598SAurelien Jarno     return float_comp_to_cc(env, cmp);
7759c8be598SAurelien Jarno }
7769c8be598SAurelien Jarno 
777722bfec3SRichard Henderson /* 32-bit FP multiply and add */
778722bfec3SRichard Henderson uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1,
779722bfec3SRichard Henderson                       uint64_t f2, uint64_t f3)
780e72ca652SBlue Swirl {
781722bfec3SRichard Henderson     float32 ret = float32_muladd(f2, f3, f1, 0, &env->fpu_status);
782cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
783722bfec3SRichard Henderson     return ret;
784722bfec3SRichard Henderson }
785e72ca652SBlue Swirl 
786722bfec3SRichard Henderson /* 64-bit FP multiply and add */
787722bfec3SRichard Henderson uint64_t HELPER(madb)(CPUS390XState *env, uint64_t f1,
788722bfec3SRichard Henderson                       uint64_t f2, uint64_t f3)
789722bfec3SRichard Henderson {
790722bfec3SRichard Henderson     float64 ret = float64_muladd(f2, f3, f1, 0, &env->fpu_status);
791cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
792722bfec3SRichard Henderson     return ret;
793722bfec3SRichard Henderson }
794722bfec3SRichard Henderson 
795722bfec3SRichard Henderson /* 32-bit FP multiply and subtract */
796722bfec3SRichard Henderson uint64_t HELPER(mseb)(CPUS390XState *env, uint64_t f1,
797722bfec3SRichard Henderson                       uint64_t f2, uint64_t f3)
798722bfec3SRichard Henderson {
799722bfec3SRichard Henderson     float32 ret = float32_muladd(f2, f3, f1, float_muladd_negate_c,
800e72ca652SBlue Swirl                                  &env->fpu_status);
801cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
802722bfec3SRichard Henderson     return ret;
803e72ca652SBlue Swirl }
804e72ca652SBlue Swirl 
805722bfec3SRichard Henderson /* 64-bit FP multiply and subtract */
806722bfec3SRichard Henderson uint64_t HELPER(msdb)(CPUS390XState *env, uint64_t f1,
807722bfec3SRichard Henderson                       uint64_t f2, uint64_t f3)
808e72ca652SBlue Swirl {
809722bfec3SRichard Henderson     float64 ret = float64_muladd(f2, f3, f1, float_muladd_negate_c,
810e72ca652SBlue Swirl                                  &env->fpu_status);
811cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
812722bfec3SRichard Henderson     return ret;
813e72ca652SBlue Swirl }
814e72ca652SBlue Swirl 
815fc7cc951SDavid Hildenbrand /* The rightmost bit has the number 11. */
816fc7cc951SDavid Hildenbrand static inline uint16_t dcmask(int bit, bool neg)
817fc7cc951SDavid Hildenbrand {
818fc7cc951SDavid Hildenbrand     return 1 << (11 - bit - neg);
819fc7cc951SDavid Hildenbrand }
820fc7cc951SDavid Hildenbrand 
821fc7cc951SDavid Hildenbrand #define DEF_FLOAT_DCMASK(_TYPE) \
822aae65009SDavid Hildenbrand uint16_t _TYPE##_dcmask(CPUS390XState *env, _TYPE f1)              \
823fc7cc951SDavid Hildenbrand {                                                                  \
824fc7cc951SDavid Hildenbrand     const bool neg = _TYPE##_is_neg(f1);                           \
825fc7cc951SDavid Hildenbrand                                                                    \
826fc7cc951SDavid Hildenbrand     /* Sorted by most common cases - only one class is possible */ \
827fc7cc951SDavid Hildenbrand     if (_TYPE##_is_normal(f1)) {                                   \
828fc7cc951SDavid Hildenbrand         return dcmask(2, neg);                                     \
829fc7cc951SDavid Hildenbrand     } else if (_TYPE##_is_zero(f1)) {                              \
830fc7cc951SDavid Hildenbrand         return dcmask(0, neg);                                     \
831fc7cc951SDavid Hildenbrand     } else if (_TYPE##_is_denormal(f1)) {                          \
832fc7cc951SDavid Hildenbrand         return dcmask(4, neg);                                     \
833fc7cc951SDavid Hildenbrand     } else if (_TYPE##_is_infinity(f1)) {                          \
834fc7cc951SDavid Hildenbrand         return dcmask(6, neg);                                     \
835fc7cc951SDavid Hildenbrand     } else if (_TYPE##_is_quiet_nan(f1, &env->fpu_status)) {       \
836fc7cc951SDavid Hildenbrand         return dcmask(8, neg);                                     \
837fc7cc951SDavid Hildenbrand     }                                                              \
838fc7cc951SDavid Hildenbrand     /* signaling nan, as last remaining case */                    \
839fc7cc951SDavid Hildenbrand     return dcmask(10, neg);                                        \
840fc7cc951SDavid Hildenbrand }
841fc7cc951SDavid Hildenbrand DEF_FLOAT_DCMASK(float32)
842fc7cc951SDavid Hildenbrand DEF_FLOAT_DCMASK(float64)
843fc7cc951SDavid Hildenbrand DEF_FLOAT_DCMASK(float128)
844fc7cc951SDavid Hildenbrand 
845e72ca652SBlue Swirl /* test data class 32-bit */
846af39bc8cSAleksandar Markovic uint32_t HELPER(tceb)(CPUS390XState *env, uint64_t f1, uint64_t m2)
847e72ca652SBlue Swirl {
848fc7cc951SDavid Hildenbrand     return (m2 & float32_dcmask(env, f1)) != 0;
849e72ca652SBlue Swirl }
850e72ca652SBlue Swirl 
851e72ca652SBlue Swirl /* test data class 64-bit */
852af39bc8cSAleksandar Markovic uint32_t HELPER(tcdb)(CPUS390XState *env, uint64_t v1, uint64_t m2)
853e72ca652SBlue Swirl {
854fc7cc951SDavid Hildenbrand     return (m2 & float64_dcmask(env, v1)) != 0;
855e72ca652SBlue Swirl }
856e72ca652SBlue Swirl 
857e72ca652SBlue Swirl /* test data class 128-bit */
858*2b91240fSRichard Henderson uint32_t HELPER(tcxb)(CPUS390XState *env, Int128 a, uint64_t m2)
859e72ca652SBlue Swirl {
860*2b91240fSRichard Henderson     return (m2 & float128_dcmask(env, ARG128(a))) != 0;
861e72ca652SBlue Swirl }
862e72ca652SBlue Swirl 
86316d7b2a4SRichard Henderson /* square root 32-bit */
86416d7b2a4SRichard Henderson uint64_t HELPER(sqeb)(CPUS390XState *env, uint64_t f2)
865e72ca652SBlue Swirl {
86616d7b2a4SRichard Henderson     float32 ret = float32_sqrt(f2, &env->fpu_status);
867cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
86816d7b2a4SRichard Henderson     return ret;
86916d7b2a4SRichard Henderson }
87016d7b2a4SRichard Henderson 
87116d7b2a4SRichard Henderson /* square root 64-bit */
87216d7b2a4SRichard Henderson uint64_t HELPER(sqdb)(CPUS390XState *env, uint64_t f2)
87316d7b2a4SRichard Henderson {
87416d7b2a4SRichard Henderson     float64 ret = float64_sqrt(f2, &env->fpu_status);
875cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
87616d7b2a4SRichard Henderson     return ret;
87716d7b2a4SRichard Henderson }
87816d7b2a4SRichard Henderson 
87916d7b2a4SRichard Henderson /* square root 128-bit */
880*2b91240fSRichard Henderson Int128 HELPER(sqxb)(CPUS390XState *env, Int128 a)
88116d7b2a4SRichard Henderson {
882*2b91240fSRichard Henderson     float128 ret = float128_sqrt(ARG128(a), &env->fpu_status);
883cf97f9ffSDavid Hildenbrand     handle_exceptions(env, false, GETPC());
88416d7b2a4SRichard Henderson     return RET128(ret);
885e72ca652SBlue Swirl }
8868379bfdbSRichard Henderson 
8872aea83c6SDavid Hildenbrand static const int fpc_to_rnd[8] = {
8888379bfdbSRichard Henderson     float_round_nearest_even,
8898379bfdbSRichard Henderson     float_round_to_zero,
8908379bfdbSRichard Henderson     float_round_up,
8912aea83c6SDavid Hildenbrand     float_round_down,
8922aea83c6SDavid Hildenbrand     -1,
8932aea83c6SDavid Hildenbrand     -1,
8942aea83c6SDavid Hildenbrand     -1,
8952aea83c6SDavid Hildenbrand     float_round_to_odd,
8968379bfdbSRichard Henderson };
8978379bfdbSRichard Henderson 
898411edc22SRichard Henderson /* set fpc */
899411edc22SRichard Henderson void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc)
900411edc22SRichard Henderson {
9012aea83c6SDavid Hildenbrand     if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u ||
9022aea83c6SDavid Hildenbrand         (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) {
9031e36aee6SRichard Henderson         tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC());
9042aea83c6SDavid Hildenbrand     }
9052aea83c6SDavid Hildenbrand 
9068379bfdbSRichard Henderson     /* Install everything in the main FPC.  */
9078379bfdbSRichard Henderson     env->fpc = fpc;
9088379bfdbSRichard Henderson 
9098379bfdbSRichard Henderson     /* Install the rounding mode in the shadow fpu_status.  */
9102aea83c6SDavid Hildenbrand     set_float_rounding_mode(fpc_to_rnd[fpc & 0x7], &env->fpu_status);
911411edc22SRichard Henderson }
912411edc22SRichard Henderson 
913411edc22SRichard Henderson /* set fpc and signal */
914f66a0ecfSDavid Hildenbrand void HELPER(sfas)(CPUS390XState *env, uint64_t fpc)
915411edc22SRichard Henderson {
916411edc22SRichard Henderson     uint32_t signalling = env->fpc;
917411edc22SRichard Henderson     uint32_t s390_exc;
918411edc22SRichard Henderson 
9192aea83c6SDavid Hildenbrand     if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u ||
9202aea83c6SDavid Hildenbrand         (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) {
9211e36aee6SRichard Henderson         tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC());
9222aea83c6SDavid Hildenbrand     }
9232aea83c6SDavid Hildenbrand 
924f66a0ecfSDavid Hildenbrand     /*
925f66a0ecfSDavid Hildenbrand      * FPC is set to the FPC operand with a bitwise OR of the signalling
926f66a0ecfSDavid Hildenbrand      * flags.
927f66a0ecfSDavid Hildenbrand      */
928f66a0ecfSDavid Hildenbrand     env->fpc = fpc | (signalling & 0x00ff0000);
9292aea83c6SDavid Hildenbrand     set_float_rounding_mode(fpc_to_rnd[fpc & 0x7], &env->fpu_status);
930411edc22SRichard Henderson 
931f66a0ecfSDavid Hildenbrand     /*
932f66a0ecfSDavid Hildenbrand      * If any signaling flag is enabled in the new FPC mask, a
933f66a0ecfSDavid Hildenbrand      * simulated-iee-exception exception occurs.
934f66a0ecfSDavid Hildenbrand      */
935f66a0ecfSDavid Hildenbrand     s390_exc = (signalling >> 16) & (fpc >> 24);
936411edc22SRichard Henderson     if (s390_exc) {
9378772bbe4SDavid Hildenbrand         if (s390_exc & S390_IEEE_MASK_INVALID) {
9388772bbe4SDavid Hildenbrand             s390_exc = S390_IEEE_MASK_INVALID;
9398772bbe4SDavid Hildenbrand         } else if (s390_exc & S390_IEEE_MASK_DIVBYZERO) {
9408772bbe4SDavid Hildenbrand             s390_exc = S390_IEEE_MASK_DIVBYZERO;
9418772bbe4SDavid Hildenbrand         } else if (s390_exc & S390_IEEE_MASK_OVERFLOW) {
9428772bbe4SDavid Hildenbrand             s390_exc &= (S390_IEEE_MASK_OVERFLOW | S390_IEEE_MASK_INEXACT);
9438772bbe4SDavid Hildenbrand         } else if (s390_exc & S390_IEEE_MASK_UNDERFLOW) {
9448772bbe4SDavid Hildenbrand             s390_exc &= (S390_IEEE_MASK_UNDERFLOW | S390_IEEE_MASK_INEXACT);
9458772bbe4SDavid Hildenbrand         } else if (s390_exc & S390_IEEE_MASK_INEXACT) {
9468772bbe4SDavid Hildenbrand             s390_exc = S390_IEEE_MASK_INEXACT;
9478772bbe4SDavid Hildenbrand         } else if (s390_exc & S390_IEEE_MASK_QUANTUM) {
9488772bbe4SDavid Hildenbrand             s390_exc = S390_IEEE_MASK_QUANTUM;
9498772bbe4SDavid Hildenbrand         }
950bbf6ea3bSDavid Hildenbrand         tcg_s390_data_exception(env, s390_exc | 3, GETPC());
951411edc22SRichard Henderson     }
9528379bfdbSRichard Henderson }
953b9c737f5SDavid Hildenbrand 
954b9c737f5SDavid Hildenbrand /* set bfp rounding mode */
955b9c737f5SDavid Hildenbrand void HELPER(srnm)(CPUS390XState *env, uint64_t rnd)
956b9c737f5SDavid Hildenbrand {
957b9c737f5SDavid Hildenbrand     if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) {
9581e36aee6SRichard Henderson         tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC());
959b9c737f5SDavid Hildenbrand     }
960b9c737f5SDavid Hildenbrand 
961b9c737f5SDavid Hildenbrand     env->fpc = deposit32(env->fpc, 0, 3, rnd);
962b9c737f5SDavid Hildenbrand     set_float_rounding_mode(fpc_to_rnd[rnd & 0x7], &env->fpu_status);
963b9c737f5SDavid Hildenbrand }
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