1*3780e337SAtish Patra /* 2*3780e337SAtish Patra * RISC-V PMU header file. 3*3780e337SAtish Patra * 4*3780e337SAtish Patra * Copyright (c) 2021 Western Digital Corporation or its affiliates. 5*3780e337SAtish Patra * 6*3780e337SAtish Patra * This program is free software; you can redistribute it and/or modify it 7*3780e337SAtish Patra * under the terms and conditions of the GNU General Public License, 8*3780e337SAtish Patra * version 2 or later, as published by the Free Software Foundation. 9*3780e337SAtish Patra * 10*3780e337SAtish Patra * This program is distributed in the hope it will be useful, but WITHOUT 11*3780e337SAtish Patra * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12*3780e337SAtish Patra * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13*3780e337SAtish Patra * more details. 14*3780e337SAtish Patra * 15*3780e337SAtish Patra * You should have received a copy of the GNU General Public License along with 16*3780e337SAtish Patra * this program. If not, see <http://www.gnu.org/licenses/>. 17*3780e337SAtish Patra */ 18*3780e337SAtish Patra 19*3780e337SAtish Patra #include "qemu/osdep.h" 20*3780e337SAtish Patra #include "qemu/log.h" 21*3780e337SAtish Patra #include "cpu.h" 22*3780e337SAtish Patra #include "qemu/main-loop.h" 23*3780e337SAtish Patra #include "exec/exec-all.h" 24*3780e337SAtish Patra 25*3780e337SAtish Patra bool riscv_pmu_ctr_monitor_instructions(CPURISCVState *env, 26*3780e337SAtish Patra uint32_t target_ctr); 27*3780e337SAtish Patra bool riscv_pmu_ctr_monitor_cycles(CPURISCVState *env, 28*3780e337SAtish Patra uint32_t target_ctr); 29