xref: /qemu/target/riscv/internals.h (revision 9fc08be626a96ae1ac0cffb22f30ae652c1c645a)
1f476f177SLIU Zhiwei /*
2f476f177SLIU Zhiwei  * QEMU RISC-V CPU -- internal functions and types
3f476f177SLIU Zhiwei  *
4f476f177SLIU Zhiwei  * Copyright (c) 2020 T-Head Semiconductor Co., Ltd. All rights reserved.
5f476f177SLIU Zhiwei  *
6f476f177SLIU Zhiwei  * This program is free software; you can redistribute it and/or modify it
7f476f177SLIU Zhiwei  * under the terms and conditions of the GNU General Public License,
8f476f177SLIU Zhiwei  * version 2 or later, as published by the Free Software Foundation.
9f476f177SLIU Zhiwei  *
10f476f177SLIU Zhiwei  * This program is distributed in the hope it will be useful, but WITHOUT
11f476f177SLIU Zhiwei  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12f476f177SLIU Zhiwei  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13f476f177SLIU Zhiwei  * more details.
14f476f177SLIU Zhiwei  *
15f476f177SLIU Zhiwei  * You should have received a copy of the GNU General Public License along with
16f476f177SLIU Zhiwei  * this program.  If not, see <http://www.gnu.org/licenses/>.
17f476f177SLIU Zhiwei  */
18f476f177SLIU Zhiwei 
19f476f177SLIU Zhiwei #ifndef RISCV_CPU_INTERNALS_H
20f476f177SLIU Zhiwei #define RISCV_CPU_INTERNALS_H
21f476f177SLIU Zhiwei 
22f476f177SLIU Zhiwei #include "hw/registerfields.h"
23f476f177SLIU Zhiwei 
24751538d5SLIU Zhiwei /* share data between vector helpers and decode code */
25751538d5SLIU Zhiwei FIELD(VDATA, MLEN, 0, 8)
26751538d5SLIU Zhiwei FIELD(VDATA, VM, 8, 1)
27751538d5SLIU Zhiwei FIELD(VDATA, LMUL, 9, 2)
28751538d5SLIU Zhiwei FIELD(VDATA, NF, 11, 4)
29268fcca6SLIU Zhiwei FIELD(VDATA, WD, 11, 1)
30121ddbb3SLIU Zhiwei 
31121ddbb3SLIU Zhiwei /* float point classify helpers */
32121ddbb3SLIU Zhiwei target_ulong fclass_h(uint64_t frs1);
33121ddbb3SLIU Zhiwei target_ulong fclass_s(uint64_t frs1);
34121ddbb3SLIU Zhiwei target_ulong fclass_d(uint64_t frs1);
35*9fc08be6SLIU Zhiwei 
36*9fc08be6SLIU Zhiwei #define SEW8  0
37*9fc08be6SLIU Zhiwei #define SEW16 1
38*9fc08be6SLIU Zhiwei #define SEW32 2
39*9fc08be6SLIU Zhiwei #define SEW64 3
40*9fc08be6SLIU Zhiwei 
41f476f177SLIU Zhiwei #endif
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