1f476f177SLIU Zhiwei /* 2f476f177SLIU Zhiwei * QEMU RISC-V CPU -- internal functions and types 3f476f177SLIU Zhiwei * 4f476f177SLIU Zhiwei * Copyright (c) 2020 T-Head Semiconductor Co., Ltd. All rights reserved. 5f476f177SLIU Zhiwei * 6f476f177SLIU Zhiwei * This program is free software; you can redistribute it and/or modify it 7f476f177SLIU Zhiwei * under the terms and conditions of the GNU General Public License, 8f476f177SLIU Zhiwei * version 2 or later, as published by the Free Software Foundation. 9f476f177SLIU Zhiwei * 10f476f177SLIU Zhiwei * This program is distributed in the hope it will be useful, but WITHOUT 11f476f177SLIU Zhiwei * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12f476f177SLIU Zhiwei * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13f476f177SLIU Zhiwei * more details. 14f476f177SLIU Zhiwei * 15f476f177SLIU Zhiwei * You should have received a copy of the GNU General Public License along with 16f476f177SLIU Zhiwei * this program. If not, see <http://www.gnu.org/licenses/>. 17f476f177SLIU Zhiwei */ 18f476f177SLIU Zhiwei 19f476f177SLIU Zhiwei #ifndef RISCV_CPU_INTERNALS_H 20f476f177SLIU Zhiwei #define RISCV_CPU_INTERNALS_H 21f476f177SLIU Zhiwei 22f476f177SLIU Zhiwei #include "hw/registerfields.h" 23f476f177SLIU Zhiwei 24751538d5SLIU Zhiwei /* share data between vector helpers and decode code */ 25f9298de5SFrank Chang FIELD(VDATA, VM, 0, 1) 26f9298de5SFrank Chang FIELD(VDATA, LMUL, 1, 3) 27f9298de5SFrank Chang FIELD(VDATA, NF, 4, 4) 28f9298de5SFrank Chang FIELD(VDATA, WD, 4, 1) 29121ddbb3SLIU Zhiwei 30121ddbb3SLIU Zhiwei /* float point classify helpers */ 31121ddbb3SLIU Zhiwei target_ulong fclass_h(uint64_t frs1); 32121ddbb3SLIU Zhiwei target_ulong fclass_s(uint64_t frs1); 33121ddbb3SLIU Zhiwei target_ulong fclass_d(uint64_t frs1); 349fc08be6SLIU Zhiwei 35f7697f0eSYifei Jiang #ifndef CONFIG_USER_ONLY 36f7697f0eSYifei Jiang extern const VMStateDescription vmstate_riscv_cpu; 37f7697f0eSYifei Jiang #endif 38f7697f0eSYifei Jiang 39*986c895dSFrank Chang enum { 40*986c895dSFrank Chang RISCV_FRM_RNE = 0, /* Round to Nearest, ties to Even */ 41*986c895dSFrank Chang RISCV_FRM_RTZ = 1, /* Round towards Zero */ 42*986c895dSFrank Chang RISCV_FRM_RDN = 2, /* Round Down */ 43*986c895dSFrank Chang RISCV_FRM_RUP = 3, /* Round Up */ 44*986c895dSFrank Chang RISCV_FRM_RMM = 4, /* Round to Nearest, ties to Max Magnitude */ 45*986c895dSFrank Chang RISCV_FRM_DYN = 7, /* Dynamic rounding mode */ 46*986c895dSFrank Chang }; 47*986c895dSFrank Chang 489921e3d3SRichard Henderson static inline uint64_t nanbox_s(float32 f) 499921e3d3SRichard Henderson { 509921e3d3SRichard Henderson return f | MAKE_64BIT_MASK(32, 32); 519921e3d3SRichard Henderson } 529921e3d3SRichard Henderson 5300e925c5SRichard Henderson static inline float32 check_nanbox_s(uint64_t f) 5400e925c5SRichard Henderson { 5500e925c5SRichard Henderson uint64_t mask = MAKE_64BIT_MASK(32, 32); 5600e925c5SRichard Henderson 5700e925c5SRichard Henderson if (likely((f & mask) == mask)) { 5800e925c5SRichard Henderson return (uint32_t)f; 5900e925c5SRichard Henderson } else { 6000e925c5SRichard Henderson return 0x7fc00000u; /* default qnan */ 6100e925c5SRichard Henderson } 6200e925c5SRichard Henderson } 6300e925c5SRichard Henderson 6400c1899fSKito Cheng static inline uint64_t nanbox_h(float16 f) 6500c1899fSKito Cheng { 6600c1899fSKito Cheng return f | MAKE_64BIT_MASK(16, 48); 6700c1899fSKito Cheng } 6800c1899fSKito Cheng 6900c1899fSKito Cheng static inline float16 check_nanbox_h(uint64_t f) 7000c1899fSKito Cheng { 7100c1899fSKito Cheng uint64_t mask = MAKE_64BIT_MASK(16, 48); 7200c1899fSKito Cheng 7300c1899fSKito Cheng if (likely((f & mask) == mask)) { 7400c1899fSKito Cheng return (uint16_t)f; 7500c1899fSKito Cheng } else { 7600c1899fSKito Cheng return 0x7E00u; /* default qnan */ 7700c1899fSKito Cheng } 7800c1899fSKito Cheng } 7900c1899fSKito Cheng 80f476f177SLIU Zhiwei #endif 81