1 /* 2 * QEMU RISC-V CPU CFG 3 * 4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu 5 * Copyright (c) 2017-2018 SiFive, Inc. 6 * Copyright (c) 2021-2023 PLCT Lab 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms and conditions of the GNU General Public License, 10 * version 2 or later, as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program. If not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #ifndef RISCV_CPU_CFG_H 22 #define RISCV_CPU_CFG_H 23 24 /* 25 * map is a 16-bit bitmap: the most significant set bit in map is the maximum 26 * satp mode that is supported. It may be chosen by the user and must respect 27 * what qemu implements (valid_1_10_32/64) and what the hw is capable of 28 * (supported bitmap below). 29 * 30 * init is a 16-bit bitmap used to make sure the user selected a correct 31 * configuration as per the specification. 32 * 33 * supported is a 16-bit bitmap used to reflect the hw capabilities. 34 */ 35 typedef struct { 36 uint16_t map, init, supported; 37 } RISCVSATPMap; 38 39 struct RISCVCPUConfig { 40 bool ext_zba; 41 bool ext_zbb; 42 bool ext_zbc; 43 bool ext_zbkb; 44 bool ext_zbkc; 45 bool ext_zbkx; 46 bool ext_zbs; 47 bool ext_zca; 48 bool ext_zcb; 49 bool ext_zcd; 50 bool ext_zce; 51 bool ext_zcf; 52 bool ext_zcmp; 53 bool ext_zcmt; 54 bool ext_zk; 55 bool ext_zkn; 56 bool ext_zknd; 57 bool ext_zkne; 58 bool ext_zknh; 59 bool ext_zkr; 60 bool ext_zks; 61 bool ext_zksed; 62 bool ext_zksh; 63 bool ext_zkt; 64 bool ext_zifencei; 65 bool ext_zicntr; 66 bool ext_zicsr; 67 bool ext_zicbom; 68 bool ext_zicbop; 69 bool ext_zicboz; 70 bool ext_zicfilp; 71 bool ext_zicfiss; 72 bool ext_zicond; 73 bool ext_zihintntl; 74 bool ext_zihintpause; 75 bool ext_zihpm; 76 bool ext_zimop; 77 bool ext_zcmop; 78 bool ext_ztso; 79 bool ext_smstateen; 80 bool ext_sstc; 81 bool ext_smcdeleg; 82 bool ext_ssccfg; 83 bool ext_smcntrpmf; 84 bool ext_smcsrind; 85 bool ext_sscsrind; 86 bool ext_ssdbltrp; 87 bool ext_smdbltrp; 88 bool ext_svadu; 89 bool ext_svinval; 90 bool ext_svnapot; 91 bool ext_svpbmt; 92 bool ext_svvptc; 93 bool ext_svukte; 94 bool ext_zdinx; 95 bool ext_zaamo; 96 bool ext_zacas; 97 bool ext_zama16b; 98 bool ext_zabha; 99 bool ext_zalrsc; 100 bool ext_zawrs; 101 bool ext_zfa; 102 bool ext_zfbfmin; 103 bool ext_zfh; 104 bool ext_zfhmin; 105 bool ext_zfinx; 106 bool ext_zhinx; 107 bool ext_zhinxmin; 108 bool ext_zve32f; 109 bool ext_zve32x; 110 bool ext_zve64f; 111 bool ext_zve64d; 112 bool ext_zve64x; 113 bool ext_zvbb; 114 bool ext_zvbc; 115 bool ext_zvkb; 116 bool ext_zvkg; 117 bool ext_zvkned; 118 bool ext_zvknha; 119 bool ext_zvknhb; 120 bool ext_zvksed; 121 bool ext_zvksh; 122 bool ext_zvkt; 123 bool ext_zvkn; 124 bool ext_zvknc; 125 bool ext_zvkng; 126 bool ext_zvks; 127 bool ext_zvksc; 128 bool ext_zvksg; 129 bool ext_zmmul; 130 bool ext_zvfbfmin; 131 bool ext_zvfbfwma; 132 bool ext_zvfh; 133 bool ext_zvfhmin; 134 bool ext_smaia; 135 bool ext_ssaia; 136 bool ext_sscofpmf; 137 bool ext_smepmp; 138 bool ext_smrnmi; 139 bool ext_ssnpm; 140 bool ext_smnpm; 141 bool ext_smmpm; 142 bool ext_sspm; 143 bool ext_supm; 144 bool rvv_ta_all_1s; 145 bool rvv_ma_all_1s; 146 bool rvv_vl_half_avl; 147 148 uint32_t mvendorid; 149 uint64_t marchid; 150 uint64_t mimpid; 151 152 /* Named features */ 153 bool ext_svade; 154 bool ext_zic64b; 155 bool ext_ssstateen; 156 bool ext_sha; 157 158 /* 159 * Always 'true' booleans for named features 160 * TCG always implement/can't be user disabled, 161 * based on spec version. 162 */ 163 bool has_priv_1_13; 164 bool has_priv_1_12; 165 bool has_priv_1_11; 166 167 /* Vendor-specific custom extensions */ 168 bool ext_xtheadba; 169 bool ext_xtheadbb; 170 bool ext_xtheadbs; 171 bool ext_xtheadcmo; 172 bool ext_xtheadcondmov; 173 bool ext_xtheadfmemidx; 174 bool ext_xtheadfmv; 175 bool ext_xtheadmac; 176 bool ext_xtheadmemidx; 177 bool ext_xtheadmempair; 178 bool ext_xtheadsync; 179 bool ext_XVentanaCondOps; 180 181 uint32_t pmu_mask; 182 uint16_t vlenb; 183 uint16_t elen; 184 uint16_t cbom_blocksize; 185 uint16_t cbop_blocksize; 186 uint16_t cboz_blocksize; 187 bool mmu; 188 bool pmp; 189 bool debug; 190 bool misa_w; 191 192 bool short_isa_string; 193 194 #ifndef CONFIG_USER_ONLY 195 RISCVSATPMap satp_mode; 196 #endif 197 }; 198 199 typedef struct RISCVCPUConfig RISCVCPUConfig; 200 201 /* Helper functions to test for extensions. */ 202 203 static inline bool always_true_p(const RISCVCPUConfig *cfg __attribute__((__unused__))) 204 { 205 return true; 206 } 207 208 static inline bool has_xthead_p(const RISCVCPUConfig *cfg) 209 { 210 return cfg->ext_xtheadba || cfg->ext_xtheadbb || 211 cfg->ext_xtheadbs || cfg->ext_xtheadcmo || 212 cfg->ext_xtheadcondmov || 213 cfg->ext_xtheadfmemidx || cfg->ext_xtheadfmv || 214 cfg->ext_xtheadmac || cfg->ext_xtheadmemidx || 215 cfg->ext_xtheadmempair || cfg->ext_xtheadsync; 216 } 217 218 #define MATERIALISE_EXT_PREDICATE(ext) \ 219 static inline bool has_ ## ext ## _p(const RISCVCPUConfig *cfg) \ 220 { \ 221 return cfg->ext_ ## ext ; \ 222 } 223 224 MATERIALISE_EXT_PREDICATE(xtheadba) 225 MATERIALISE_EXT_PREDICATE(xtheadbb) 226 MATERIALISE_EXT_PREDICATE(xtheadbs) 227 MATERIALISE_EXT_PREDICATE(xtheadcmo) 228 MATERIALISE_EXT_PREDICATE(xtheadcondmov) 229 MATERIALISE_EXT_PREDICATE(xtheadfmemidx) 230 MATERIALISE_EXT_PREDICATE(xtheadfmv) 231 MATERIALISE_EXT_PREDICATE(xtheadmac) 232 MATERIALISE_EXT_PREDICATE(xtheadmemidx) 233 MATERIALISE_EXT_PREDICATE(xtheadmempair) 234 MATERIALISE_EXT_PREDICATE(xtheadsync) 235 MATERIALISE_EXT_PREDICATE(XVentanaCondOps) 236 237 #endif 238