1 /* 2 * QEMU RISC-V CPU CFG 3 * 4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu 5 * Copyright (c) 2017-2018 SiFive, Inc. 6 * Copyright (c) 2021-2023 PLCT Lab 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms and conditions of the GNU General Public License, 10 * version 2 or later, as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program. If not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #ifndef RISCV_CPU_CFG_H 22 #define RISCV_CPU_CFG_H 23 24 struct RISCVCPUConfig { 25 bool ext_zba; 26 bool ext_zbb; 27 bool ext_zbc; 28 bool ext_zbkb; 29 bool ext_zbkc; 30 bool ext_zbkx; 31 bool ext_zbs; 32 bool ext_zca; 33 bool ext_zcb; 34 bool ext_zcd; 35 bool ext_zce; 36 bool ext_zcf; 37 bool ext_zcmp; 38 bool ext_zcmt; 39 bool ext_zk; 40 bool ext_zkn; 41 bool ext_zknd; 42 bool ext_zkne; 43 bool ext_zknh; 44 bool ext_zkr; 45 bool ext_zks; 46 bool ext_zksed; 47 bool ext_zksh; 48 bool ext_zkt; 49 bool ext_zifencei; 50 bool ext_zicntr; 51 bool ext_zicsr; 52 bool ext_zicbom; 53 bool ext_zicbop; 54 bool ext_zicboz; 55 bool ext_zicfilp; 56 bool ext_zicfiss; 57 bool ext_zicond; 58 bool ext_zihintntl; 59 bool ext_zihintpause; 60 bool ext_zihpm; 61 bool ext_zimop; 62 bool ext_zcmop; 63 bool ext_ztso; 64 bool ext_smstateen; 65 bool ext_sstc; 66 bool ext_smcdeleg; 67 bool ext_ssccfg; 68 bool ext_smcntrpmf; 69 bool ext_smcsrind; 70 bool ext_sscsrind; 71 bool ext_ssdbltrp; 72 bool ext_smdbltrp; 73 bool ext_svadu; 74 bool ext_svinval; 75 bool ext_svnapot; 76 bool ext_svpbmt; 77 bool ext_svvptc; 78 bool ext_svukte; 79 bool ext_zdinx; 80 bool ext_zaamo; 81 bool ext_zacas; 82 bool ext_zama16b; 83 bool ext_zabha; 84 bool ext_zalrsc; 85 bool ext_zawrs; 86 bool ext_zfa; 87 bool ext_zfbfmin; 88 bool ext_zfh; 89 bool ext_zfhmin; 90 bool ext_zfinx; 91 bool ext_zhinx; 92 bool ext_zhinxmin; 93 bool ext_zve32f; 94 bool ext_zve32x; 95 bool ext_zve64f; 96 bool ext_zve64d; 97 bool ext_zve64x; 98 bool ext_zvbb; 99 bool ext_zvbc; 100 bool ext_zvkb; 101 bool ext_zvkg; 102 bool ext_zvkned; 103 bool ext_zvknha; 104 bool ext_zvknhb; 105 bool ext_zvksed; 106 bool ext_zvksh; 107 bool ext_zvkt; 108 bool ext_zvkn; 109 bool ext_zvknc; 110 bool ext_zvkng; 111 bool ext_zvks; 112 bool ext_zvksc; 113 bool ext_zvksg; 114 bool ext_zmmul; 115 bool ext_zvfbfmin; 116 bool ext_zvfbfwma; 117 bool ext_zvfh; 118 bool ext_zvfhmin; 119 bool ext_smaia; 120 bool ext_ssaia; 121 bool ext_smctr; 122 bool ext_ssctr; 123 bool ext_sscofpmf; 124 bool ext_smepmp; 125 bool ext_smrnmi; 126 bool ext_ssnpm; 127 bool ext_smnpm; 128 bool ext_smmpm; 129 bool ext_sspm; 130 bool ext_supm; 131 bool rvv_ta_all_1s; 132 bool rvv_ma_all_1s; 133 bool rvv_vl_half_avl; 134 135 uint32_t mvendorid; 136 uint64_t marchid; 137 uint64_t mimpid; 138 139 /* Named features */ 140 bool ext_svade; 141 bool ext_zic64b; 142 bool ext_ssstateen; 143 bool ext_sha; 144 145 /* 146 * Always 'true' booleans for named features 147 * TCG always implement/can't be user disabled, 148 * based on spec version. 149 */ 150 bool has_priv_1_13; 151 bool has_priv_1_12; 152 bool has_priv_1_11; 153 154 /* Always enabled for TCG if has_priv_1_11 */ 155 bool ext_ziccrse; 156 157 /* Vendor-specific custom extensions */ 158 bool ext_xtheadba; 159 bool ext_xtheadbb; 160 bool ext_xtheadbs; 161 bool ext_xtheadcmo; 162 bool ext_xtheadcondmov; 163 bool ext_xtheadfmemidx; 164 bool ext_xtheadfmv; 165 bool ext_xtheadmac; 166 bool ext_xtheadmemidx; 167 bool ext_xtheadmempair; 168 bool ext_xtheadsync; 169 bool ext_XVentanaCondOps; 170 171 uint32_t pmu_mask; 172 uint16_t vlenb; 173 uint16_t elen; 174 uint16_t cbom_blocksize; 175 uint16_t cbop_blocksize; 176 uint16_t cboz_blocksize; 177 bool mmu; 178 bool pmp; 179 bool debug; 180 bool misa_w; 181 182 bool short_isa_string; 183 184 int8_t max_satp_mode; 185 }; 186 187 typedef struct RISCVCPUConfig RISCVCPUConfig; 188 189 /* Helper functions to test for extensions. */ 190 191 static inline bool always_true_p(const RISCVCPUConfig *cfg __attribute__((__unused__))) 192 { 193 return true; 194 } 195 196 static inline bool has_xthead_p(const RISCVCPUConfig *cfg) 197 { 198 return cfg->ext_xtheadba || cfg->ext_xtheadbb || 199 cfg->ext_xtheadbs || cfg->ext_xtheadcmo || 200 cfg->ext_xtheadcondmov || 201 cfg->ext_xtheadfmemidx || cfg->ext_xtheadfmv || 202 cfg->ext_xtheadmac || cfg->ext_xtheadmemidx || 203 cfg->ext_xtheadmempair || cfg->ext_xtheadsync; 204 } 205 206 #define MATERIALISE_EXT_PREDICATE(ext) \ 207 static inline bool has_ ## ext ## _p(const RISCVCPUConfig *cfg) \ 208 { \ 209 return cfg->ext_ ## ext ; \ 210 } 211 212 MATERIALISE_EXT_PREDICATE(xtheadba) 213 MATERIALISE_EXT_PREDICATE(xtheadbb) 214 MATERIALISE_EXT_PREDICATE(xtheadbs) 215 MATERIALISE_EXT_PREDICATE(xtheadcmo) 216 MATERIALISE_EXT_PREDICATE(xtheadcondmov) 217 MATERIALISE_EXT_PREDICATE(xtheadfmemidx) 218 MATERIALISE_EXT_PREDICATE(xtheadfmv) 219 MATERIALISE_EXT_PREDICATE(xtheadmac) 220 MATERIALISE_EXT_PREDICATE(xtheadmemidx) 221 MATERIALISE_EXT_PREDICATE(xtheadmempair) 222 MATERIALISE_EXT_PREDICATE(xtheadsync) 223 MATERIALISE_EXT_PREDICATE(XVentanaCondOps) 224 225 #endif 226