1 /* 2 * PowerPC internal definitions for qemu. 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2.1 of the License, or (at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU Lesser General Public 15 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #ifndef PPC_INTERNAL_H 19 #define PPC_INTERNAL_H 20 21 #include "exec/breakpoint.h" 22 #include "hw/registerfields.h" 23 #include "exec/page-protection.h" 24 #include "accel/tcg/tb-cpu-state.h" 25 26 /* PM instructions */ 27 typedef enum { 28 PPC_PM_DOZE, 29 PPC_PM_NAP, 30 PPC_PM_SLEEP, 31 PPC_PM_RVWINKLE, 32 PPC_PM_STOP, 33 } powerpc_pm_insn_t; 34 35 #define FUNC_MASK(name, ret_type, size, max_val) \ 36 static inline ret_type name(uint##size##_t start, \ 37 uint##size##_t end) \ 38 { \ 39 ret_type ret, max_bit = size - 1; \ 40 \ 41 if (likely(start == 0)) { \ 42 ret = max_val << (max_bit - end); \ 43 } else if (likely(end == max_bit)) { \ 44 ret = max_val >> start; \ 45 } else { \ 46 ret = (((uint##size##_t)(-1ULL)) >> (start)) ^ \ 47 (((uint##size##_t)(-1ULL) >> (end)) >> 1); \ 48 if (unlikely(start > end)) { \ 49 return ~ret; \ 50 } \ 51 } \ 52 \ 53 return ret; \ 54 } 55 56 #if defined(TARGET_PPC64) 57 FUNC_MASK(MASK, target_ulong, 64, UINT64_MAX); 58 #else 59 FUNC_MASK(MASK, target_ulong, 32, UINT32_MAX); 60 #endif 61 FUNC_MASK(mask_u32, uint32_t, 32, UINT32_MAX); 62 FUNC_MASK(mask_u64, uint64_t, 64, UINT64_MAX); 63 64 /*****************************************************************************/ 65 /*** Instruction decoding ***/ 66 #define EXTRACT_HELPER(name, shift, nb) \ 67 static inline uint32_t name(uint32_t opcode) \ 68 { \ 69 return extract32(opcode, shift, nb); \ 70 } 71 72 #define EXTRACT_SHELPER(name, shift, nb) \ 73 static inline int32_t name(uint32_t opcode) \ 74 { \ 75 return sextract32(opcode, shift, nb); \ 76 } 77 78 #define EXTRACT_HELPER_SPLIT(name, shift1, nb1, shift2, nb2) \ 79 static inline uint32_t name(uint32_t opcode) \ 80 { \ 81 return extract32(opcode, shift1, nb1) << nb2 | \ 82 extract32(opcode, shift2, nb2); \ 83 } 84 85 #define EXTRACT_HELPER_SPLIT_3(name, \ 86 d0_bits, shift_op_d0, shift_d0, \ 87 d1_bits, shift_op_d1, shift_d1, \ 88 d2_bits, shift_op_d2, shift_d2) \ 89 static inline int16_t name(uint32_t opcode) \ 90 { \ 91 return \ 92 (((opcode >> (shift_op_d0)) & ((1 << (d0_bits)) - 1)) << (shift_d0)) | \ 93 (((opcode >> (shift_op_d1)) & ((1 << (d1_bits)) - 1)) << (shift_d1)) | \ 94 (((opcode >> (shift_op_d2)) & ((1 << (d2_bits)) - 1)) << (shift_d2)); \ 95 } 96 97 98 /* Opcode part 1 */ 99 EXTRACT_HELPER(opc1, 26, 6); 100 /* Opcode part 2 */ 101 EXTRACT_HELPER(opc2, 1, 5); 102 /* Opcode part 3 */ 103 EXTRACT_HELPER(opc3, 6, 5); 104 /* Opcode part 4 */ 105 EXTRACT_HELPER(opc4, 16, 5); 106 /* Update Cr0 flags */ 107 EXTRACT_HELPER(Rc, 0, 1); 108 /* Update Cr6 flags (Altivec) */ 109 EXTRACT_HELPER(Rc21, 10, 1); 110 /* Destination */ 111 EXTRACT_HELPER(rD, 21, 5); 112 /* Source */ 113 EXTRACT_HELPER(rS, 21, 5); 114 /* First operand */ 115 EXTRACT_HELPER(rA, 16, 5); 116 /* Second operand */ 117 EXTRACT_HELPER(rB, 11, 5); 118 /* Third operand */ 119 EXTRACT_HELPER(rC, 6, 5); 120 /*** Get CRn ***/ 121 EXTRACT_HELPER(crfD, 23, 3); 122 EXTRACT_HELPER(BF, 23, 3); 123 EXTRACT_HELPER(crfS, 18, 3); 124 EXTRACT_HELPER(crbD, 21, 5); 125 EXTRACT_HELPER(crbA, 16, 5); 126 EXTRACT_HELPER(crbB, 11, 5); 127 /* SPR / TBL */ 128 EXTRACT_HELPER(_SPR, 11, 10); 129 static inline uint32_t SPR(uint32_t opcode) 130 { 131 uint32_t sprn = _SPR(opcode); 132 133 return ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5); 134 } 135 /*** Get constants ***/ 136 /* 16 bits signed immediate value */ 137 EXTRACT_SHELPER(SIMM, 0, 16); 138 /* 16 bits unsigned immediate value */ 139 EXTRACT_HELPER(UIMM, 0, 16); 140 /* 5 bits signed immediate value */ 141 EXTRACT_SHELPER(SIMM5, 16, 5); 142 /* 5 bits signed immediate value */ 143 EXTRACT_HELPER(UIMM5, 16, 5); 144 /* 4 bits unsigned immediate value */ 145 EXTRACT_HELPER(UIMM4, 16, 4); 146 /* Bit count */ 147 EXTRACT_HELPER(NB, 11, 5); 148 /* Shift count */ 149 EXTRACT_HELPER(SH, 11, 5); 150 /* lwat/stwat/ldat/lwat */ 151 EXTRACT_HELPER(FC, 11, 5); 152 /* Vector shift count */ 153 EXTRACT_HELPER(VSH, 6, 4); 154 /* Mask start */ 155 EXTRACT_HELPER(MB, 6, 5); 156 /* Mask end */ 157 EXTRACT_HELPER(ME, 1, 5); 158 /* Trap operand */ 159 EXTRACT_HELPER(TO, 21, 5); 160 161 EXTRACT_HELPER(CRM, 12, 8); 162 163 #ifndef CONFIG_USER_ONLY 164 EXTRACT_HELPER(SR, 16, 4); 165 #endif 166 167 /* mtfsf/mtfsfi */ 168 EXTRACT_HELPER(FPBF, 23, 3); 169 EXTRACT_HELPER(FPIMM, 12, 4); 170 EXTRACT_HELPER(FPL, 25, 1); 171 EXTRACT_HELPER(FPFLM, 17, 8); 172 EXTRACT_HELPER(FPW, 16, 1); 173 174 /* addpcis */ 175 EXTRACT_HELPER_SPLIT_3(DX, 10, 6, 6, 5, 16, 1, 1, 0, 0) 176 #if defined(TARGET_PPC64) 177 /* darn */ 178 EXTRACT_HELPER(L, 16, 2); 179 #endif 180 /* wait */ 181 EXTRACT_HELPER(WC, 21, 2); 182 EXTRACT_HELPER(PL, 16, 2); 183 184 /*** Jump target decoding ***/ 185 /* Immediate address */ 186 static inline target_ulong LI(uint32_t opcode) 187 { 188 return (opcode >> 0) & 0x03FFFFFC; 189 } 190 191 static inline uint32_t BD(uint32_t opcode) 192 { 193 return (opcode >> 0) & 0xFFFC; 194 } 195 196 EXTRACT_HELPER(BO, 21, 5); 197 EXTRACT_HELPER(BI, 16, 5); 198 /* Absolute/relative address */ 199 EXTRACT_HELPER(AA, 1, 1); 200 /* Link */ 201 EXTRACT_HELPER(LK, 0, 1); 202 203 /* DFP Z22-form */ 204 EXTRACT_HELPER(DCM, 10, 6) 205 206 /* DFP Z23-form */ 207 EXTRACT_HELPER(RMC, 9, 2) 208 EXTRACT_HELPER(Rrm, 16, 1) 209 210 EXTRACT_HELPER_SPLIT(DQxT, 3, 1, 21, 5); 211 EXTRACT_HELPER_SPLIT(xT, 0, 1, 21, 5); 212 EXTRACT_HELPER_SPLIT(xS, 0, 1, 21, 5); 213 EXTRACT_HELPER_SPLIT(xA, 2, 1, 16, 5); 214 EXTRACT_HELPER_SPLIT(xB, 1, 1, 11, 5); 215 EXTRACT_HELPER_SPLIT(xC, 3, 1, 6, 5); 216 EXTRACT_HELPER(DM, 8, 2); 217 EXTRACT_HELPER(UIM, 16, 2); 218 EXTRACT_HELPER(SHW, 8, 2); 219 EXTRACT_HELPER(SP, 19, 2); 220 EXTRACT_HELPER(IMM8, 11, 8); 221 EXTRACT_HELPER(DCMX, 16, 7); 222 EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6); 223 224 void helper_compute_fprf_float16(CPUPPCState *env, float16 arg); 225 void helper_compute_fprf_float32(CPUPPCState *env, float32 arg); 226 void helper_compute_fprf_float128(CPUPPCState *env, float128 arg); 227 228 /* translate.c */ 229 230 int ppc_fixup_cpu(PowerPCCPU *cpu); 231 void create_ppc_opcodes(PowerPCCPU *cpu, Error **errp); 232 void destroy_ppc_opcodes(PowerPCCPU *cpu); 233 234 /* gdbstub.c */ 235 void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *ppc); 236 const gchar *ppc_gdb_arch_name(CPUState *cs); 237 238 #ifndef CONFIG_USER_ONLY 239 240 /* Check if permission bit required for the access_type is set in prot */ 241 static inline int check_prot_access_type(int prot, MMUAccessType access_type) 242 { 243 return prot & (1 << access_type); 244 } 245 246 /* PowerPC MMU emulation */ 247 248 bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type, 249 hwaddr *raddrp, int *psizep, int *protp, 250 int mmu_idx, bool guest_visible); 251 252 /* Software driven TLB helpers */ 253 int ppc6xx_tlb_getnum(CPUPPCState *env, target_ulong eaddr, 254 int way, int is_code); 255 256 #endif /* !CONFIG_USER_ONLY */ 257 258 /* Common routines used by software and hardware TLBs emulation */ 259 static inline int pte_is_valid(target_ulong pte0) 260 { 261 return pte0 & 0x80000000 ? 1 : 0; 262 } 263 264 static inline void pte_invalidate(target_ulong *pte0) 265 { 266 *pte0 &= ~0x80000000; 267 } 268 269 #define PTE_PTEM_MASK 0x7FFFFFBF 270 #define PTE_CHECK_MASK (TARGET_PAGE_MASK | 0x7B) 271 272 uint32_t ppc_ldl_code(CPUArchState *env, target_ulong addr); 273 274 #ifdef CONFIG_USER_ONLY 275 void ppc_cpu_record_sigsegv(CPUState *cs, vaddr addr, 276 MMUAccessType access_type, 277 bool maperr, uintptr_t ra); 278 #else 279 bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, 280 MMUAccessType access_type, int mmu_idx, 281 bool probe, uintptr_t retaddr); 282 G_NORETURN void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr, 283 MMUAccessType access_type, int mmu_idx, 284 uintptr_t retaddr); 285 void ppc_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, 286 vaddr addr, unsigned size, 287 MMUAccessType access_type, 288 int mmu_idx, MemTxAttrs attrs, 289 MemTxResult response, uintptr_t retaddr); 290 void ppc_cpu_debug_excp_handler(CPUState *cs); 291 bool ppc_cpu_debug_check_breakpoint(CPUState *cs); 292 bool ppc_cpu_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp); 293 294 G_NORETURN void powerpc_checkstop(CPUPPCState *env, const char *reason); 295 void powerpc_excp(PowerPCCPU *cpu, int excp); 296 297 #endif /* !CONFIG_USER_ONLY */ 298 299 FIELD(GER_MSK, XMSK, 0, 4) 300 FIELD(GER_MSK, YMSK, 4, 4) 301 FIELD(GER_MSK, PMSK, 8, 8) 302 303 static inline int ger_pack_masks(int pmsk, int ymsk, int xmsk) 304 { 305 int msk = 0; 306 msk = FIELD_DP32(msk, GER_MSK, XMSK, xmsk); 307 msk = FIELD_DP32(msk, GER_MSK, YMSK, ymsk); 308 msk = FIELD_DP32(msk, GER_MSK, PMSK, pmsk); 309 return msk; 310 } 311 312 TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs); 313 314 #endif /* PPC_INTERNAL_H */ 315