xref: /qemu/target/openrisc/gdbstub.c (revision 6ff5da16000f908140723e164d33a0b51a6c4162)
1 /*
2  * OpenRISC gdb server stub
3  *
4  * Copyright (c) 2003-2005 Fabrice Bellard
5  * Copyright (c) 2013 SUSE LINUX Products GmbH
6  *
7  * This library is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * This library is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19  */
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "gdbstub/helpers.h"
23 
24 int openrisc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
25 {
26     CPUOpenRISCState *env = cpu_env(cs);
27 
28     if (n < 32) {
29         return gdb_get_reg32(mem_buf, cpu_get_gpr(env, n));
30     } else {
31         switch (n) {
32         case 32:    /* PPC */
33             return gdb_get_reg32(mem_buf, env->ppc);
34 
35         case 33:    /* NPC (equals PC) */
36             return gdb_get_reg32(mem_buf, env->pc);
37 
38         case 34:    /* SR */
39             return gdb_get_reg32(mem_buf, cpu_get_sr(env));
40 
41         default:
42             break;
43         }
44     }
45     return 0;
46 }
47 
48 int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
49 {
50     CPUOpenRISCState *env = cpu_env(cs);
51     uint32_t tmp;
52 
53     tmp = ldl_p(mem_buf);
54 
55     if (n < 32) {
56         cpu_set_gpr(env, n, tmp);
57     } else {
58         switch (n) {
59         case 32: /* PPC */
60             env->ppc = tmp;
61             break;
62 
63         case 33: /* NPC (equals PC) */
64             /* If setting PC to something different,
65                also clear delayed branch status.  */
66             if (env->pc != tmp) {
67                 env->pc = tmp;
68                 env->dflag = 0;
69             }
70             break;
71 
72         case 34: /* SR */
73             cpu_set_sr(env, tmp);
74             break;
75 
76         default:
77             break;
78         }
79     }
80     return 4;
81 }
82