xref: /qemu/target/mips/kvm_mips.h (revision 719d109b7fe153b0ec4dfeba2f303f864555d819)
1e2132e0bSSanjay Lal /*
2e2132e0bSSanjay Lal  * This file is subject to the terms and conditions of the GNU General Public
3e2132e0bSSanjay Lal  * License.  See the file "COPYING" in the main directory of this archive
4e2132e0bSSanjay Lal  * for more details.
5e2132e0bSSanjay Lal  *
6e2132e0bSSanjay Lal  * KVM/MIPS: MIPS specific KVM APIs
7e2132e0bSSanjay Lal  *
8e2132e0bSSanjay Lal  * Copyright (C) 2012-2014 Imagination Technologies Ltd.
9e2132e0bSSanjay Lal  * Authors: Sanjay Lal <sanjayl@kymasys.com>
10e2132e0bSSanjay Lal  */
11e2132e0bSSanjay Lal 
122a6a4076SMarkus Armbruster #ifndef KVM_MIPS_H
132a6a4076SMarkus Armbruster #define KVM_MIPS_H
14e2132e0bSSanjay Lal 
15*719d109bSHuacai Chen #include "cpu.h"
16*719d109bSHuacai Chen 
17e2132e0bSSanjay Lal /**
18e2132e0bSSanjay Lal  * kvm_mips_reset_vcpu:
19e2132e0bSSanjay Lal  * @cpu: MIPSCPU
20e2132e0bSSanjay Lal  *
21e2132e0bSSanjay Lal  * Called at reset time to set kernel registers to their initial values.
22e2132e0bSSanjay Lal  */
23e2132e0bSSanjay Lal void kvm_mips_reset_vcpu(MIPSCPU *cpu);
24e2132e0bSSanjay Lal 
25e2132e0bSSanjay Lal int kvm_mips_set_interrupt(MIPSCPU *cpu, int irq, int level);
26e2132e0bSSanjay Lal int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level);
27e2132e0bSSanjay Lal 
28*719d109bSHuacai Chen #ifdef CONFIG_KVM
29*719d109bSHuacai Chen int mips_kvm_type(MachineState *machine, const char *vm_type);
30*719d109bSHuacai Chen #else
31*719d109bSHuacai Chen static inline int mips_kvm_type(MachineState *machine, const char *vm_type)
32*719d109bSHuacai Chen {
33*719d109bSHuacai Chen     return 0;
34*719d109bSHuacai Chen }
35*719d109bSHuacai Chen #endif
36*719d109bSHuacai Chen 
372a6a4076SMarkus Armbruster #endif /* KVM_MIPS_H */
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