10f71a709SAndreas Färber /* 20f71a709SAndreas Färber * QEMU MIPS CPU 30f71a709SAndreas Färber * 40f71a709SAndreas Färber * Copyright (c) 2012 SUSE LINUX Products GmbH 50f71a709SAndreas Färber * 60f71a709SAndreas Färber * This library is free software; you can redistribute it and/or 70f71a709SAndreas Färber * modify it under the terms of the GNU Lesser General Public 80f71a709SAndreas Färber * License as published by the Free Software Foundation; either 90f71a709SAndreas Färber * version 2.1 of the License, or (at your option) any later version. 100f71a709SAndreas Färber * 110f71a709SAndreas Färber * This library is distributed in the hope that it will be useful, 120f71a709SAndreas Färber * but WITHOUT ANY WARRANTY; without even the implied warranty of 130f71a709SAndreas Färber * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 140f71a709SAndreas Färber * Lesser General Public License for more details. 150f71a709SAndreas Färber * 160f71a709SAndreas Färber * You should have received a copy of the GNU Lesser General Public 170f71a709SAndreas Färber * License along with this library; if not, see 180f71a709SAndreas Färber * <http://www.gnu.org/licenses/lgpl-2.1.html> 190f71a709SAndreas Färber */ 200f71a709SAndreas Färber #ifndef QEMU_MIPS_CPU_QOM_H 210f71a709SAndreas Färber #define QEMU_MIPS_CPU_QOM_H 220f71a709SAndreas Färber 232e5b09fdSMarkus Armbruster #include "hw/core/cpu.h" 24db1015e9SEduardo Habkost #include "qom/object.h" 250f71a709SAndreas Färber 260f71a709SAndreas Färber #ifdef TARGET_MIPS64 270f71a709SAndreas Färber #define TYPE_MIPS_CPU "mips64-cpu" 280f71a709SAndreas Färber #else 290f71a709SAndreas Färber #define TYPE_MIPS_CPU "mips-cpu" 300f71a709SAndreas Färber #endif 310f71a709SAndreas Färber 32*9295b1aaSPhilippe Mathieu-Daudé OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU) 330f71a709SAndreas Färber 340f71a709SAndreas Färber /** 350f71a709SAndreas Färber * MIPSCPUClass: 36c1caf1d9SAndreas Färber * @parent_realize: The parent class' realize handler. 370f71a709SAndreas Färber * @parent_reset: The parent class' reset handler. 380f71a709SAndreas Färber * 390f71a709SAndreas Färber * A MIPS CPU model. 400f71a709SAndreas Färber */ 41db1015e9SEduardo Habkost struct MIPSCPUClass { 420f71a709SAndreas Färber /*< private >*/ 430f71a709SAndreas Färber CPUClass parent_class; 440f71a709SAndreas Färber /*< public >*/ 450f71a709SAndreas Färber 46c1caf1d9SAndreas Färber DeviceRealize parent_realize; 47781c67caSPeter Maydell DeviceReset parent_reset; 4841da212cSIgor Mammedov const struct mips_def_t *cpu_def; 493803b6b4SRichard Henderson 503803b6b4SRichard Henderson /* Used for the jazz board to modify mips_cpu_do_transaction_failed. */ 513803b6b4SRichard Henderson bool no_data_aborts; 52db1015e9SEduardo Habkost }; 530f71a709SAndreas Färber 5497a8ea5aSAndreas Färber 550f71a709SAndreas Färber #endif 56