174433bf0SRichard Henderson /* 274433bf0SRichard Henderson * MIPS cpu parameters for qemu. 374433bf0SRichard Henderson * 4b14d0649SPhilippe Mathieu-Daudé * SPDX-License-Identifier: LGPL-2.0-or-later 574433bf0SRichard Henderson */ 674433bf0SRichard Henderson 774433bf0SRichard Henderson #ifndef MIPS_CPU_PARAM_H 84f31b54bSMarkus Armbruster #define MIPS_CPU_PARAM_H 974433bf0SRichard Henderson 108cd0e663SWANG Xuerui #ifdef TARGET_ABI_MIPSN64 1174433bf0SRichard Henderson #define TARGET_PHYS_ADDR_SPACE_BITS 48 1274433bf0SRichard Henderson #define TARGET_VIRT_ADDR_SPACE_BITS 48 1374433bf0SRichard Henderson #else 1474433bf0SRichard Henderson #define TARGET_PHYS_ADDR_SPACE_BITS 40 1574433bf0SRichard Henderson # ifdef CONFIG_USER_ONLY 1674433bf0SRichard Henderson # define TARGET_VIRT_ADDR_SPACE_BITS 31 1774433bf0SRichard Henderson # else 1874433bf0SRichard Henderson # define TARGET_VIRT_ADDR_SPACE_BITS 32 1974433bf0SRichard Henderson #endif 2074433bf0SRichard Henderson #endif 2174433bf0SRichard Henderson #define TARGET_PAGE_BITS 12 2274433bf0SRichard Henderson 23*21d41c56SPhilippe Mathieu-Daudé #define TARGET_INSN_START_EXTRA_WORDS 2 24*21d41c56SPhilippe Mathieu-Daudé 2574433bf0SRichard Henderson #endif 26