174433bf0SRichard Henderson /* 274433bf0SRichard Henderson * MicroBlaze cpu parameters for qemu. 374433bf0SRichard Henderson * 474433bf0SRichard Henderson * Copyright (c) 2009 Edgar E. Iglesias 5b14d0649SPhilippe Mathieu-Daudé * SPDX-License-Identifier: LGPL-2.0-or-later 674433bf0SRichard Henderson */ 774433bf0SRichard Henderson 874433bf0SRichard Henderson #ifndef MICROBLAZE_CPU_PARAM_H 94f31b54bSMarkus Armbruster #define MICROBLAZE_CPU_PARAM_H 1074433bf0SRichard Henderson 1119f27b6cSRichard Henderson /* 1219f27b6cSRichard Henderson * While system mode can address up to 64 bits of address space, 1319f27b6cSRichard Henderson * this is done via the lea/sea instructions, which are system-only 1419f27b6cSRichard Henderson * (as they also bypass the mmu). 1519f27b6cSRichard Henderson * 1619f27b6cSRichard Henderson * We can improve the user-only experience by only exposing 32 bits 1719f27b6cSRichard Henderson * of address space. 1819f27b6cSRichard Henderson */ 1919f27b6cSRichard Henderson #ifdef CONFIG_USER_ONLY 2019f27b6cSRichard Henderson #define TARGET_PHYS_ADDR_SPACE_BITS 32 2119f27b6cSRichard Henderson #define TARGET_VIRT_ADDR_SPACE_BITS 32 2219f27b6cSRichard Henderson #else 2374433bf0SRichard Henderson #define TARGET_PHYS_ADDR_SPACE_BITS 64 2474433bf0SRichard Henderson #define TARGET_VIRT_ADDR_SPACE_BITS 64 2519f27b6cSRichard Henderson #endif 2619f27b6cSRichard Henderson 2774433bf0SRichard Henderson /* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */ 2874433bf0SRichard Henderson #define TARGET_PAGE_BITS 12 2974433bf0SRichard Henderson 30*21d41c56SPhilippe Mathieu-Daudé #define TARGET_INSN_START_EXTRA_WORDS 1 31*21d41c56SPhilippe Mathieu-Daudé 3274433bf0SRichard Henderson #endif 33