xref: /qemu/target/loongarch/kvm/kvm.c (revision 537ba9da17f1cb67fb41cd2a3a79e909944b0a15)
1*537ba9daSTianrui Zhao /* SPDX-License-Identifier: GPL-2.0-or-later */
2*537ba9daSTianrui Zhao /*
3*537ba9daSTianrui Zhao  * QEMU LoongArch KVM
4*537ba9daSTianrui Zhao  *
5*537ba9daSTianrui Zhao  * Copyright (c) 2023 Loongson Technology Corporation Limited
6*537ba9daSTianrui Zhao  */
7*537ba9daSTianrui Zhao 
8*537ba9daSTianrui Zhao #include "qemu/osdep.h"
9*537ba9daSTianrui Zhao #include <sys/ioctl.h>
10*537ba9daSTianrui Zhao #include <linux/kvm.h>
11*537ba9daSTianrui Zhao 
12*537ba9daSTianrui Zhao #include "qemu/timer.h"
13*537ba9daSTianrui Zhao #include "qemu/error-report.h"
14*537ba9daSTianrui Zhao #include "qemu/main-loop.h"
15*537ba9daSTianrui Zhao #include "sysemu/sysemu.h"
16*537ba9daSTianrui Zhao #include "sysemu/kvm.h"
17*537ba9daSTianrui Zhao #include "sysemu/kvm_int.h"
18*537ba9daSTianrui Zhao #include "hw/pci/pci.h"
19*537ba9daSTianrui Zhao #include "exec/memattrs.h"
20*537ba9daSTianrui Zhao #include "exec/address-spaces.h"
21*537ba9daSTianrui Zhao #include "hw/boards.h"
22*537ba9daSTianrui Zhao #include "hw/irq.h"
23*537ba9daSTianrui Zhao #include "qemu/log.h"
24*537ba9daSTianrui Zhao #include "hw/loader.h"
25*537ba9daSTianrui Zhao #include "migration/migration.h"
26*537ba9daSTianrui Zhao #include "sysemu/runstate.h"
27*537ba9daSTianrui Zhao #include "cpu-csr.h"
28*537ba9daSTianrui Zhao #include "kvm_loongarch.h"
29*537ba9daSTianrui Zhao 
30*537ba9daSTianrui Zhao static bool cap_has_mp_state;
31*537ba9daSTianrui Zhao const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
32*537ba9daSTianrui Zhao     KVM_CAP_LAST_INFO
33*537ba9daSTianrui Zhao };
34*537ba9daSTianrui Zhao 
35*537ba9daSTianrui Zhao int kvm_arch_get_registers(CPUState *cs)
36*537ba9daSTianrui Zhao {
37*537ba9daSTianrui Zhao     return 0;
38*537ba9daSTianrui Zhao }
39*537ba9daSTianrui Zhao int kvm_arch_put_registers(CPUState *cs, int level)
40*537ba9daSTianrui Zhao {
41*537ba9daSTianrui Zhao     return 0;
42*537ba9daSTianrui Zhao }
43*537ba9daSTianrui Zhao 
44*537ba9daSTianrui Zhao int kvm_arch_init_vcpu(CPUState *cs)
45*537ba9daSTianrui Zhao {
46*537ba9daSTianrui Zhao     return 0;
47*537ba9daSTianrui Zhao }
48*537ba9daSTianrui Zhao 
49*537ba9daSTianrui Zhao int kvm_arch_destroy_vcpu(CPUState *cs)
50*537ba9daSTianrui Zhao {
51*537ba9daSTianrui Zhao     return 0;
52*537ba9daSTianrui Zhao }
53*537ba9daSTianrui Zhao 
54*537ba9daSTianrui Zhao unsigned long kvm_arch_vcpu_id(CPUState *cs)
55*537ba9daSTianrui Zhao {
56*537ba9daSTianrui Zhao     return cs->cpu_index;
57*537ba9daSTianrui Zhao }
58*537ba9daSTianrui Zhao 
59*537ba9daSTianrui Zhao int kvm_arch_release_virq_post(int virq)
60*537ba9daSTianrui Zhao {
61*537ba9daSTianrui Zhao     return 0;
62*537ba9daSTianrui Zhao }
63*537ba9daSTianrui Zhao 
64*537ba9daSTianrui Zhao int kvm_arch_msi_data_to_gsi(uint32_t data)
65*537ba9daSTianrui Zhao {
66*537ba9daSTianrui Zhao     abort();
67*537ba9daSTianrui Zhao }
68*537ba9daSTianrui Zhao 
69*537ba9daSTianrui Zhao int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
70*537ba9daSTianrui Zhao                              uint64_t address, uint32_t data, PCIDevice *dev)
71*537ba9daSTianrui Zhao {
72*537ba9daSTianrui Zhao     return 0;
73*537ba9daSTianrui Zhao }
74*537ba9daSTianrui Zhao 
75*537ba9daSTianrui Zhao int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
76*537ba9daSTianrui Zhao                                 int vector, PCIDevice *dev)
77*537ba9daSTianrui Zhao {
78*537ba9daSTianrui Zhao     return 0;
79*537ba9daSTianrui Zhao }
80*537ba9daSTianrui Zhao 
81*537ba9daSTianrui Zhao void kvm_arch_init_irq_routing(KVMState *s)
82*537ba9daSTianrui Zhao {
83*537ba9daSTianrui Zhao }
84*537ba9daSTianrui Zhao 
85*537ba9daSTianrui Zhao int kvm_arch_get_default_type(MachineState *ms)
86*537ba9daSTianrui Zhao {
87*537ba9daSTianrui Zhao     return 0;
88*537ba9daSTianrui Zhao }
89*537ba9daSTianrui Zhao 
90*537ba9daSTianrui Zhao int kvm_arch_init(MachineState *ms, KVMState *s)
91*537ba9daSTianrui Zhao {
92*537ba9daSTianrui Zhao     return 0;
93*537ba9daSTianrui Zhao }
94*537ba9daSTianrui Zhao 
95*537ba9daSTianrui Zhao int kvm_arch_irqchip_create(KVMState *s)
96*537ba9daSTianrui Zhao {
97*537ba9daSTianrui Zhao     return 0;
98*537ba9daSTianrui Zhao }
99*537ba9daSTianrui Zhao 
100*537ba9daSTianrui Zhao void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
101*537ba9daSTianrui Zhao {
102*537ba9daSTianrui Zhao }
103*537ba9daSTianrui Zhao 
104*537ba9daSTianrui Zhao MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
105*537ba9daSTianrui Zhao {
106*537ba9daSTianrui Zhao     return MEMTXATTRS_UNSPECIFIED;
107*537ba9daSTianrui Zhao }
108*537ba9daSTianrui Zhao 
109*537ba9daSTianrui Zhao int kvm_arch_process_async_events(CPUState *cs)
110*537ba9daSTianrui Zhao {
111*537ba9daSTianrui Zhao     return cs->halted;
112*537ba9daSTianrui Zhao }
113*537ba9daSTianrui Zhao 
114*537ba9daSTianrui Zhao bool kvm_arch_stop_on_emulation_error(CPUState *cs)
115*537ba9daSTianrui Zhao {
116*537ba9daSTianrui Zhao     return true;
117*537ba9daSTianrui Zhao }
118*537ba9daSTianrui Zhao 
119*537ba9daSTianrui Zhao bool kvm_arch_cpu_check_are_resettable(void)
120*537ba9daSTianrui Zhao {
121*537ba9daSTianrui Zhao     return true;
122*537ba9daSTianrui Zhao }
123*537ba9daSTianrui Zhao 
124*537ba9daSTianrui Zhao int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
125*537ba9daSTianrui Zhao {
126*537ba9daSTianrui Zhao     return 0;
127*537ba9daSTianrui Zhao }
128*537ba9daSTianrui Zhao 
129*537ba9daSTianrui Zhao void kvm_arch_accel_class_init(ObjectClass *oc)
130*537ba9daSTianrui Zhao {
131*537ba9daSTianrui Zhao }
132