xref: /qemu/target/i386/tcg/system/tcg-cpu.c (revision 342e313d6c1a8e6da758bd642777b85af1a0fc37)
1222f3e6fSPaolo Bonzini /*
232cad1ffSPhilippe Mathieu-Daudé  * i386 TCG cpu class initialization functions specific to system emulation
3222f3e6fSPaolo Bonzini  *
4222f3e6fSPaolo Bonzini  *  Copyright (c) 2003 Fabrice Bellard
5222f3e6fSPaolo Bonzini  *
6222f3e6fSPaolo Bonzini  * This library is free software; you can redistribute it and/or
7222f3e6fSPaolo Bonzini  * modify it under the terms of the GNU Lesser General Public
8222f3e6fSPaolo Bonzini  * License as published by the Free Software Foundation; either
9222f3e6fSPaolo Bonzini  * version 2 of the License, or (at your option) any later version.
10222f3e6fSPaolo Bonzini  *
11222f3e6fSPaolo Bonzini  * This library is distributed in the hope that it will be useful,
12222f3e6fSPaolo Bonzini  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13222f3e6fSPaolo Bonzini  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14222f3e6fSPaolo Bonzini  * Lesser General Public License for more details.
15222f3e6fSPaolo Bonzini  *
16222f3e6fSPaolo Bonzini  * You should have received a copy of the GNU Lesser General Public
17222f3e6fSPaolo Bonzini  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18222f3e6fSPaolo Bonzini  */
19222f3e6fSPaolo Bonzini 
20222f3e6fSPaolo Bonzini #include "qemu/osdep.h"
21222f3e6fSPaolo Bonzini #include "cpu.h"
22222f3e6fSPaolo Bonzini #include "tcg/helper-tcg.h"
23222f3e6fSPaolo Bonzini 
2432cad1ffSPhilippe Mathieu-Daudé #include "system/system.h"
25222f3e6fSPaolo Bonzini #include "qemu/units.h"
26dfc56946SRichard Henderson #include "system/address-spaces.h"
27*342e313dSPierrick Bouvier #include "system/memory.h"
28222f3e6fSPaolo Bonzini 
29222f3e6fSPaolo Bonzini #include "tcg/tcg-cpu.h"
30222f3e6fSPaolo Bonzini 
tcg_cpu_machine_done(Notifier * n,void * unused)31222f3e6fSPaolo Bonzini static void tcg_cpu_machine_done(Notifier *n, void *unused)
32222f3e6fSPaolo Bonzini {
33222f3e6fSPaolo Bonzini     X86CPU *cpu = container_of(n, X86CPU, machine_done);
34222f3e6fSPaolo Bonzini     MemoryRegion *smram =
35222f3e6fSPaolo Bonzini         (MemoryRegion *) object_resolve_path("/machine/smram", NULL);
36222f3e6fSPaolo Bonzini 
37222f3e6fSPaolo Bonzini     if (smram) {
38222f3e6fSPaolo Bonzini         cpu->smram = g_new(MemoryRegion, 1);
39222f3e6fSPaolo Bonzini         memory_region_init_alias(cpu->smram, OBJECT(cpu), "smram",
40222f3e6fSPaolo Bonzini                                  smram, 0, 4 * GiB);
41222f3e6fSPaolo Bonzini         memory_region_set_enabled(cpu->smram, true);
42222f3e6fSPaolo Bonzini         memory_region_add_subregion_overlap(cpu->cpu_as_root, 0,
43222f3e6fSPaolo Bonzini                                             cpu->smram, 1);
44222f3e6fSPaolo Bonzini     }
45222f3e6fSPaolo Bonzini }
46222f3e6fSPaolo Bonzini 
tcg_cpu_realizefn(CPUState * cs,Error ** errp)47222f3e6fSPaolo Bonzini bool tcg_cpu_realizefn(CPUState *cs, Error **errp)
48222f3e6fSPaolo Bonzini {
49222f3e6fSPaolo Bonzini     X86CPU *cpu = X86_CPU(cs);
50222f3e6fSPaolo Bonzini 
51222f3e6fSPaolo Bonzini     /*
52222f3e6fSPaolo Bonzini      * The realize order is important, since x86_cpu_realize() checks if
53222f3e6fSPaolo Bonzini      * nothing else has been set by the user (or by accelerators) in
54222f3e6fSPaolo Bonzini      * cpu->ucode_rev and cpu->phys_bits, and the memory regions
55222f3e6fSPaolo Bonzini      * initialized here are needed for the vcpu initialization.
56222f3e6fSPaolo Bonzini      *
57222f3e6fSPaolo Bonzini      * realize order:
58222f3e6fSPaolo Bonzini      * tcg_cpu -> host_cpu -> x86_cpu
59222f3e6fSPaolo Bonzini      */
60222f3e6fSPaolo Bonzini     cpu->cpu_as_mem = g_new(MemoryRegion, 1);
61222f3e6fSPaolo Bonzini     cpu->cpu_as_root = g_new(MemoryRegion, 1);
62222f3e6fSPaolo Bonzini 
63222f3e6fSPaolo Bonzini     /* Outer container... */
64222f3e6fSPaolo Bonzini     memory_region_init(cpu->cpu_as_root, OBJECT(cpu), "memory", ~0ull);
65222f3e6fSPaolo Bonzini     memory_region_set_enabled(cpu->cpu_as_root, true);
66222f3e6fSPaolo Bonzini 
67222f3e6fSPaolo Bonzini     /*
68222f3e6fSPaolo Bonzini      * ... with two regions inside: normal system memory with low
69222f3e6fSPaolo Bonzini      * priority, and...
70222f3e6fSPaolo Bonzini      */
71222f3e6fSPaolo Bonzini     memory_region_init_alias(cpu->cpu_as_mem, OBJECT(cpu), "memory",
72222f3e6fSPaolo Bonzini                              get_system_memory(), 0, ~0ull);
73222f3e6fSPaolo Bonzini     memory_region_add_subregion_overlap(cpu->cpu_as_root, 0, cpu->cpu_as_mem, 0);
74222f3e6fSPaolo Bonzini     memory_region_set_enabled(cpu->cpu_as_mem, true);
75222f3e6fSPaolo Bonzini 
76222f3e6fSPaolo Bonzini     cs->num_ases = 2;
77222f3e6fSPaolo Bonzini     cpu_address_space_init(cs, 0, "cpu-memory", cs->memory);
78222f3e6fSPaolo Bonzini     cpu_address_space_init(cs, 1, "cpu-smm", cpu->cpu_as_root);
79222f3e6fSPaolo Bonzini 
80222f3e6fSPaolo Bonzini     /* ... SMRAM with higher priority, linked from /machine/smram.  */
81222f3e6fSPaolo Bonzini     cpu->machine_done.notify = tcg_cpu_machine_done;
82222f3e6fSPaolo Bonzini     qemu_add_machine_init_done_notifier(&cpu->machine_done);
83222f3e6fSPaolo Bonzini     return true;
84222f3e6fSPaolo Bonzini }
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