1 /* 2 * TCG specific prototypes for helpers 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef I386_HELPER_TCG_H 21 #define I386_HELPER_TCG_H 22 23 #include "qemu/host-utils.h" 24 25 /* Maximum instruction code size */ 26 #define TARGET_MAX_INSN_SIZE 16 27 28 #if defined(TARGET_X86_64) 29 # define TCG_PHYS_ADDR_BITS 40 30 #else 31 # define TCG_PHYS_ADDR_BITS 36 32 #endif 33 34 QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS); 35 36 /** 37 * x86_cpu_do_interrupt: 38 * @cpu: vCPU the interrupt is to be handled by. 39 */ 40 void x86_cpu_do_interrupt(CPUState *cpu); 41 #ifndef CONFIG_USER_ONLY 42 bool x86_cpu_exec_halt(CPUState *cpu); 43 bool x86_need_replay_interrupt(int interrupt_request); 44 bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); 45 #endif 46 47 void breakpoint_handler(CPUState *cs); 48 49 /* n must be a constant to be efficient */ 50 static inline target_long lshift(target_long x, int n) 51 { 52 if (n >= 0) { 53 return x << n; 54 } else { 55 return x >> (-n); 56 } 57 } 58 59 /* translate.c */ 60 void tcg_x86_init(void); 61 void x86_translate_code(CPUState *cs, TranslationBlock *tb, 62 int *max_insns, vaddr pc, void *host_pc); 63 64 /* excp_helper.c */ 65 G_NORETURN void raise_exception(CPUX86State *env, int exception_index); 66 G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index, 67 uintptr_t retaddr); 68 G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index, 69 int error_code); 70 G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index, 71 int error_code, uintptr_t retaddr); 72 G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int next_eip_addend); 73 G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr, 74 MMUAccessType access_type, 75 uintptr_t retaddr); 76 #ifdef CONFIG_USER_ONLY 77 void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr, 78 MMUAccessType access_type, 79 bool maperr, uintptr_t ra); 80 void x86_cpu_record_sigbus(CPUState *cs, vaddr addr, 81 MMUAccessType access_type, uintptr_t ra); 82 #else 83 bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size, 84 MMUAccessType access_type, int mmu_idx, 85 bool probe, uintptr_t retaddr); 86 G_NORETURN void x86_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, 87 MMUAccessType access_type, 88 int mmu_idx, uintptr_t retaddr); 89 #endif 90 91 /* cc_helper.c */ 92 static inline unsigned int compute_pf(uint8_t x) 93 { 94 return !parity8(x) * CC_P; 95 } 96 97 /* misc_helper.c */ 98 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask); 99 100 /* system/svm_helper.c */ 101 #ifndef CONFIG_USER_ONLY 102 G_NORETURN void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, 103 uint64_t exit_info_1, uintptr_t retaddr); 104 void do_vmexit(CPUX86State *env); 105 #endif 106 107 /* seg_helper.c */ 108 void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw); 109 void do_interrupt_all(X86CPU *cpu, int intno, int is_int, 110 int error_code, target_ulong next_eip, int is_hw); 111 void handle_even_inj(CPUX86State *env, int intno, int is_int, 112 int error_code, int is_hw, int rm); 113 int exception_has_error_code(int intno); 114 115 /* smm_helper.c */ 116 void do_smm_enter(X86CPU *cpu); 117 118 /* system/bpt_helper.c */ 119 bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update); 120 121 /* 122 * Do the tasks usually performed by gen_eob(). Callers of this function 123 * should also handle TF as appropriate. 124 */ 125 static inline void do_end_instruction(CPUX86State *env) 126 { 127 /* needed if sti is just before */ 128 env->hflags &= ~HF_INHIBIT_IRQ_MASK; 129 env->eflags &= ~HF_RF_MASK; 130 } 131 #endif /* I386_HELPER_TCG_H */ 132