1 /* 2 * TCG specific prototypes for helpers 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef I386_HELPER_TCG_H 21 #define I386_HELPER_TCG_H 22 23 #include "exec/exec-all.h" 24 #include "qemu/host-utils.h" 25 26 /* Maximum instruction code size */ 27 #define TARGET_MAX_INSN_SIZE 16 28 29 #if defined(TARGET_X86_64) 30 # define TCG_PHYS_ADDR_BITS 40 31 #else 32 # define TCG_PHYS_ADDR_BITS 36 33 #endif 34 35 QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS); 36 37 /** 38 * x86_cpu_do_interrupt: 39 * @cpu: vCPU the interrupt is to be handled by. 40 */ 41 void x86_cpu_do_interrupt(CPUState *cpu); 42 #ifndef CONFIG_USER_ONLY 43 bool x86_cpu_exec_halt(CPUState *cpu); 44 bool x86_need_replay_interrupt(int interrupt_request); 45 bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); 46 #endif 47 48 void breakpoint_handler(CPUState *cs); 49 50 /* n must be a constant to be efficient */ 51 static inline target_long lshift(target_long x, int n) 52 { 53 if (n >= 0) { 54 return x << n; 55 } else { 56 return x >> (-n); 57 } 58 } 59 60 /* translate.c */ 61 void tcg_x86_init(void); 62 void x86_translate_code(CPUState *cs, TranslationBlock *tb, 63 int *max_insns, vaddr pc, void *host_pc); 64 65 /* excp_helper.c */ 66 G_NORETURN void raise_exception(CPUX86State *env, int exception_index); 67 G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index, 68 uintptr_t retaddr); 69 G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index, 70 int error_code); 71 G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index, 72 int error_code, uintptr_t retaddr); 73 G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int next_eip_addend); 74 G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr, 75 MMUAccessType access_type, 76 uintptr_t retaddr); 77 #ifdef CONFIG_USER_ONLY 78 void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr, 79 MMUAccessType access_type, 80 bool maperr, uintptr_t ra); 81 void x86_cpu_record_sigbus(CPUState *cs, vaddr addr, 82 MMUAccessType access_type, uintptr_t ra); 83 #else 84 bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size, 85 MMUAccessType access_type, int mmu_idx, 86 bool probe, uintptr_t retaddr); 87 G_NORETURN void x86_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, 88 MMUAccessType access_type, 89 int mmu_idx, uintptr_t retaddr); 90 #endif 91 92 /* cc_helper.c */ 93 static inline unsigned int compute_pf(uint8_t x) 94 { 95 return !parity8(x) * CC_P; 96 } 97 98 /* misc_helper.c */ 99 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask); 100 101 /* sysemu/svm_helper.c */ 102 #ifndef CONFIG_USER_ONLY 103 G_NORETURN void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, 104 uint64_t exit_info_1, uintptr_t retaddr); 105 void do_vmexit(CPUX86State *env); 106 #endif 107 108 /* seg_helper.c */ 109 void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw); 110 void do_interrupt_all(X86CPU *cpu, int intno, int is_int, 111 int error_code, target_ulong next_eip, int is_hw); 112 void handle_even_inj(CPUX86State *env, int intno, int is_int, 113 int error_code, int is_hw, int rm); 114 int exception_has_error_code(int intno); 115 116 /* smm_helper.c */ 117 void do_smm_enter(X86CPU *cpu); 118 119 /* sysemu/bpt_helper.c */ 120 bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update); 121 122 /* 123 * Do the tasks usually performed by gen_eob(). Callers of this function 124 * should also handle TF as appropriate. 125 */ 126 static inline void do_end_instruction(CPUX86State *env) 127 { 128 /* needed if sti is just before */ 129 env->hflags &= ~HF_INHIBIT_IRQ_MASK; 130 env->eflags &= ~HF_RF_MASK; 131 } 132 #endif /* I386_HELPER_TCG_H */ 133