1 /* 2 * x86 condition code helpers 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "cpu.h" 22 #include "exec/helper-proto.h" 23 #include "helper-tcg.h" 24 25 const uint8_t parity_table[256] = { 26 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 27 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 28 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 29 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 30 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 31 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 32 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 33 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 34 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 35 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 36 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 37 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 38 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 39 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 40 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 41 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 42 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 43 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 44 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 45 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 46 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 47 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 48 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 49 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 50 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 51 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 52 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 53 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 54 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 55 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 56 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 57 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 58 }; 59 60 #define SHIFT 0 61 #include "cc_helper_template.h.inc" 62 #undef SHIFT 63 64 #define SHIFT 1 65 #include "cc_helper_template.h.inc" 66 #undef SHIFT 67 68 #define SHIFT 2 69 #include "cc_helper_template.h.inc" 70 #undef SHIFT 71 72 #ifdef TARGET_X86_64 73 74 #define SHIFT 3 75 #include "cc_helper_template.h.inc" 76 #undef SHIFT 77 78 #endif 79 80 static target_ulong compute_all_adcx(target_ulong dst, target_ulong src1, 81 target_ulong src2) 82 { 83 return (src1 & ~CC_C) | (dst * CC_C); 84 } 85 86 static target_ulong compute_all_adox(target_ulong dst, target_ulong src1, 87 target_ulong src2) 88 { 89 return (src1 & ~CC_O) | (src2 * CC_O); 90 } 91 92 static target_ulong compute_all_adcox(target_ulong dst, target_ulong src1, 93 target_ulong src2) 94 { 95 return (src1 & ~(CC_C | CC_O)) | (dst * CC_C) | (src2 * CC_O); 96 } 97 98 target_ulong helper_cc_compute_nz(target_ulong dst, target_ulong src1, 99 int op) 100 { 101 if (CC_OP_HAS_EFLAGS(op)) { 102 return ~src1 & CC_Z; 103 } else { 104 MemOp size = cc_op_size(op); 105 target_ulong mask = MAKE_64BIT_MASK(0, 8 << size); 106 107 return dst & mask; 108 } 109 } 110 111 target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1, 112 target_ulong src2, int op) 113 { 114 switch (op) { 115 default: /* should never happen */ 116 return 0; 117 118 case CC_OP_EFLAGS: 119 return src1; 120 case CC_OP_POPCNT: 121 return dst ? 0 : CC_Z; 122 123 case CC_OP_MULB: 124 return compute_all_mulb(dst, src1); 125 case CC_OP_MULW: 126 return compute_all_mulw(dst, src1); 127 case CC_OP_MULL: 128 return compute_all_mull(dst, src1); 129 130 case CC_OP_ADDB: 131 return compute_all_addb(dst, src1); 132 case CC_OP_ADDW: 133 return compute_all_addw(dst, src1); 134 case CC_OP_ADDL: 135 return compute_all_addl(dst, src1); 136 137 case CC_OP_ADCB: 138 return compute_all_adcb(dst, src1, src2); 139 case CC_OP_ADCW: 140 return compute_all_adcw(dst, src1, src2); 141 case CC_OP_ADCL: 142 return compute_all_adcl(dst, src1, src2); 143 144 case CC_OP_SUBB: 145 return compute_all_subb(dst, src1); 146 case CC_OP_SUBW: 147 return compute_all_subw(dst, src1); 148 case CC_OP_SUBL: 149 return compute_all_subl(dst, src1); 150 151 case CC_OP_SBBB: 152 return compute_all_sbbb(dst, src1, src2); 153 case CC_OP_SBBW: 154 return compute_all_sbbw(dst, src1, src2); 155 case CC_OP_SBBL: 156 return compute_all_sbbl(dst, src1, src2); 157 158 case CC_OP_LOGICB: 159 return compute_all_logicb(dst, src1); 160 case CC_OP_LOGICW: 161 return compute_all_logicw(dst, src1); 162 case CC_OP_LOGICL: 163 return compute_all_logicl(dst, src1); 164 165 case CC_OP_INCB: 166 return compute_all_incb(dst, src1); 167 case CC_OP_INCW: 168 return compute_all_incw(dst, src1); 169 case CC_OP_INCL: 170 return compute_all_incl(dst, src1); 171 172 case CC_OP_DECB: 173 return compute_all_decb(dst, src1); 174 case CC_OP_DECW: 175 return compute_all_decw(dst, src1); 176 case CC_OP_DECL: 177 return compute_all_decl(dst, src1); 178 179 case CC_OP_SHLB: 180 return compute_all_shlb(dst, src1); 181 case CC_OP_SHLW: 182 return compute_all_shlw(dst, src1); 183 case CC_OP_SHLL: 184 return compute_all_shll(dst, src1); 185 186 case CC_OP_SARB: 187 return compute_all_sarb(dst, src1); 188 case CC_OP_SARW: 189 return compute_all_sarw(dst, src1); 190 case CC_OP_SARL: 191 return compute_all_sarl(dst, src1); 192 193 case CC_OP_BMILGB: 194 return compute_all_bmilgb(dst, src1); 195 case CC_OP_BMILGW: 196 return compute_all_bmilgw(dst, src1); 197 case CC_OP_BMILGL: 198 return compute_all_bmilgl(dst, src1); 199 200 case CC_OP_BLSIB: 201 return compute_all_blsib(dst, src1); 202 case CC_OP_BLSIW: 203 return compute_all_blsiw(dst, src1); 204 case CC_OP_BLSIL: 205 return compute_all_blsil(dst, src1); 206 207 case CC_OP_ADCX: 208 return compute_all_adcx(dst, src1, src2); 209 case CC_OP_ADOX: 210 return compute_all_adox(dst, src1, src2); 211 case CC_OP_ADCOX: 212 return compute_all_adcox(dst, src1, src2); 213 214 #ifdef TARGET_X86_64 215 case CC_OP_MULQ: 216 return compute_all_mulq(dst, src1); 217 case CC_OP_ADDQ: 218 return compute_all_addq(dst, src1); 219 case CC_OP_ADCQ: 220 return compute_all_adcq(dst, src1, src2); 221 case CC_OP_SUBQ: 222 return compute_all_subq(dst, src1); 223 case CC_OP_SBBQ: 224 return compute_all_sbbq(dst, src1, src2); 225 case CC_OP_LOGICQ: 226 return compute_all_logicq(dst, src1); 227 case CC_OP_INCQ: 228 return compute_all_incq(dst, src1); 229 case CC_OP_DECQ: 230 return compute_all_decq(dst, src1); 231 case CC_OP_SHLQ: 232 return compute_all_shlq(dst, src1); 233 case CC_OP_SARQ: 234 return compute_all_sarq(dst, src1); 235 case CC_OP_BMILGQ: 236 return compute_all_bmilgq(dst, src1); 237 case CC_OP_BLSIQ: 238 return compute_all_blsiq(dst, src1); 239 #endif 240 } 241 } 242 243 uint32_t cpu_cc_compute_all(CPUX86State *env) 244 { 245 return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, CC_OP); 246 } 247 248 target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1, 249 target_ulong src2, int op) 250 { 251 switch (op) { 252 default: /* should never happen */ 253 case CC_OP_LOGICB: 254 case CC_OP_LOGICW: 255 case CC_OP_LOGICL: 256 case CC_OP_LOGICQ: 257 case CC_OP_POPCNT: 258 return 0; 259 260 case CC_OP_EFLAGS: 261 case CC_OP_SARB: 262 case CC_OP_SARW: 263 case CC_OP_SARL: 264 case CC_OP_SARQ: 265 case CC_OP_ADOX: 266 return src1 & 1; 267 268 case CC_OP_INCB: 269 case CC_OP_INCW: 270 case CC_OP_INCL: 271 case CC_OP_INCQ: 272 case CC_OP_DECB: 273 case CC_OP_DECW: 274 case CC_OP_DECL: 275 case CC_OP_DECQ: 276 return src1; 277 278 case CC_OP_MULB: 279 case CC_OP_MULW: 280 case CC_OP_MULL: 281 case CC_OP_MULQ: 282 return src1 != 0; 283 284 case CC_OP_ADCX: 285 case CC_OP_ADCOX: 286 return dst; 287 288 case CC_OP_ADDB: 289 return compute_c_addb(dst, src1); 290 case CC_OP_ADDW: 291 return compute_c_addw(dst, src1); 292 case CC_OP_ADDL: 293 return compute_c_addl(dst, src1); 294 295 case CC_OP_ADCB: 296 return compute_c_adcb(dst, src1, src2); 297 case CC_OP_ADCW: 298 return compute_c_adcw(dst, src1, src2); 299 case CC_OP_ADCL: 300 return compute_c_adcl(dst, src1, src2); 301 302 case CC_OP_SUBB: 303 return compute_c_subb(dst, src1); 304 case CC_OP_SUBW: 305 return compute_c_subw(dst, src1); 306 case CC_OP_SUBL: 307 return compute_c_subl(dst, src1); 308 309 case CC_OP_SBBB: 310 return compute_c_sbbb(dst, src1, src2); 311 case CC_OP_SBBW: 312 return compute_c_sbbw(dst, src1, src2); 313 case CC_OP_SBBL: 314 return compute_c_sbbl(dst, src1, src2); 315 316 case CC_OP_SHLB: 317 return compute_c_shlb(dst, src1); 318 case CC_OP_SHLW: 319 return compute_c_shlw(dst, src1); 320 case CC_OP_SHLL: 321 return compute_c_shll(dst, src1); 322 323 case CC_OP_BMILGB: 324 return compute_c_bmilgb(dst, src1); 325 case CC_OP_BMILGW: 326 return compute_c_bmilgw(dst, src1); 327 case CC_OP_BMILGL: 328 return compute_c_bmilgl(dst, src1); 329 330 case CC_OP_BLSIB: 331 return compute_c_blsib(dst, src1); 332 case CC_OP_BLSIW: 333 return compute_c_blsiw(dst, src1); 334 case CC_OP_BLSIL: 335 return compute_c_blsil(dst, src1); 336 337 #ifdef TARGET_X86_64 338 case CC_OP_ADDQ: 339 return compute_c_addq(dst, src1); 340 case CC_OP_ADCQ: 341 return compute_c_adcq(dst, src1, src2); 342 case CC_OP_SUBQ: 343 return compute_c_subq(dst, src1); 344 case CC_OP_SBBQ: 345 return compute_c_sbbq(dst, src1, src2); 346 case CC_OP_SHLQ: 347 return compute_c_shlq(dst, src1); 348 case CC_OP_BMILGQ: 349 return compute_c_bmilgq(dst, src1); 350 case CC_OP_BLSIQ: 351 return compute_c_blsiq(dst, src1); 352 #endif 353 } 354 } 355 356 void helper_write_eflags(CPUX86State *env, target_ulong t0, 357 uint32_t update_mask) 358 { 359 cpu_load_eflags(env, t0, update_mask); 360 } 361 362 target_ulong helper_read_eflags(CPUX86State *env) 363 { 364 uint32_t eflags; 365 366 eflags = cpu_cc_compute_all(env); 367 eflags |= (env->df & DF_MASK); 368 eflags |= env->eflags & ~(VM_MASK | RF_MASK); 369 return eflags; 370 } 371 372 void helper_clts(CPUX86State *env) 373 { 374 env->cr[0] &= ~CR0_TS_MASK; 375 env->hflags &= ~HF_TS_MASK; 376 } 377