1 /* 2 * x86 host CPU functions, and "host" cpu type initialization 3 * 4 * Copyright 2021 SUSE LLC 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 10 #include "qemu/osdep.h" 11 #include "cpu.h" 12 #include "host-cpu.h" 13 #include "qapi/error.h" 14 #include "qemu/error-report.h" 15 #include "system/system.h" 16 17 /* Note: Only safe for use on x86(-64) hosts */ 18 static uint32_t host_cpu_phys_bits(void) 19 { 20 uint32_t eax; 21 uint32_t host_phys_bits; 22 23 host_cpuid(0x80000000, 0, &eax, NULL, NULL, NULL); 24 if (eax >= 0x80000008) { 25 host_cpuid(0x80000008, 0, &eax, NULL, NULL, NULL); 26 /* 27 * Note: According to AMD doc 25481 rev 2.34 they have a field 28 * at 23:16 that can specify a maximum physical address bits for 29 * the guest that can override this value; but I've not seen 30 * anything with that set. 31 */ 32 host_phys_bits = eax & 0xff; 33 } else { 34 /* 35 * It's an odd 64 bit machine that doesn't have the leaf for 36 * physical address bits; fall back to 36 that's most older 37 * Intel. 38 */ 39 host_phys_bits = 36; 40 } 41 42 return host_phys_bits; 43 } 44 45 static void host_cpu_adjust_phys_bits(X86CPU *cpu) 46 { 47 uint32_t host_phys_bits = host_cpu_phys_bits(); 48 uint32_t phys_bits = cpu->phys_bits; 49 50 /* 51 * Print a warning if the user set it to a value that's not the 52 * host value. 53 */ 54 if (phys_bits != host_phys_bits && phys_bits != 0) { 55 warn_report_once("Host physical bits (%u)" 56 " does not match phys-bits property (%u)", 57 host_phys_bits, phys_bits); 58 } 59 60 if (cpu->host_phys_bits) { 61 /* The user asked for us to use the host physical bits */ 62 phys_bits = host_phys_bits; 63 if (cpu->host_phys_bits_limit && 64 phys_bits > cpu->host_phys_bits_limit) { 65 phys_bits = cpu->host_phys_bits_limit; 66 } 67 } 68 69 cpu->phys_bits = phys_bits; 70 } 71 72 bool host_cpu_realizefn(CPUState *cs, Error **errp) 73 { 74 X86CPU *cpu = X86_CPU(cs); 75 CPUX86State *env = &cpu->env; 76 77 if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { 78 host_cpu_adjust_phys_bits(cpu); 79 } 80 return true; 81 } 82 83 #define CPUID_MODEL_ID_SZ 48 84 /** 85 * cpu_x86_fill_model_id: 86 * Get CPUID model ID string from host CPU. 87 * 88 * @str should have at least CPUID_MODEL_ID_SZ bytes 89 * 90 * The function does NOT add a null terminator to the string 91 * automatically. 92 */ 93 static int host_cpu_fill_model_id(char *str) 94 { 95 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; 96 int i; 97 98 for (i = 0; i < 3; i++) { 99 host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx); 100 memcpy(str + i * 16 + 0, &eax, 4); 101 memcpy(str + i * 16 + 4, &ebx, 4); 102 memcpy(str + i * 16 + 8, &ecx, 4); 103 memcpy(str + i * 16 + 12, &edx, 4); 104 } 105 return 0; 106 } 107 108 void host_cpu_vendor_fms(char *vendor, int *family, int *model, int *stepping) 109 { 110 uint32_t eax, ebx, ecx, edx; 111 112 host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx); 113 x86_cpu_vendor_words2str(vendor, ebx, edx, ecx); 114 115 host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx); 116 if (family) { 117 *family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); 118 } 119 if (model) { 120 *model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); 121 } 122 if (stepping) { 123 *stepping = eax & 0x0F; 124 } 125 } 126 127 void host_cpu_instance_init(X86CPU *cpu) 128 { 129 X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); 130 131 if (xcc->model) { 132 uint32_t ebx = 0, ecx = 0, edx = 0; 133 char vendor[CPUID_VENDOR_SZ + 1]; 134 135 host_cpuid(0, 0, NULL, &ebx, &ecx, &edx); 136 x86_cpu_vendor_words2str(vendor, ebx, edx, ecx); 137 object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort); 138 } 139 } 140 141 void host_cpu_max_instance_init(X86CPU *cpu) 142 { 143 char vendor[CPUID_VENDOR_SZ + 1] = { 0 }; 144 char model_id[CPUID_MODEL_ID_SZ + 1] = { 0 }; 145 int family, model, stepping; 146 147 /* Use max host physical address bits if -cpu max option is applied */ 148 object_property_set_bool(OBJECT(cpu), "host-phys-bits", true, &error_abort); 149 150 host_cpu_vendor_fms(vendor, &family, &model, &stepping); 151 host_cpu_fill_model_id(model_id); 152 153 object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort); 154 object_property_set_int(OBJECT(cpu), "family", family, &error_abort); 155 object_property_set_int(OBJECT(cpu), "model", model, &error_abort); 156 object_property_set_int(OBJECT(cpu), "stepping", stepping, 157 &error_abort); 158 object_property_set_str(OBJECT(cpu), "model-id", model_id, 159 &error_abort); 160 } 161 162 static void host_cpu_class_init(ObjectClass *oc, void *data) 163 { 164 X86CPUClass *xcc = X86_CPU_CLASS(oc); 165 166 xcc->host_cpuid_required = true; 167 xcc->ordering = 8; 168 xcc->model_description = 169 g_strdup_printf("processor with all supported host features "); 170 } 171 172 static const TypeInfo host_cpu_type_info = { 173 .name = X86_CPU_TYPE_NAME("host"), 174 .parent = X86_CPU_TYPE_NAME("max"), 175 .class_init = host_cpu_class_init, 176 }; 177 178 static void host_cpu_type_init(void) 179 { 180 type_register_static(&host_cpu_type_info); 181 } 182 183 type_init(host_cpu_type_init); 184