161766fe9SRichard Henderson /* 261766fe9SRichard Henderson * PA-RISC emulation cpu definitions for qemu. 361766fe9SRichard Henderson * 461766fe9SRichard Henderson * Copyright (c) 2016 Richard Henderson <rth@twiddle.net> 561766fe9SRichard Henderson * 661766fe9SRichard Henderson * This library is free software; you can redistribute it and/or 761766fe9SRichard Henderson * modify it under the terms of the GNU Lesser General Public 861766fe9SRichard Henderson * License as published by the Free Software Foundation; either 961766fe9SRichard Henderson * version 2 of the License, or (at your option) any later version. 1061766fe9SRichard Henderson * 1161766fe9SRichard Henderson * This library is distributed in the hope that it will be useful, 1261766fe9SRichard Henderson * but WITHOUT ANY WARRANTY; without even the implied warranty of 1361766fe9SRichard Henderson * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 1461766fe9SRichard Henderson * Lesser General Public License for more details. 1561766fe9SRichard Henderson * 1661766fe9SRichard Henderson * You should have received a copy of the GNU Lesser General Public 1761766fe9SRichard Henderson * License along with this library; if not, see <http://www.gnu.org/licenses/>. 1861766fe9SRichard Henderson */ 1961766fe9SRichard Henderson 2061766fe9SRichard Henderson #ifndef HPPA_CPU_H 2161766fe9SRichard Henderson #define HPPA_CPU_H 2261766fe9SRichard Henderson 2361766fe9SRichard Henderson #include "qemu-common.h" 2461766fe9SRichard Henderson #include "cpu-qom.h" 2561766fe9SRichard Henderson 2661766fe9SRichard Henderson /* We only support hppa-linux-user at present, so 32-bit only. */ 2761766fe9SRichard Henderson #define TARGET_LONG_BITS 32 2861766fe9SRichard Henderson #define TARGET_PHYS_ADDR_SPACE_BITS 32 2961766fe9SRichard Henderson #define TARGET_VIRT_ADDR_SPACE_BITS 32 3061766fe9SRichard Henderson 3161766fe9SRichard Henderson #define CPUArchState struct CPUHPPAState 3261766fe9SRichard Henderson 3361766fe9SRichard Henderson #include "exec/cpu-defs.h" 3461766fe9SRichard Henderson #include "fpu/softfloat.h" 3561766fe9SRichard Henderson 3661766fe9SRichard Henderson #define TARGET_PAGE_BITS 12 3761766fe9SRichard Henderson 3861766fe9SRichard Henderson #define ALIGNED_ONLY 3961766fe9SRichard Henderson #define NB_MMU_MODES 1 4061766fe9SRichard Henderson #define MMU_USER_IDX 0 4161766fe9SRichard Henderson #define TARGET_INSN_START_EXTRA_WORDS 1 4261766fe9SRichard Henderson 4361766fe9SRichard Henderson #define EXCP_SYSCALL 1 4461766fe9SRichard Henderson #define EXCP_SYSCALL_LWS 2 4561766fe9SRichard Henderson #define EXCP_SIGSEGV 3 4661766fe9SRichard Henderson #define EXCP_SIGILL 4 4761766fe9SRichard Henderson #define EXCP_SIGFPE 5 4861766fe9SRichard Henderson 4961766fe9SRichard Henderson typedef struct CPUHPPAState CPUHPPAState; 5061766fe9SRichard Henderson 5161766fe9SRichard Henderson struct CPUHPPAState { 5261766fe9SRichard Henderson target_ulong gr[32]; 5361766fe9SRichard Henderson uint64_t fr[32]; 5461766fe9SRichard Henderson 5561766fe9SRichard Henderson target_ulong sar; 5661766fe9SRichard Henderson target_ulong cr26; 5761766fe9SRichard Henderson target_ulong cr27; 5861766fe9SRichard Henderson 5961766fe9SRichard Henderson target_ulong psw_n; /* boolean */ 6061766fe9SRichard Henderson target_long psw_v; /* in most significant bit */ 6161766fe9SRichard Henderson 6261766fe9SRichard Henderson /* Splitting the carry-borrow field into the MSB and "the rest", allows 6361766fe9SRichard Henderson * for "the rest" to be deleted when it is unused, but the MSB is in use. 6461766fe9SRichard Henderson * In addition, it's easier to compute carry-in for bit B+1 than it is to 6561766fe9SRichard Henderson * compute carry-out for bit B (3 vs 4 insns for addition, assuming the 6661766fe9SRichard Henderson * host has the appropriate add-with-carry insn to compute the msb). 6761766fe9SRichard Henderson * Therefore the carry bits are stored as: cb_msb : cb & 0x11111110. 6861766fe9SRichard Henderson */ 6961766fe9SRichard Henderson target_ulong psw_cb; /* in least significant bit of next nibble */ 7061766fe9SRichard Henderson target_ulong psw_cb_msb; /* boolean */ 7161766fe9SRichard Henderson 7261766fe9SRichard Henderson target_ulong iaoq_f; /* front */ 7361766fe9SRichard Henderson target_ulong iaoq_b; /* back, aka next instruction */ 7461766fe9SRichard Henderson 7561766fe9SRichard Henderson target_ulong ior; /* interrupt offset register */ 7661766fe9SRichard Henderson 7761766fe9SRichard Henderson uint32_t fr0_shadow; /* flags, c, ca/cq, rm, d, enables */ 7861766fe9SRichard Henderson float_status fp_status; 7961766fe9SRichard Henderson 8061766fe9SRichard Henderson /* Those resources are used only in QEMU core */ 8161766fe9SRichard Henderson CPU_COMMON 8261766fe9SRichard Henderson }; 8361766fe9SRichard Henderson 8461766fe9SRichard Henderson /** 8561766fe9SRichard Henderson * HPPACPU: 8661766fe9SRichard Henderson * @env: #CPUHPPAState 8761766fe9SRichard Henderson * 8861766fe9SRichard Henderson * An HPPA CPU. 8961766fe9SRichard Henderson */ 9061766fe9SRichard Henderson struct HPPACPU { 9161766fe9SRichard Henderson /*< private >*/ 9261766fe9SRichard Henderson CPUState parent_obj; 9361766fe9SRichard Henderson /*< public >*/ 9461766fe9SRichard Henderson 9561766fe9SRichard Henderson CPUHPPAState env; 9661766fe9SRichard Henderson }; 9761766fe9SRichard Henderson 9861766fe9SRichard Henderson static inline HPPACPU *hppa_env_get_cpu(CPUHPPAState *env) 9961766fe9SRichard Henderson { 10061766fe9SRichard Henderson return container_of(env, HPPACPU, env); 10161766fe9SRichard Henderson } 10261766fe9SRichard Henderson 10361766fe9SRichard Henderson #define ENV_GET_CPU(e) CPU(hppa_env_get_cpu(e)) 10461766fe9SRichard Henderson #define ENV_OFFSET offsetof(HPPACPU, env) 10561766fe9SRichard Henderson 10661766fe9SRichard Henderson #include "exec/cpu-all.h" 10761766fe9SRichard Henderson 10861766fe9SRichard Henderson static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch) 10961766fe9SRichard Henderson { 11061766fe9SRichard Henderson return 0; 11161766fe9SRichard Henderson } 11261766fe9SRichard Henderson 11361766fe9SRichard Henderson void hppa_translate_init(void); 11461766fe9SRichard Henderson 115*8fc24ad5SIgor Mammedov #define cpu_init(cpu_model) cpu_generic_init(TYPE_HPPA_CPU, cpu_model) 11661766fe9SRichard Henderson 11761766fe9SRichard Henderson void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf); 11861766fe9SRichard Henderson 11961766fe9SRichard Henderson static inline void cpu_get_tb_cpu_state(CPUHPPAState *env, target_ulong *pc, 12061766fe9SRichard Henderson target_ulong *cs_base, 12161766fe9SRichard Henderson uint32_t *pflags) 12261766fe9SRichard Henderson { 12361766fe9SRichard Henderson *pc = env->iaoq_f; 12461766fe9SRichard Henderson *cs_base = env->iaoq_b; 12561766fe9SRichard Henderson *pflags = env->psw_n; 12661766fe9SRichard Henderson } 12761766fe9SRichard Henderson 12861766fe9SRichard Henderson target_ulong cpu_hppa_get_psw(CPUHPPAState *env); 12961766fe9SRichard Henderson void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong); 13061766fe9SRichard Henderson void cpu_hppa_loaded_fr0(CPUHPPAState *env); 13161766fe9SRichard Henderson 13261766fe9SRichard Henderson #define cpu_signal_handler cpu_hppa_signal_handler 13361766fe9SRichard Henderson 13461766fe9SRichard Henderson int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc); 13561766fe9SRichard Henderson int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, int midx); 13661766fe9SRichard Henderson int hppa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); 13761766fe9SRichard Henderson int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); 13861766fe9SRichard Henderson void hppa_cpu_do_interrupt(CPUState *cpu); 13961766fe9SRichard Henderson bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req); 14061766fe9SRichard Henderson void hppa_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function, int); 14161766fe9SRichard Henderson 14261766fe9SRichard Henderson #endif /* HPPA_CPU_H */ 143