138388f7eSRichard Henderson# AArch64 SVE instruction descriptions 238388f7eSRichard Henderson# 338388f7eSRichard Henderson# Copyright (c) 2017 Linaro, Ltd 438388f7eSRichard Henderson# 538388f7eSRichard Henderson# This library is free software; you can redistribute it and/or 638388f7eSRichard Henderson# modify it under the terms of the GNU Lesser General Public 738388f7eSRichard Henderson# License as published by the Free Software Foundation; either 838388f7eSRichard Henderson# version 2 of the License, or (at your option) any later version. 938388f7eSRichard Henderson# 1038388f7eSRichard Henderson# This library is distributed in the hope that it will be useful, 1138388f7eSRichard Henderson# but WITHOUT ANY WARRANTY; without even the implied warranty of 1238388f7eSRichard Henderson# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 1338388f7eSRichard Henderson# Lesser General Public License for more details. 1438388f7eSRichard Henderson# 1538388f7eSRichard Henderson# You should have received a copy of the GNU Lesser General Public 1638388f7eSRichard Henderson# License along with this library; if not, see <http://www.gnu.org/licenses/>. 1738388f7eSRichard Henderson 1838388f7eSRichard Henderson# 1938388f7eSRichard Henderson# This file is processed by scripts/decodetree.py 2038388f7eSRichard Henderson# 2138388f7eSRichard Henderson 2238388f7eSRichard Henderson########################################################################### 23d1822297SRichard Henderson# Named fields. These are primarily for disjoint fields. 24d1822297SRichard Henderson 2524e82e68SRichard Henderson%imm4_16_p1 16:4 !function=plus1 26ccd841c3SRichard Henderson%imm6_22_5 22:1 5:5 2730562ab7SRichard Henderson%imm7_22_16 22:2 16:5 28b94f8f60SRichard Henderson%imm8_16_10 16:5 10:3 29d1822297SRichard Henderson%imm9_16_10 16:s6 10:3 301a039c7eSRichard Henderson%size_23 23:2 3168459864SRichard Henderson%dtype_23_13 23:2 13:2 32d1822297SRichard Henderson 33ccd841c3SRichard Henderson# A combination of tsz:imm3 -- extract esize. 34ccd841c3SRichard Henderson%tszimm_esz 22:2 5:5 !function=tszimm_esz 35ccd841c3SRichard Henderson# A combination of tsz:imm3 -- extract (2 * esize) - (tsz:imm3) 36ccd841c3SRichard Henderson%tszimm_shr 22:2 5:5 !function=tszimm_shr 37ccd841c3SRichard Henderson# A combination of tsz:imm3 -- extract (tsz:imm3) - esize 38ccd841c3SRichard Henderson%tszimm_shl 22:2 5:5 !function=tszimm_shl 39ccd841c3SRichard Henderson 40d9d78dccSRichard Henderson# Similarly for the tszh/tszl pair at 22/16 for zzi 41d9d78dccSRichard Henderson%tszimm16_esz 22:2 16:5 !function=tszimm_esz 42d9d78dccSRichard Henderson%tszimm16_shr 22:2 16:5 !function=tszimm_shr 43d9d78dccSRichard Henderson%tszimm16_shl 22:2 16:5 !function=tszimm_shl 44d9d78dccSRichard Henderson 45f25a2361SRichard Henderson# Signed 8-bit immediate, optionally shifted left by 8. 46f25a2361SRichard Henderson%sh8_i8s 5:9 !function=expand_imm_sh8s 476e6a157dSRichard Henderson# Unsigned 8-bit immediate, optionally shifted left by 8. 486e6a157dSRichard Henderson%sh8_i8u 5:9 !function=expand_imm_sh8u 49f25a2361SRichard Henderson 50c4e7c493SRichard Henderson# Unsigned load of msz into esz=2, represented as a dtype. 51c4e7c493SRichard Henderson%msz_dtype 23:2 !function=msz_dtype 52c4e7c493SRichard Henderson 53f97cfd59SRichard Henderson# Either a copy of rd (at bit 0), or a different source 54f97cfd59SRichard Henderson# as propagated via the MOVPRFX instruction. 55f97cfd59SRichard Henderson%reg_movprfx 0:5 56f97cfd59SRichard Henderson 57d1822297SRichard Henderson########################################################################### 5838388f7eSRichard Henderson# Named attribute sets. These are used to make nice(er) names 5938388f7eSRichard Henderson# when creating helpers common to those for the individual 6038388f7eSRichard Henderson# instruction patterns. 6138388f7eSRichard Henderson 62028e2a7bSRichard Henderson&rr_esz rd rn esz 63d1822297SRichard Henderson&rri rd rn imm 64e1fa1164SRichard Henderson&rr_dbm rd rn dbm 654b242d9cSRichard Henderson&rrri rd rn rm imm 66d9d78dccSRichard Henderson&rri_esz rd rn imm esz 6738388f7eSRichard Henderson&rrr_esz rd rn rm esz 68047cec97SRichard Henderson&rpr_esz rd pg rn esz 6935da316fSRichard Henderson&rpr_s rd pg rn s 70516e246aSRichard Henderson&rprr_s rd pg rn rm s 71f97cfd59SRichard Henderson&rprr_esz rd pg rn rm esz 7296a36e4aSRichard Henderson&rprrr_esz rd pg rn rm ra esz 73ccd841c3SRichard Henderson&rpri_esz rd pg rn imm esz 7424e82e68SRichard Henderson&ptrue rd esz pat s 7524e82e68SRichard Henderson&incdec_cnt rd pat esz imm d u 7624e82e68SRichard Henderson&incdec2_cnt rd rn pat esz imm d u 779ee3a611SRichard Henderson&incdec_pred rd pg esz d u 789ee3a611SRichard Henderson&incdec2_pred rd rn pg esz d u 79c4e7c493SRichard Henderson&rprr_load rd pg rn rm dtype nreg 80c4e7c493SRichard Henderson&rpri_load rd pg rn imm dtype nreg 811a039c7eSRichard Henderson&rprr_store rd pg rn rm msz esz nreg 821a039c7eSRichard Henderson&rpri_store rd pg rn imm msz esz nreg 83*f6dbf62aSRichard Henderson&rprr_scatter_store rd pg rn rm esz msz xs scale 8438388f7eSRichard Henderson 8538388f7eSRichard Henderson########################################################################### 8638388f7eSRichard Henderson# Named instruction formats. These are generally used to 8738388f7eSRichard Henderson# reduce the amount of duplication between instruction patterns. 8838388f7eSRichard Henderson 89028e2a7bSRichard Henderson# Two operand with unused vector element size 90028e2a7bSRichard Henderson@pd_pn_e0 ........ ........ ....... rn:4 . rd:4 &rr_esz esz=0 91028e2a7bSRichard Henderson 92028e2a7bSRichard Henderson# Two operand 93028e2a7bSRichard Henderson@pd_pn ........ esz:2 .. .... ....... rn:4 . rd:4 &rr_esz 940762cd42SRichard Henderson@rd_rn ........ esz:2 ...... ...... rn:5 rd:5 &rr_esz 95028e2a7bSRichard Henderson 9635da316fSRichard Henderson# Two operand with governing predicate, flags setting 9735da316fSRichard Henderson@pd_pg_pn_s ........ . s:1 ...... .. pg:4 . rn:4 . rd:4 &rpr_s 9835da316fSRichard Henderson 9938388f7eSRichard Henderson# Three operand with unused vector element size 10038388f7eSRichard Henderson@rd_rn_rm_e0 ........ ... rm:5 ... ... rn:5 rd:5 &rrr_esz esz=0 10138388f7eSRichard Henderson 102516e246aSRichard Henderson# Three predicate operand, with governing predicate, flag setting 103516e246aSRichard Henderson@pd_pg_pn_pm_s ........ . s:1 .. rm:4 .. pg:4 . rn:4 . rd:4 &rprr_s 104516e246aSRichard Henderson 105fea98f9cSRichard Henderson# Three operand, vector element size 106fea98f9cSRichard Henderson@rd_rn_rm ........ esz:2 . rm:5 ... ... rn:5 rd:5 &rrr_esz 107d731d8cbSRichard Henderson@pd_pn_pm ........ esz:2 .. rm:4 ....... rn:4 . rd:4 &rrr_esz 10830562ab7SRichard Henderson@rdn_rm ........ esz:2 ...... ...... rm:5 rd:5 \ 10930562ab7SRichard Henderson &rrr_esz rn=%reg_movprfx 1106e6a157dSRichard Henderson@rdn_sh_i8u ........ esz:2 ...... ...... ..... rd:5 \ 1116e6a157dSRichard Henderson &rri_esz rn=%reg_movprfx imm=%sh8_i8u 1126e6a157dSRichard Henderson@rdn_i8u ........ esz:2 ...... ... imm:8 rd:5 \ 1136e6a157dSRichard Henderson &rri_esz rn=%reg_movprfx 1146e6a157dSRichard Henderson@rdn_i8s ........ esz:2 ...... ... imm:s8 rd:5 \ 1156e6a157dSRichard Henderson &rri_esz rn=%reg_movprfx 116fea98f9cSRichard Henderson 1174b242d9cSRichard Henderson# Three operand with "memory" size, aka immediate left shift 1184b242d9cSRichard Henderson@rd_rn_msz_rm ........ ... rm:5 .... imm:2 rn:5 rd:5 &rrri 1194b242d9cSRichard Henderson 120f97cfd59SRichard Henderson# Two register operand, with governing predicate, vector element size 121f97cfd59SRichard Henderson@rdn_pg_rm ........ esz:2 ... ... ... pg:3 rm:5 rd:5 \ 122f97cfd59SRichard Henderson &rprr_esz rn=%reg_movprfx 123f97cfd59SRichard Henderson@rdm_pg_rn ........ esz:2 ... ... ... pg:3 rn:5 rd:5 \ 124f97cfd59SRichard Henderson &rprr_esz rm=%reg_movprfx 125d3fe4a29SRichard Henderson@rd_pg4_rn_rm ........ esz:2 . rm:5 .. pg:4 rn:5 rd:5 &rprr_esz 126757f9cffSRichard Henderson@pd_pg_rn_rm ........ esz:2 . rm:5 ... pg:3 rn:5 . rd:4 &rprr_esz 127f97cfd59SRichard Henderson 12896a36e4aSRichard Henderson# Three register operand, with governing predicate, vector element size 12996a36e4aSRichard Henderson@rda_pg_rn_rm ........ esz:2 . rm:5 ... pg:3 rn:5 rd:5 \ 13096a36e4aSRichard Henderson &rprrr_esz ra=%reg_movprfx 13196a36e4aSRichard Henderson@rdn_pg_ra_rm ........ esz:2 . rm:5 ... pg:3 ra:5 rd:5 \ 13296a36e4aSRichard Henderson &rprrr_esz rn=%reg_movprfx 1336ceabaadSRichard Henderson@rdn_pg_rm_ra ........ esz:2 . ra:5 ... pg:3 rm:5 rd:5 \ 1346ceabaadSRichard Henderson &rprrr_esz rn=%reg_movprfx 13596a36e4aSRichard Henderson 136047cec97SRichard Henderson# One register operand, with governing predicate, vector element size 137047cec97SRichard Henderson@rd_pg_rn ........ esz:2 ... ... ... pg:3 rn:5 rd:5 &rpr_esz 1389ee3a611SRichard Henderson@rd_pg4_pn ........ esz:2 ... ... .. pg:4 . rn:4 rd:5 &rpr_esz 139047cec97SRichard Henderson 1408092c6a3SRichard Henderson# One register operand, with governing predicate, no vector element size 1418092c6a3SRichard Henderson@rd_pg_rn_e0 ........ .. ... ... ... pg:3 rn:5 rd:5 &rpr_esz esz=0 1428092c6a3SRichard Henderson 14396f922ccSRichard Henderson# Two register operands with a 6-bit signed immediate. 14496f922ccSRichard Henderson@rd_rn_i6 ........ ... rn:5 ..... imm:s6 rd:5 &rri 14596f922ccSRichard Henderson 146ccd841c3SRichard Henderson# Two register operand, one immediate operand, with predicate, 147ccd841c3SRichard Henderson# element size encoded as TSZHL. User must fill in imm. 148ccd841c3SRichard Henderson@rdn_pg_tszimm ........ .. ... ... ... pg:3 ..... rd:5 \ 149ccd841c3SRichard Henderson &rpri_esz rn=%reg_movprfx esz=%tszimm_esz 150ccd841c3SRichard Henderson 151d9d78dccSRichard Henderson# Similarly without predicate. 152d9d78dccSRichard Henderson@rd_rn_tszimm ........ .. ... ... ...... rn:5 rd:5 \ 153d9d78dccSRichard Henderson &rri_esz esz=%tszimm16_esz 154d9d78dccSRichard Henderson 155f25a2361SRichard Henderson# Two register operand, one immediate operand, with 4-bit predicate. 156f25a2361SRichard Henderson# User must fill in imm. 157f25a2361SRichard Henderson@rdn_pg4 ........ esz:2 .. pg:4 ... ........ rd:5 \ 158f25a2361SRichard Henderson &rpri_esz rn=%reg_movprfx 159f25a2361SRichard Henderson 160e1fa1164SRichard Henderson# Two register operand, one encoded bitmask. 161e1fa1164SRichard Henderson@rdn_dbm ........ .. .... dbm:13 rd:5 \ 162e1fa1164SRichard Henderson &rr_dbm rn=%reg_movprfx 163e1fa1164SRichard Henderson 16438cadebaSRichard Henderson# Predicate output, vector and immediate input, 16538cadebaSRichard Henderson# controlling predicate, element size. 16638cadebaSRichard Henderson@pd_pg_rn_i7 ........ esz:2 . imm:7 . pg:3 rn:5 . rd:4 &rpri_esz 16738cadebaSRichard Henderson@pd_pg_rn_i5 ........ esz:2 . imm:s5 ... pg:3 rn:5 . rd:4 &rpri_esz 16838cadebaSRichard Henderson 169d1822297SRichard Henderson# Basic Load/Store with 9-bit immediate offset 170d1822297SRichard Henderson@pd_rn_i9 ........ ........ ...... rn:5 . rd:4 \ 171d1822297SRichard Henderson &rri imm=%imm9_16_10 172d1822297SRichard Henderson@rd_rn_i9 ........ ........ ...... rn:5 rd:5 \ 173d1822297SRichard Henderson &rri imm=%imm9_16_10 174d1822297SRichard Henderson 17524e82e68SRichard Henderson# One register, pattern, and uint4+1. 17624e82e68SRichard Henderson# User must fill in U and D. 17724e82e68SRichard Henderson@incdec_cnt ........ esz:2 .. .... ...... pat:5 rd:5 \ 17824e82e68SRichard Henderson &incdec_cnt imm=%imm4_16_p1 17924e82e68SRichard Henderson@incdec2_cnt ........ esz:2 .. .... ...... pat:5 rd:5 \ 18024e82e68SRichard Henderson &incdec2_cnt imm=%imm4_16_p1 rn=%reg_movprfx 18124e82e68SRichard Henderson 1829ee3a611SRichard Henderson# One register, predicate. 1839ee3a611SRichard Henderson# User must fill in U and D. 1849ee3a611SRichard Henderson@incdec_pred ........ esz:2 .... .. ..... .. pg:4 rd:5 &incdec_pred 1859ee3a611SRichard Henderson@incdec2_pred ........ esz:2 .... .. ..... .. pg:4 rd:5 \ 1869ee3a611SRichard Henderson &incdec2_pred rn=%reg_movprfx 1879ee3a611SRichard Henderson 188c4e7c493SRichard Henderson# Loads; user must fill in NREG. 189c4e7c493SRichard Henderson@rprr_load_dt ....... dtype:4 rm:5 ... pg:3 rn:5 rd:5 &rprr_load 190c4e7c493SRichard Henderson@rpri_load_dt ....... dtype:4 . imm:s4 ... pg:3 rn:5 rd:5 &rpri_load 191c4e7c493SRichard Henderson 192c4e7c493SRichard Henderson@rprr_load_msz ....... .... rm:5 ... pg:3 rn:5 rd:5 \ 193c4e7c493SRichard Henderson &rprr_load dtype=%msz_dtype 194c4e7c493SRichard Henderson@rpri_load_msz ....... .... . imm:s4 ... pg:3 rn:5 rd:5 \ 195c4e7c493SRichard Henderson &rpri_load dtype=%msz_dtype 196c4e7c493SRichard Henderson 1971a039c7eSRichard Henderson# Stores; user must fill in ESZ, MSZ, NREG as needed. 1981a039c7eSRichard Henderson@rprr_store ....... .. .. rm:5 ... pg:3 rn:5 rd:5 &rprr_store 1991a039c7eSRichard Henderson@rpri_store_msz ....... msz:2 .. . imm:s4 ... pg:3 rn:5 rd:5 &rpri_store 2001a039c7eSRichard Henderson@rprr_store_esz_n0 ....... .. esz:2 rm:5 ... pg:3 rn:5 rd:5 \ 2011a039c7eSRichard Henderson &rprr_store nreg=0 202*f6dbf62aSRichard Henderson@rprr_scatter_store ....... msz:2 .. rm:5 ... pg:3 rn:5 rd:5 \ 203*f6dbf62aSRichard Henderson &rprr_scatter_store 2041a039c7eSRichard Henderson 20538388f7eSRichard Henderson########################################################################### 20638388f7eSRichard Henderson# Instruction patterns. Grouped according to the SVE encodingindex.xhtml. 20738388f7eSRichard Henderson 208f97cfd59SRichard Henderson### SVE Integer Arithmetic - Binary Predicated Group 209f97cfd59SRichard Henderson 210f97cfd59SRichard Henderson# SVE bitwise logical vector operations (predicated) 211f97cfd59SRichard HendersonORR_zpzz 00000100 .. 011 000 000 ... ..... ..... @rdn_pg_rm 212f97cfd59SRichard HendersonEOR_zpzz 00000100 .. 011 001 000 ... ..... ..... @rdn_pg_rm 213f97cfd59SRichard HendersonAND_zpzz 00000100 .. 011 010 000 ... ..... ..... @rdn_pg_rm 214f97cfd59SRichard HendersonBIC_zpzz 00000100 .. 011 011 000 ... ..... ..... @rdn_pg_rm 215f97cfd59SRichard Henderson 216f97cfd59SRichard Henderson# SVE integer add/subtract vectors (predicated) 217f97cfd59SRichard HendersonADD_zpzz 00000100 .. 000 000 000 ... ..... ..... @rdn_pg_rm 218f97cfd59SRichard HendersonSUB_zpzz 00000100 .. 000 001 000 ... ..... ..... @rdn_pg_rm 219f97cfd59SRichard HendersonSUB_zpzz 00000100 .. 000 011 000 ... ..... ..... @rdm_pg_rn # SUBR 220f97cfd59SRichard Henderson 221f97cfd59SRichard Henderson# SVE integer min/max/difference (predicated) 222f97cfd59SRichard HendersonSMAX_zpzz 00000100 .. 001 000 000 ... ..... ..... @rdn_pg_rm 223f97cfd59SRichard HendersonUMAX_zpzz 00000100 .. 001 001 000 ... ..... ..... @rdn_pg_rm 224f97cfd59SRichard HendersonSMIN_zpzz 00000100 .. 001 010 000 ... ..... ..... @rdn_pg_rm 225f97cfd59SRichard HendersonUMIN_zpzz 00000100 .. 001 011 000 ... ..... ..... @rdn_pg_rm 226f97cfd59SRichard HendersonSABD_zpzz 00000100 .. 001 100 000 ... ..... ..... @rdn_pg_rm 227f97cfd59SRichard HendersonUABD_zpzz 00000100 .. 001 101 000 ... ..... ..... @rdn_pg_rm 228f97cfd59SRichard Henderson 229f97cfd59SRichard Henderson# SVE integer multiply/divide (predicated) 230f97cfd59SRichard HendersonMUL_zpzz 00000100 .. 010 000 000 ... ..... ..... @rdn_pg_rm 231f97cfd59SRichard HendersonSMULH_zpzz 00000100 .. 010 010 000 ... ..... ..... @rdn_pg_rm 232f97cfd59SRichard HendersonUMULH_zpzz 00000100 .. 010 011 000 ... ..... ..... @rdn_pg_rm 233f97cfd59SRichard Henderson# Note that divide requires size >= 2; below 2 is unallocated. 234f97cfd59SRichard HendersonSDIV_zpzz 00000100 .. 010 100 000 ... ..... ..... @rdn_pg_rm 235f97cfd59SRichard HendersonUDIV_zpzz 00000100 .. 010 101 000 ... ..... ..... @rdn_pg_rm 236f97cfd59SRichard HendersonSDIV_zpzz 00000100 .. 010 110 000 ... ..... ..... @rdm_pg_rn # SDIVR 237f97cfd59SRichard HendersonUDIV_zpzz 00000100 .. 010 111 000 ... ..... ..... @rdm_pg_rn # UDIVR 238f97cfd59SRichard Henderson 239047cec97SRichard Henderson### SVE Integer Reduction Group 240047cec97SRichard Henderson 241047cec97SRichard Henderson# SVE bitwise logical reduction (predicated) 242047cec97SRichard HendersonORV 00000100 .. 011 000 001 ... ..... ..... @rd_pg_rn 243047cec97SRichard HendersonEORV 00000100 .. 011 001 001 ... ..... ..... @rd_pg_rn 244047cec97SRichard HendersonANDV 00000100 .. 011 010 001 ... ..... ..... @rd_pg_rn 245047cec97SRichard Henderson 246047cec97SRichard Henderson# SVE integer add reduction (predicated) 247047cec97SRichard Henderson# Note that saddv requires size != 3. 248047cec97SRichard HendersonUADDV 00000100 .. 000 001 001 ... ..... ..... @rd_pg_rn 249047cec97SRichard HendersonSADDV 00000100 .. 000 000 001 ... ..... ..... @rd_pg_rn 250047cec97SRichard Henderson 251047cec97SRichard Henderson# SVE integer min/max reduction (predicated) 252047cec97SRichard HendersonSMAXV 00000100 .. 001 000 001 ... ..... ..... @rd_pg_rn 253047cec97SRichard HendersonUMAXV 00000100 .. 001 001 001 ... ..... ..... @rd_pg_rn 254047cec97SRichard HendersonSMINV 00000100 .. 001 010 001 ... ..... ..... @rd_pg_rn 255047cec97SRichard HendersonUMINV 00000100 .. 001 011 001 ... ..... ..... @rd_pg_rn 256047cec97SRichard Henderson 257ccd841c3SRichard Henderson### SVE Shift by Immediate - Predicated Group 258ccd841c3SRichard Henderson 259ccd841c3SRichard Henderson# SVE bitwise shift by immediate (predicated) 260ccd841c3SRichard HendersonASR_zpzi 00000100 .. 000 000 100 ... .. ... ..... \ 261ccd841c3SRichard Henderson @rdn_pg_tszimm imm=%tszimm_shr 262ccd841c3SRichard HendersonLSR_zpzi 00000100 .. 000 001 100 ... .. ... ..... \ 263ccd841c3SRichard Henderson @rdn_pg_tszimm imm=%tszimm_shr 264ccd841c3SRichard HendersonLSL_zpzi 00000100 .. 000 011 100 ... .. ... ..... \ 265ccd841c3SRichard Henderson @rdn_pg_tszimm imm=%tszimm_shl 266ccd841c3SRichard HendersonASRD 00000100 .. 000 100 100 ... .. ... ..... \ 267ccd841c3SRichard Henderson @rdn_pg_tszimm imm=%tszimm_shr 268ccd841c3SRichard Henderson 26927721dbbSRichard Henderson# SVE bitwise shift by vector (predicated) 27027721dbbSRichard HendersonASR_zpzz 00000100 .. 010 000 100 ... ..... ..... @rdn_pg_rm 27127721dbbSRichard HendersonLSR_zpzz 00000100 .. 010 001 100 ... ..... ..... @rdn_pg_rm 27227721dbbSRichard HendersonLSL_zpzz 00000100 .. 010 011 100 ... ..... ..... @rdn_pg_rm 27327721dbbSRichard HendersonASR_zpzz 00000100 .. 010 100 100 ... ..... ..... @rdm_pg_rn # ASRR 27427721dbbSRichard HendersonLSR_zpzz 00000100 .. 010 101 100 ... ..... ..... @rdm_pg_rn # LSRR 27527721dbbSRichard HendersonLSL_zpzz 00000100 .. 010 111 100 ... ..... ..... @rdm_pg_rn # LSLR 27627721dbbSRichard Henderson 277fe7f8dfbSRichard Henderson# SVE bitwise shift by wide elements (predicated) 278fe7f8dfbSRichard Henderson# Note these require size != 3. 279fe7f8dfbSRichard HendersonASR_zpzw 00000100 .. 011 000 100 ... ..... ..... @rdn_pg_rm 280fe7f8dfbSRichard HendersonLSR_zpzw 00000100 .. 011 001 100 ... ..... ..... @rdn_pg_rm 281fe7f8dfbSRichard HendersonLSL_zpzw 00000100 .. 011 011 100 ... ..... ..... @rdn_pg_rm 282fe7f8dfbSRichard Henderson 283afac6d04SRichard Henderson### SVE Integer Arithmetic - Unary Predicated Group 284afac6d04SRichard Henderson 285afac6d04SRichard Henderson# SVE unary bit operations (predicated) 286afac6d04SRichard Henderson# Note esz != 0 for FABS and FNEG. 287afac6d04SRichard HendersonCLS 00000100 .. 011 000 101 ... ..... ..... @rd_pg_rn 288afac6d04SRichard HendersonCLZ 00000100 .. 011 001 101 ... ..... ..... @rd_pg_rn 289afac6d04SRichard HendersonCNT_zpz 00000100 .. 011 010 101 ... ..... ..... @rd_pg_rn 290afac6d04SRichard HendersonCNOT 00000100 .. 011 011 101 ... ..... ..... @rd_pg_rn 291afac6d04SRichard HendersonNOT_zpz 00000100 .. 011 110 101 ... ..... ..... @rd_pg_rn 292afac6d04SRichard HendersonFABS 00000100 .. 011 100 101 ... ..... ..... @rd_pg_rn 293afac6d04SRichard HendersonFNEG 00000100 .. 011 101 101 ... ..... ..... @rd_pg_rn 294afac6d04SRichard Henderson 295afac6d04SRichard Henderson# SVE integer unary operations (predicated) 296afac6d04SRichard Henderson# Note esz > original size for extensions. 297afac6d04SRichard HendersonABS 00000100 .. 010 110 101 ... ..... ..... @rd_pg_rn 298afac6d04SRichard HendersonNEG 00000100 .. 010 111 101 ... ..... ..... @rd_pg_rn 299afac6d04SRichard HendersonSXTB 00000100 .. 010 000 101 ... ..... ..... @rd_pg_rn 300afac6d04SRichard HendersonUXTB 00000100 .. 010 001 101 ... ..... ..... @rd_pg_rn 301afac6d04SRichard HendersonSXTH 00000100 .. 010 010 101 ... ..... ..... @rd_pg_rn 302afac6d04SRichard HendersonUXTH 00000100 .. 010 011 101 ... ..... ..... @rd_pg_rn 303afac6d04SRichard HendersonSXTW 00000100 .. 010 100 101 ... ..... ..... @rd_pg_rn 304afac6d04SRichard HendersonUXTW 00000100 .. 010 101 101 ... ..... ..... @rd_pg_rn 305afac6d04SRichard Henderson 30696a36e4aSRichard Henderson### SVE Integer Multiply-Add Group 30796a36e4aSRichard Henderson 30896a36e4aSRichard Henderson# SVE integer multiply-add writing addend (predicated) 30996a36e4aSRichard HendersonMLA 00000100 .. 0 ..... 010 ... ..... ..... @rda_pg_rn_rm 31096a36e4aSRichard HendersonMLS 00000100 .. 0 ..... 011 ... ..... ..... @rda_pg_rn_rm 31196a36e4aSRichard Henderson 31296a36e4aSRichard Henderson# SVE integer multiply-add writing multiplicand (predicated) 31396a36e4aSRichard HendersonMLA 00000100 .. 0 ..... 110 ... ..... ..... @rdn_pg_ra_rm # MAD 31496a36e4aSRichard HendersonMLS 00000100 .. 0 ..... 111 ... ..... ..... @rdn_pg_ra_rm # MSB 31596a36e4aSRichard Henderson 316fea98f9cSRichard Henderson### SVE Integer Arithmetic - Unpredicated Group 317fea98f9cSRichard Henderson 318fea98f9cSRichard Henderson# SVE integer add/subtract vectors (unpredicated) 319fea98f9cSRichard HendersonADD_zzz 00000100 .. 1 ..... 000 000 ..... ..... @rd_rn_rm 320fea98f9cSRichard HendersonSUB_zzz 00000100 .. 1 ..... 000 001 ..... ..... @rd_rn_rm 321fea98f9cSRichard HendersonSQADD_zzz 00000100 .. 1 ..... 000 100 ..... ..... @rd_rn_rm 322fea98f9cSRichard HendersonUQADD_zzz 00000100 .. 1 ..... 000 101 ..... ..... @rd_rn_rm 323fea98f9cSRichard HendersonSQSUB_zzz 00000100 .. 1 ..... 000 110 ..... ..... @rd_rn_rm 324fea98f9cSRichard HendersonUQSUB_zzz 00000100 .. 1 ..... 000 111 ..... ..... @rd_rn_rm 325fea98f9cSRichard Henderson 32638388f7eSRichard Henderson### SVE Logical - Unpredicated Group 32738388f7eSRichard Henderson 32838388f7eSRichard Henderson# SVE bitwise logical operations (unpredicated) 32938388f7eSRichard HendersonAND_zzz 00000100 00 1 ..... 001 100 ..... ..... @rd_rn_rm_e0 33038388f7eSRichard HendersonORR_zzz 00000100 01 1 ..... 001 100 ..... ..... @rd_rn_rm_e0 33138388f7eSRichard HendersonEOR_zzz 00000100 10 1 ..... 001 100 ..... ..... @rd_rn_rm_e0 33238388f7eSRichard HendersonBIC_zzz 00000100 11 1 ..... 001 100 ..... ..... @rd_rn_rm_e0 333d1822297SRichard Henderson 3349a56c9c3SRichard Henderson### SVE Index Generation Group 3359a56c9c3SRichard Henderson 3369a56c9c3SRichard Henderson# SVE index generation (immediate start, immediate increment) 3379a56c9c3SRichard HendersonINDEX_ii 00000100 esz:2 1 imm2:s5 010000 imm1:s5 rd:5 3389a56c9c3SRichard Henderson 3399a56c9c3SRichard Henderson# SVE index generation (immediate start, register increment) 3409a56c9c3SRichard HendersonINDEX_ir 00000100 esz:2 1 rm:5 010010 imm:s5 rd:5 3419a56c9c3SRichard Henderson 3429a56c9c3SRichard Henderson# SVE index generation (register start, immediate increment) 3439a56c9c3SRichard HendersonINDEX_ri 00000100 esz:2 1 imm:s5 010001 rn:5 rd:5 3449a56c9c3SRichard Henderson 3459a56c9c3SRichard Henderson# SVE index generation (register start, register increment) 3469a56c9c3SRichard HendersonINDEX_rr 00000100 .. 1 ..... 010011 ..... ..... @rd_rn_rm 3479a56c9c3SRichard Henderson 34896f922ccSRichard Henderson### SVE Stack Allocation Group 34996f922ccSRichard Henderson 35096f922ccSRichard Henderson# SVE stack frame adjustment 35196f922ccSRichard HendersonADDVL 00000100 001 ..... 01010 ...... ..... @rd_rn_i6 35296f922ccSRichard HendersonADDPL 00000100 011 ..... 01010 ...... ..... @rd_rn_i6 35396f922ccSRichard Henderson 35496f922ccSRichard Henderson# SVE stack frame size 35596f922ccSRichard HendersonRDVL 00000100 101 11111 01010 imm:s6 rd:5 35696f922ccSRichard Henderson 357d9d78dccSRichard Henderson### SVE Bitwise Shift - Unpredicated Group 358d9d78dccSRichard Henderson 359d9d78dccSRichard Henderson# SVE bitwise shift by immediate (unpredicated) 360d9d78dccSRichard HendersonASR_zzi 00000100 .. 1 ..... 1001 00 ..... ..... \ 361d9d78dccSRichard Henderson @rd_rn_tszimm imm=%tszimm16_shr 362d9d78dccSRichard HendersonLSR_zzi 00000100 .. 1 ..... 1001 01 ..... ..... \ 363d9d78dccSRichard Henderson @rd_rn_tszimm imm=%tszimm16_shr 364d9d78dccSRichard HendersonLSL_zzi 00000100 .. 1 ..... 1001 11 ..... ..... \ 365d9d78dccSRichard Henderson @rd_rn_tszimm imm=%tszimm16_shl 366d9d78dccSRichard Henderson 367d9d78dccSRichard Henderson# SVE bitwise shift by wide elements (unpredicated) 368d9d78dccSRichard Henderson# Note esz != 3 369d9d78dccSRichard HendersonASR_zzw 00000100 .. 1 ..... 1000 00 ..... ..... @rd_rn_rm 370d9d78dccSRichard HendersonLSR_zzw 00000100 .. 1 ..... 1000 01 ..... ..... @rd_rn_rm 371d9d78dccSRichard HendersonLSL_zzw 00000100 .. 1 ..... 1000 11 ..... ..... @rd_rn_rm 372d9d78dccSRichard Henderson 3734b242d9cSRichard Henderson### SVE Compute Vector Address Group 3744b242d9cSRichard Henderson 3754b242d9cSRichard Henderson# SVE vector address generation 3764b242d9cSRichard HendersonADR_s32 00000100 00 1 ..... 1010 .. ..... ..... @rd_rn_msz_rm 3774b242d9cSRichard HendersonADR_u32 00000100 01 1 ..... 1010 .. ..... ..... @rd_rn_msz_rm 3784b242d9cSRichard HendersonADR_p32 00000100 10 1 ..... 1010 .. ..... ..... @rd_rn_msz_rm 3794b242d9cSRichard HendersonADR_p64 00000100 11 1 ..... 1010 .. ..... ..... @rd_rn_msz_rm 3804b242d9cSRichard Henderson 3810762cd42SRichard Henderson### SVE Integer Misc - Unpredicated Group 3820762cd42SRichard Henderson 3830762cd42SRichard Henderson# SVE floating-point exponential accelerator 3840762cd42SRichard Henderson# Note esz != 0 3850762cd42SRichard HendersonFEXPA 00000100 .. 1 00000 101110 ..... ..... @rd_rn 3860762cd42SRichard Henderson 387a1f233f2SRichard Henderson# SVE floating-point trig select coefficient 388a1f233f2SRichard Henderson# Note esz != 0 389a1f233f2SRichard HendersonFTSSEL 00000100 .. 1 ..... 101100 ..... ..... @rd_rn_rm 390a1f233f2SRichard Henderson 39124e82e68SRichard Henderson### SVE Element Count Group 39224e82e68SRichard Henderson 39324e82e68SRichard Henderson# SVE element count 39424e82e68SRichard HendersonCNT_r 00000100 .. 10 .... 1110 0 0 ..... ..... @incdec_cnt d=0 u=1 39524e82e68SRichard Henderson 39624e82e68SRichard Henderson# SVE inc/dec register by element count 39724e82e68SRichard HendersonINCDEC_r 00000100 .. 11 .... 1110 0 d:1 ..... ..... @incdec_cnt u=1 39824e82e68SRichard Henderson 39924e82e68SRichard Henderson# SVE saturating inc/dec register by element count 40024e82e68SRichard HendersonSINCDEC_r_32 00000100 .. 10 .... 1111 d:1 u:1 ..... ..... @incdec_cnt 40124e82e68SRichard HendersonSINCDEC_r_64 00000100 .. 11 .... 1111 d:1 u:1 ..... ..... @incdec_cnt 40224e82e68SRichard Henderson 40324e82e68SRichard Henderson# SVE inc/dec vector by element count 40424e82e68SRichard Henderson# Note this requires esz != 0. 40524e82e68SRichard HendersonINCDEC_v 00000100 .. 1 1 .... 1100 0 d:1 ..... ..... @incdec2_cnt u=1 40624e82e68SRichard Henderson 40724e82e68SRichard Henderson# SVE saturating inc/dec vector by element count 40824e82e68SRichard Henderson# Note these require esz != 0. 40924e82e68SRichard HendersonSINCDEC_v 00000100 .. 1 0 .... 1100 d:1 u:1 ..... ..... @incdec2_cnt 410516e246aSRichard Henderson 411e1fa1164SRichard Henderson### SVE Bitwise Immediate Group 412e1fa1164SRichard Henderson 413e1fa1164SRichard Henderson# SVE bitwise logical with immediate (unpredicated) 414e1fa1164SRichard HendersonORR_zzi 00000101 00 0000 ............. ..... @rdn_dbm 415e1fa1164SRichard HendersonEOR_zzi 00000101 01 0000 ............. ..... @rdn_dbm 416e1fa1164SRichard HendersonAND_zzi 00000101 10 0000 ............. ..... @rdn_dbm 417e1fa1164SRichard Henderson 418e1fa1164SRichard Henderson# SVE broadcast bitmask immediate 419e1fa1164SRichard HendersonDUPM 00000101 11 0000 dbm:13 rd:5 420e1fa1164SRichard Henderson 421f25a2361SRichard Henderson### SVE Integer Wide Immediate - Predicated Group 422f25a2361SRichard Henderson 423f25a2361SRichard Henderson# SVE copy floating-point immediate (predicated) 424f25a2361SRichard HendersonFCPY 00000101 .. 01 .... 110 imm:8 ..... @rdn_pg4 425f25a2361SRichard Henderson 426f25a2361SRichard Henderson# SVE copy integer immediate (predicated) 427f25a2361SRichard HendersonCPY_m_i 00000101 .. 01 .... 01 . ........ ..... @rdn_pg4 imm=%sh8_i8s 428f25a2361SRichard HendersonCPY_z_i 00000101 .. 01 .... 00 . ........ ..... @rdn_pg4 imm=%sh8_i8s 429f25a2361SRichard Henderson 430b94f8f60SRichard Henderson### SVE Permute - Extract Group 431b94f8f60SRichard Henderson 432b94f8f60SRichard Henderson# SVE extract vector (immediate offset) 433b94f8f60SRichard HendersonEXT 00000101 001 ..... 000 ... rm:5 rd:5 \ 434b94f8f60SRichard Henderson &rrri rn=%reg_movprfx imm=%imm8_16_10 435b94f8f60SRichard Henderson 43630562ab7SRichard Henderson### SVE Permute - Unpredicated Group 43730562ab7SRichard Henderson 43830562ab7SRichard Henderson# SVE broadcast general register 43930562ab7SRichard HendersonDUP_s 00000101 .. 1 00000 001110 ..... ..... @rd_rn 44030562ab7SRichard Henderson 44130562ab7SRichard Henderson# SVE broadcast indexed element 44230562ab7SRichard HendersonDUP_x 00000101 .. 1 ..... 001000 rn:5 rd:5 \ 44330562ab7SRichard Henderson &rri imm=%imm7_22_16 44430562ab7SRichard Henderson 44530562ab7SRichard Henderson# SVE insert SIMD&FP scalar register 44630562ab7SRichard HendersonINSR_f 00000101 .. 1 10100 001110 ..... ..... @rdn_rm 44730562ab7SRichard Henderson 44830562ab7SRichard Henderson# SVE insert general register 44930562ab7SRichard HendersonINSR_r 00000101 .. 1 00100 001110 ..... ..... @rdn_rm 45030562ab7SRichard Henderson 45130562ab7SRichard Henderson# SVE reverse vector elements 45230562ab7SRichard HendersonREV_v 00000101 .. 1 11000 001110 ..... ..... @rd_rn 45330562ab7SRichard Henderson 45430562ab7SRichard Henderson# SVE vector table lookup 45530562ab7SRichard HendersonTBL 00000101 .. 1 ..... 001100 ..... ..... @rd_rn_rm 45630562ab7SRichard Henderson 45730562ab7SRichard Henderson# SVE unpack vector elements 45830562ab7SRichard HendersonUNPK 00000101 esz:2 1100 u:1 h:1 001110 rn:5 rd:5 45930562ab7SRichard Henderson 460d731d8cbSRichard Henderson### SVE Permute - Predicates Group 461d731d8cbSRichard Henderson 462d731d8cbSRichard Henderson# SVE permute predicate elements 463d731d8cbSRichard HendersonZIP1_p 00000101 .. 10 .... 010 000 0 .... 0 .... @pd_pn_pm 464d731d8cbSRichard HendersonZIP2_p 00000101 .. 10 .... 010 001 0 .... 0 .... @pd_pn_pm 465d731d8cbSRichard HendersonUZP1_p 00000101 .. 10 .... 010 010 0 .... 0 .... @pd_pn_pm 466d731d8cbSRichard HendersonUZP2_p 00000101 .. 10 .... 010 011 0 .... 0 .... @pd_pn_pm 467d731d8cbSRichard HendersonTRN1_p 00000101 .. 10 .... 010 100 0 .... 0 .... @pd_pn_pm 468d731d8cbSRichard HendersonTRN2_p 00000101 .. 10 .... 010 101 0 .... 0 .... @pd_pn_pm 469d731d8cbSRichard Henderson 470d731d8cbSRichard Henderson# SVE reverse predicate elements 471d731d8cbSRichard HendersonREV_p 00000101 .. 11 0100 010 000 0 .... 0 .... @pd_pn 472d731d8cbSRichard Henderson 473d731d8cbSRichard Henderson# SVE unpack predicate elements 474d731d8cbSRichard HendersonPUNPKLO 00000101 00 11 0000 010 000 0 .... 0 .... @pd_pn_e0 475d731d8cbSRichard HendersonPUNPKHI 00000101 00 11 0001 010 000 0 .... 0 .... @pd_pn_e0 476d731d8cbSRichard Henderson 477234b48e9SRichard Henderson### SVE Permute - Interleaving Group 478234b48e9SRichard Henderson 479234b48e9SRichard Henderson# SVE permute vector elements 480234b48e9SRichard HendersonZIP1_z 00000101 .. 1 ..... 011 000 ..... ..... @rd_rn_rm 481234b48e9SRichard HendersonZIP2_z 00000101 .. 1 ..... 011 001 ..... ..... @rd_rn_rm 482234b48e9SRichard HendersonUZP1_z 00000101 .. 1 ..... 011 010 ..... ..... @rd_rn_rm 483234b48e9SRichard HendersonUZP2_z 00000101 .. 1 ..... 011 011 ..... ..... @rd_rn_rm 484234b48e9SRichard HendersonTRN1_z 00000101 .. 1 ..... 011 100 ..... ..... @rd_rn_rm 485234b48e9SRichard HendersonTRN2_z 00000101 .. 1 ..... 011 101 ..... ..... @rd_rn_rm 486234b48e9SRichard Henderson 4873ca879aeSRichard Henderson### SVE Permute - Predicated Group 4883ca879aeSRichard Henderson 4893ca879aeSRichard Henderson# SVE compress active elements 4903ca879aeSRichard Henderson# Note esz >= 2 4913ca879aeSRichard HendersonCOMPACT 00000101 .. 100001 100 ... ..... ..... @rd_pg_rn 4923ca879aeSRichard Henderson 493ef23cb72SRichard Henderson# SVE conditionally broadcast element to vector 494ef23cb72SRichard HendersonCLASTA_z 00000101 .. 10100 0 100 ... ..... ..... @rdn_pg_rm 495ef23cb72SRichard HendersonCLASTB_z 00000101 .. 10100 1 100 ... ..... ..... @rdn_pg_rm 496ef23cb72SRichard Henderson 497ef23cb72SRichard Henderson# SVE conditionally copy element to SIMD&FP scalar 498ef23cb72SRichard HendersonCLASTA_v 00000101 .. 10101 0 100 ... ..... ..... @rd_pg_rn 499ef23cb72SRichard HendersonCLASTB_v 00000101 .. 10101 1 100 ... ..... ..... @rd_pg_rn 500ef23cb72SRichard Henderson 501ef23cb72SRichard Henderson# SVE conditionally copy element to general register 502ef23cb72SRichard HendersonCLASTA_r 00000101 .. 11000 0 101 ... ..... ..... @rd_pg_rn 503ef23cb72SRichard HendersonCLASTB_r 00000101 .. 11000 1 101 ... ..... ..... @rd_pg_rn 504ef23cb72SRichard Henderson 505ef23cb72SRichard Henderson# SVE copy element to SIMD&FP scalar register 506ef23cb72SRichard HendersonLASTA_v 00000101 .. 10001 0 100 ... ..... ..... @rd_pg_rn 507ef23cb72SRichard HendersonLASTB_v 00000101 .. 10001 1 100 ... ..... ..... @rd_pg_rn 508ef23cb72SRichard Henderson 509ef23cb72SRichard Henderson# SVE copy element to general register 510ef23cb72SRichard HendersonLASTA_r 00000101 .. 10000 0 101 ... ..... ..... @rd_pg_rn 511ef23cb72SRichard HendersonLASTB_r 00000101 .. 10000 1 101 ... ..... ..... @rd_pg_rn 512ef23cb72SRichard Henderson 513792a5578SRichard Henderson# SVE copy element from SIMD&FP scalar register 514792a5578SRichard HendersonCPY_m_v 00000101 .. 100000 100 ... ..... ..... @rd_pg_rn 515792a5578SRichard Henderson 516792a5578SRichard Henderson# SVE copy element from general register to vector (predicated) 517792a5578SRichard HendersonCPY_m_r 00000101 .. 101000 101 ... ..... ..... @rd_pg_rn 518792a5578SRichard Henderson 519dae8fb90SRichard Henderson# SVE reverse within elements 520dae8fb90SRichard Henderson# Note esz >= operation size 521dae8fb90SRichard HendersonREVB 00000101 .. 1001 00 100 ... ..... ..... @rd_pg_rn 522dae8fb90SRichard HendersonREVH 00000101 .. 1001 01 100 ... ..... ..... @rd_pg_rn 523dae8fb90SRichard HendersonREVW 00000101 .. 1001 10 100 ... ..... ..... @rd_pg_rn 524dae8fb90SRichard HendersonRBIT 00000101 .. 1001 11 100 ... ..... ..... @rd_pg_rn 525dae8fb90SRichard Henderson 526b48ff240SRichard Henderson# SVE vector splice (predicated) 527b48ff240SRichard HendersonSPLICE 00000101 .. 101 100 100 ... ..... ..... @rdn_pg_rm 528b48ff240SRichard Henderson 529d3fe4a29SRichard Henderson### SVE Select Vectors Group 530d3fe4a29SRichard Henderson 531d3fe4a29SRichard Henderson# SVE select vector elements (predicated) 532d3fe4a29SRichard HendersonSEL_zpzz 00000101 .. 1 ..... 11 .... ..... ..... @rd_pg4_rn_rm 533d3fe4a29SRichard Henderson 534757f9cffSRichard Henderson### SVE Integer Compare - Vectors Group 535757f9cffSRichard Henderson 536757f9cffSRichard Henderson# SVE integer compare_vectors 537757f9cffSRichard HendersonCMPHS_ppzz 00100100 .. 0 ..... 000 ... ..... 0 .... @pd_pg_rn_rm 538757f9cffSRichard HendersonCMPHI_ppzz 00100100 .. 0 ..... 000 ... ..... 1 .... @pd_pg_rn_rm 539757f9cffSRichard HendersonCMPGE_ppzz 00100100 .. 0 ..... 100 ... ..... 0 .... @pd_pg_rn_rm 540757f9cffSRichard HendersonCMPGT_ppzz 00100100 .. 0 ..... 100 ... ..... 1 .... @pd_pg_rn_rm 541757f9cffSRichard HendersonCMPEQ_ppzz 00100100 .. 0 ..... 101 ... ..... 0 .... @pd_pg_rn_rm 542757f9cffSRichard HendersonCMPNE_ppzz 00100100 .. 0 ..... 101 ... ..... 1 .... @pd_pg_rn_rm 543757f9cffSRichard Henderson 544757f9cffSRichard Henderson# SVE integer compare with wide elements 545757f9cffSRichard Henderson# Note these require esz != 3. 546757f9cffSRichard HendersonCMPEQ_ppzw 00100100 .. 0 ..... 001 ... ..... 0 .... @pd_pg_rn_rm 547757f9cffSRichard HendersonCMPNE_ppzw 00100100 .. 0 ..... 001 ... ..... 1 .... @pd_pg_rn_rm 548757f9cffSRichard HendersonCMPGE_ppzw 00100100 .. 0 ..... 010 ... ..... 0 .... @pd_pg_rn_rm 549757f9cffSRichard HendersonCMPGT_ppzw 00100100 .. 0 ..... 010 ... ..... 1 .... @pd_pg_rn_rm 550757f9cffSRichard HendersonCMPLT_ppzw 00100100 .. 0 ..... 011 ... ..... 0 .... @pd_pg_rn_rm 551757f9cffSRichard HendersonCMPLE_ppzw 00100100 .. 0 ..... 011 ... ..... 1 .... @pd_pg_rn_rm 552757f9cffSRichard HendersonCMPHS_ppzw 00100100 .. 0 ..... 110 ... ..... 0 .... @pd_pg_rn_rm 553757f9cffSRichard HendersonCMPHI_ppzw 00100100 .. 0 ..... 110 ... ..... 1 .... @pd_pg_rn_rm 554757f9cffSRichard HendersonCMPLO_ppzw 00100100 .. 0 ..... 111 ... ..... 0 .... @pd_pg_rn_rm 555757f9cffSRichard HendersonCMPLS_ppzw 00100100 .. 0 ..... 111 ... ..... 1 .... @pd_pg_rn_rm 556757f9cffSRichard Henderson 55738cadebaSRichard Henderson### SVE Integer Compare - Unsigned Immediate Group 55838cadebaSRichard Henderson 55938cadebaSRichard Henderson# SVE integer compare with unsigned immediate 56038cadebaSRichard HendersonCMPHS_ppzi 00100100 .. 1 ....... 0 ... ..... 0 .... @pd_pg_rn_i7 56138cadebaSRichard HendersonCMPHI_ppzi 00100100 .. 1 ....... 0 ... ..... 1 .... @pd_pg_rn_i7 56238cadebaSRichard HendersonCMPLO_ppzi 00100100 .. 1 ....... 1 ... ..... 0 .... @pd_pg_rn_i7 56338cadebaSRichard HendersonCMPLS_ppzi 00100100 .. 1 ....... 1 ... ..... 1 .... @pd_pg_rn_i7 56438cadebaSRichard Henderson 56538cadebaSRichard Henderson### SVE Integer Compare - Signed Immediate Group 56638cadebaSRichard Henderson 56738cadebaSRichard Henderson# SVE integer compare with signed immediate 56838cadebaSRichard HendersonCMPGE_ppzi 00100101 .. 0 ..... 000 ... ..... 0 .... @pd_pg_rn_i5 56938cadebaSRichard HendersonCMPGT_ppzi 00100101 .. 0 ..... 000 ... ..... 1 .... @pd_pg_rn_i5 57038cadebaSRichard HendersonCMPLT_ppzi 00100101 .. 0 ..... 001 ... ..... 0 .... @pd_pg_rn_i5 57138cadebaSRichard HendersonCMPLE_ppzi 00100101 .. 0 ..... 001 ... ..... 1 .... @pd_pg_rn_i5 57238cadebaSRichard HendersonCMPEQ_ppzi 00100101 .. 0 ..... 100 ... ..... 0 .... @pd_pg_rn_i5 57338cadebaSRichard HendersonCMPNE_ppzi 00100101 .. 0 ..... 100 ... ..... 1 .... @pd_pg_rn_i5 57438cadebaSRichard Henderson 575e1fa1164SRichard Henderson### SVE Predicate Logical Operations Group 576e1fa1164SRichard Henderson 577516e246aSRichard Henderson# SVE predicate logical operations 578516e246aSRichard HendersonAND_pppp 00100101 0. 00 .... 01 .... 0 .... 0 .... @pd_pg_pn_pm_s 579516e246aSRichard HendersonBIC_pppp 00100101 0. 00 .... 01 .... 0 .... 1 .... @pd_pg_pn_pm_s 580516e246aSRichard HendersonEOR_pppp 00100101 0. 00 .... 01 .... 1 .... 0 .... @pd_pg_pn_pm_s 581516e246aSRichard HendersonSEL_pppp 00100101 0. 00 .... 01 .... 1 .... 1 .... @pd_pg_pn_pm_s 582516e246aSRichard HendersonORR_pppp 00100101 1. 00 .... 01 .... 0 .... 0 .... @pd_pg_pn_pm_s 583516e246aSRichard HendersonORN_pppp 00100101 1. 00 .... 01 .... 0 .... 1 .... @pd_pg_pn_pm_s 584516e246aSRichard HendersonNOR_pppp 00100101 1. 00 .... 01 .... 1 .... 0 .... @pd_pg_pn_pm_s 585516e246aSRichard HendersonNAND_pppp 00100101 1. 00 .... 01 .... 1 .... 1 .... @pd_pg_pn_pm_s 586516e246aSRichard Henderson 5879e18d7a6SRichard Henderson### SVE Predicate Misc Group 5889e18d7a6SRichard Henderson 5899e18d7a6SRichard Henderson# SVE predicate test 5909e18d7a6SRichard HendersonPTEST 00100101 01 010000 11 pg:4 0 rn:4 0 0000 5919e18d7a6SRichard Henderson 592028e2a7bSRichard Henderson# SVE predicate initialize 593028e2a7bSRichard HendersonPTRUE 00100101 esz:2 01100 s:1 111000 pat:5 0 rd:4 594028e2a7bSRichard Henderson 595028e2a7bSRichard Henderson# SVE initialize FFR 596028e2a7bSRichard HendersonSETFFR 00100101 0010 1100 1001 0000 0000 0000 597028e2a7bSRichard Henderson 598028e2a7bSRichard Henderson# SVE zero predicate register 599028e2a7bSRichard HendersonPFALSE 00100101 0001 1000 1110 0100 0000 rd:4 600028e2a7bSRichard Henderson 601028e2a7bSRichard Henderson# SVE predicate read from FFR (predicated) 602028e2a7bSRichard HendersonRDFFR_p 00100101 0 s:1 0110001111000 pg:4 0 rd:4 603028e2a7bSRichard Henderson 604028e2a7bSRichard Henderson# SVE predicate read from FFR (unpredicated) 605028e2a7bSRichard HendersonRDFFR 00100101 0001 1001 1111 0000 0000 rd:4 606028e2a7bSRichard Henderson 607028e2a7bSRichard Henderson# SVE FFR write from predicate (WRFFR) 608028e2a7bSRichard HendersonWRFFR 00100101 0010 1000 1001 000 rn:4 00000 609028e2a7bSRichard Henderson 610028e2a7bSRichard Henderson# SVE predicate first active 611028e2a7bSRichard HendersonPFIRST 00100101 01 011 000 11000 00 .... 0 .... @pd_pn_e0 612028e2a7bSRichard Henderson 613028e2a7bSRichard Henderson# SVE predicate next active 614028e2a7bSRichard HendersonPNEXT 00100101 .. 011 001 11000 10 .... 0 .... @pd_pn 615028e2a7bSRichard Henderson 61635da316fSRichard Henderson### SVE Partition Break Group 61735da316fSRichard Henderson 61835da316fSRichard Henderson# SVE propagate break from previous partition 61935da316fSRichard HendersonBRKPA 00100101 0. 00 .... 11 .... 0 .... 0 .... @pd_pg_pn_pm_s 62035da316fSRichard HendersonBRKPB 00100101 0. 00 .... 11 .... 0 .... 1 .... @pd_pg_pn_pm_s 62135da316fSRichard Henderson 62235da316fSRichard Henderson# SVE partition break condition 62335da316fSRichard HendersonBRKA_z 00100101 0. 01000001 .... 0 .... 0 .... @pd_pg_pn_s 62435da316fSRichard HendersonBRKB_z 00100101 1. 01000001 .... 0 .... 0 .... @pd_pg_pn_s 62535da316fSRichard HendersonBRKA_m 00100101 0. 01000001 .... 0 .... 1 .... @pd_pg_pn_s 62635da316fSRichard HendersonBRKB_m 00100101 1. 01000001 .... 0 .... 1 .... @pd_pg_pn_s 62735da316fSRichard Henderson 62835da316fSRichard Henderson# SVE propagate break to next partition 62935da316fSRichard HendersonBRKN 00100101 0. 01100001 .... 0 .... 0 .... @pd_pg_pn_s 63035da316fSRichard Henderson 6319ee3a611SRichard Henderson### SVE Predicate Count Group 6329ee3a611SRichard Henderson 6339ee3a611SRichard Henderson# SVE predicate count 6349ee3a611SRichard HendersonCNTP 00100101 .. 100 000 10 .... 0 .... ..... @rd_pg4_pn 6359ee3a611SRichard Henderson 6369ee3a611SRichard Henderson# SVE inc/dec register by predicate count 6379ee3a611SRichard HendersonINCDECP_r 00100101 .. 10110 d:1 10001 00 .... ..... @incdec_pred u=1 6389ee3a611SRichard Henderson 6399ee3a611SRichard Henderson# SVE inc/dec vector by predicate count 6409ee3a611SRichard HendersonINCDECP_z 00100101 .. 10110 d:1 10000 00 .... ..... @incdec2_pred u=1 6419ee3a611SRichard Henderson 6429ee3a611SRichard Henderson# SVE saturating inc/dec register by predicate count 6439ee3a611SRichard HendersonSINCDECP_r_32 00100101 .. 1010 d:1 u:1 10001 00 .... ..... @incdec_pred 6449ee3a611SRichard HendersonSINCDECP_r_64 00100101 .. 1010 d:1 u:1 10001 10 .... ..... @incdec_pred 6459ee3a611SRichard Henderson 6469ee3a611SRichard Henderson# SVE saturating inc/dec vector by predicate count 6479ee3a611SRichard HendersonSINCDECP_z 00100101 .. 1010 d:1 u:1 10000 00 .... ..... @incdec2_pred 6489ee3a611SRichard Henderson 649caf1cefcSRichard Henderson### SVE Integer Compare - Scalars Group 650caf1cefcSRichard Henderson 651caf1cefcSRichard Henderson# SVE conditionally terminate scalars 652caf1cefcSRichard HendersonCTERM 00100101 1 sf:1 1 rm:5 001000 rn:5 ne:1 0000 653caf1cefcSRichard Henderson 654caf1cefcSRichard Henderson# SVE integer compare scalar count and limit 655caf1cefcSRichard HendersonWHILE 00100101 esz:2 1 rm:5 000 sf:1 u:1 1 rn:5 eq:1 rd:4 656caf1cefcSRichard Henderson 657ed491961SRichard Henderson### SVE Integer Wide Immediate - Unpredicated Group 658ed491961SRichard Henderson 659ed491961SRichard Henderson# SVE broadcast floating-point immediate (unpredicated) 660ed491961SRichard HendersonFDUP 00100101 esz:2 111 00 1110 imm:8 rd:5 661ed491961SRichard Henderson 662ed491961SRichard Henderson# SVE broadcast integer immediate (unpredicated) 663ed491961SRichard HendersonDUP_i 00100101 esz:2 111 00 011 . ........ rd:5 imm=%sh8_i8s 664ed491961SRichard Henderson 6656e6a157dSRichard Henderson# SVE integer add/subtract immediate (unpredicated) 6666e6a157dSRichard HendersonADD_zzi 00100101 .. 100 000 11 . ........ ..... @rdn_sh_i8u 6676e6a157dSRichard HendersonSUB_zzi 00100101 .. 100 001 11 . ........ ..... @rdn_sh_i8u 6686e6a157dSRichard HendersonSUBR_zzi 00100101 .. 100 011 11 . ........ ..... @rdn_sh_i8u 6696e6a157dSRichard HendersonSQADD_zzi 00100101 .. 100 100 11 . ........ ..... @rdn_sh_i8u 6706e6a157dSRichard HendersonUQADD_zzi 00100101 .. 100 101 11 . ........ ..... @rdn_sh_i8u 6716e6a157dSRichard HendersonSQSUB_zzi 00100101 .. 100 110 11 . ........ ..... @rdn_sh_i8u 6726e6a157dSRichard HendersonUQSUB_zzi 00100101 .. 100 111 11 . ........ ..... @rdn_sh_i8u 6736e6a157dSRichard Henderson 6746e6a157dSRichard Henderson# SVE integer min/max immediate (unpredicated) 6756e6a157dSRichard HendersonSMAX_zzi 00100101 .. 101 000 110 ........ ..... @rdn_i8s 6766e6a157dSRichard HendersonUMAX_zzi 00100101 .. 101 001 110 ........ ..... @rdn_i8u 6776e6a157dSRichard HendersonSMIN_zzi 00100101 .. 101 010 110 ........ ..... @rdn_i8s 6786e6a157dSRichard HendersonUMIN_zzi 00100101 .. 101 011 110 ........ ..... @rdn_i8u 6796e6a157dSRichard Henderson 6806e6a157dSRichard Henderson# SVE integer multiply immediate (unpredicated) 6816e6a157dSRichard HendersonMUL_zzi 00100101 .. 110 000 110 ........ ..... @rdn_i8s 6826e6a157dSRichard Henderson 6837f9ddf64SRichard Henderson### SVE FP Accumulating Reduction Group 6847f9ddf64SRichard Henderson 6857f9ddf64SRichard Henderson# SVE floating-point serial reduction (predicated) 6867f9ddf64SRichard HendersonFADDA 01100101 .. 011 000 001 ... ..... ..... @rdn_pg_rm 6877f9ddf64SRichard Henderson 68829b80469SRichard Henderson### SVE Floating Point Arithmetic - Unpredicated Group 68929b80469SRichard Henderson 69029b80469SRichard Henderson# SVE floating-point arithmetic (unpredicated) 69129b80469SRichard HendersonFADD_zzz 01100101 .. 0 ..... 000 000 ..... ..... @rd_rn_rm 69229b80469SRichard HendersonFSUB_zzz 01100101 .. 0 ..... 000 001 ..... ..... @rd_rn_rm 69329b80469SRichard HendersonFMUL_zzz 01100101 .. 0 ..... 000 010 ..... ..... @rd_rn_rm 69429b80469SRichard HendersonFTSMUL 01100101 .. 0 ..... 000 011 ..... ..... @rd_rn_rm 69529b80469SRichard HendersonFRECPS 01100101 .. 0 ..... 000 110 ..... ..... @rd_rn_rm 69629b80469SRichard HendersonFRSQRTS 01100101 .. 0 ..... 000 111 ..... ..... @rd_rn_rm 69729b80469SRichard Henderson 698ec3b87c2SRichard Henderson### SVE FP Arithmetic Predicated Group 699ec3b87c2SRichard Henderson 700ec3b87c2SRichard Henderson# SVE floating-point arithmetic (predicated) 701ec3b87c2SRichard HendersonFADD_zpzz 01100101 .. 00 0000 100 ... ..... ..... @rdn_pg_rm 702ec3b87c2SRichard HendersonFSUB_zpzz 01100101 .. 00 0001 100 ... ..... ..... @rdn_pg_rm 703ec3b87c2SRichard HendersonFMUL_zpzz 01100101 .. 00 0010 100 ... ..... ..... @rdn_pg_rm 704ec3b87c2SRichard HendersonFSUB_zpzz 01100101 .. 00 0011 100 ... ..... ..... @rdm_pg_rn # FSUBR 705ec3b87c2SRichard HendersonFMAXNM_zpzz 01100101 .. 00 0100 100 ... ..... ..... @rdn_pg_rm 706ec3b87c2SRichard HendersonFMINNM_zpzz 01100101 .. 00 0101 100 ... ..... ..... @rdn_pg_rm 707ec3b87c2SRichard HendersonFMAX_zpzz 01100101 .. 00 0110 100 ... ..... ..... @rdn_pg_rm 708ec3b87c2SRichard HendersonFMIN_zpzz 01100101 .. 00 0111 100 ... ..... ..... @rdn_pg_rm 709ec3b87c2SRichard HendersonFABD 01100101 .. 00 1000 100 ... ..... ..... @rdn_pg_rm 710ec3b87c2SRichard HendersonFSCALE 01100101 .. 00 1001 100 ... ..... ..... @rdn_pg_rm 711ec3b87c2SRichard HendersonFMULX 01100101 .. 00 1010 100 ... ..... ..... @rdn_pg_rm 712ec3b87c2SRichard HendersonFDIV 01100101 .. 00 1100 100 ... ..... ..... @rdm_pg_rn # FDIVR 713ec3b87c2SRichard HendersonFDIV 01100101 .. 00 1101 100 ... ..... ..... @rdn_pg_rm 714ec3b87c2SRichard Henderson 7156ceabaadSRichard Henderson### SVE FP Multiply-Add Group 7166ceabaadSRichard Henderson 7176ceabaadSRichard Henderson# SVE floating-point multiply-accumulate writing addend 7186ceabaadSRichard HendersonFMLA_zpzzz 01100101 .. 1 ..... 000 ... ..... ..... @rda_pg_rn_rm 7196ceabaadSRichard HendersonFMLS_zpzzz 01100101 .. 1 ..... 001 ... ..... ..... @rda_pg_rn_rm 7206ceabaadSRichard HendersonFNMLA_zpzzz 01100101 .. 1 ..... 010 ... ..... ..... @rda_pg_rn_rm 7216ceabaadSRichard HendersonFNMLS_zpzzz 01100101 .. 1 ..... 011 ... ..... ..... @rda_pg_rn_rm 7226ceabaadSRichard Henderson 7236ceabaadSRichard Henderson# SVE floating-point multiply-accumulate writing multiplicand 7246ceabaadSRichard Henderson# Alter the operand extraction order and reuse the helpers from above. 7256ceabaadSRichard Henderson# FMAD, FMSB, FNMAD, FNMS 7266ceabaadSRichard HendersonFMLA_zpzzz 01100101 .. 1 ..... 100 ... ..... ..... @rdn_pg_rm_ra 7276ceabaadSRichard HendersonFMLS_zpzzz 01100101 .. 1 ..... 101 ... ..... ..... @rdn_pg_rm_ra 7286ceabaadSRichard HendersonFNMLA_zpzzz 01100101 .. 1 ..... 110 ... ..... ..... @rdn_pg_rm_ra 7296ceabaadSRichard HendersonFNMLS_zpzzz 01100101 .. 1 ..... 111 ... ..... ..... @rdn_pg_rm_ra 7306ceabaadSRichard Henderson 7318092c6a3SRichard Henderson### SVE FP Unary Operations Predicated Group 7328092c6a3SRichard Henderson 7338092c6a3SRichard Henderson# SVE integer convert to floating-point 7348092c6a3SRichard HendersonSCVTF_hh 01100101 01 010 01 0 101 ... ..... ..... @rd_pg_rn_e0 7358092c6a3SRichard HendersonSCVTF_sh 01100101 01 010 10 0 101 ... ..... ..... @rd_pg_rn_e0 7368092c6a3SRichard HendersonSCVTF_dh 01100101 01 010 11 0 101 ... ..... ..... @rd_pg_rn_e0 7378092c6a3SRichard HendersonSCVTF_ss 01100101 10 010 10 0 101 ... ..... ..... @rd_pg_rn_e0 7388092c6a3SRichard HendersonSCVTF_sd 01100101 11 010 00 0 101 ... ..... ..... @rd_pg_rn_e0 7398092c6a3SRichard HendersonSCVTF_ds 01100101 11 010 10 0 101 ... ..... ..... @rd_pg_rn_e0 7408092c6a3SRichard HendersonSCVTF_dd 01100101 11 010 11 0 101 ... ..... ..... @rd_pg_rn_e0 7418092c6a3SRichard Henderson 7428092c6a3SRichard HendersonUCVTF_hh 01100101 01 010 01 1 101 ... ..... ..... @rd_pg_rn_e0 7438092c6a3SRichard HendersonUCVTF_sh 01100101 01 010 10 1 101 ... ..... ..... @rd_pg_rn_e0 7448092c6a3SRichard HendersonUCVTF_dh 01100101 01 010 11 1 101 ... ..... ..... @rd_pg_rn_e0 7458092c6a3SRichard HendersonUCVTF_ss 01100101 10 010 10 1 101 ... ..... ..... @rd_pg_rn_e0 7468092c6a3SRichard HendersonUCVTF_sd 01100101 11 010 00 1 101 ... ..... ..... @rd_pg_rn_e0 7478092c6a3SRichard HendersonUCVTF_ds 01100101 11 010 10 1 101 ... ..... ..... @rd_pg_rn_e0 7488092c6a3SRichard HendersonUCVTF_dd 01100101 11 010 11 1 101 ... ..... ..... @rd_pg_rn_e0 7498092c6a3SRichard Henderson 750d1822297SRichard Henderson### SVE Memory - 32-bit Gather and Unsized Contiguous Group 751d1822297SRichard Henderson 752d1822297SRichard Henderson# SVE load predicate register 753d1822297SRichard HendersonLDR_pri 10000101 10 ...... 000 ... ..... 0 .... @pd_rn_i9 754d1822297SRichard Henderson 755d1822297SRichard Henderson# SVE load vector register 756d1822297SRichard HendersonLDR_zri 10000101 10 ...... 010 ... ..... ..... @rd_rn_i9 757c4e7c493SRichard Henderson 75868459864SRichard Henderson# SVE load and broadcast element 75968459864SRichard HendersonLD1R_zpri 1000010 .. 1 imm:6 1.. pg:3 rn:5 rd:5 \ 76068459864SRichard Henderson &rpri_load dtype=%dtype_23_13 nreg=0 76168459864SRichard Henderson 762c4e7c493SRichard Henderson### SVE Memory Contiguous Load Group 763c4e7c493SRichard Henderson 764c4e7c493SRichard Henderson# SVE contiguous load (scalar plus scalar) 765c4e7c493SRichard HendersonLD_zprr 1010010 .... ..... 010 ... ..... ..... @rprr_load_dt nreg=0 766c4e7c493SRichard Henderson 767e2654d75SRichard Henderson# SVE contiguous first-fault load (scalar plus scalar) 768e2654d75SRichard HendersonLDFF1_zprr 1010010 .... ..... 011 ... ..... ..... @rprr_load_dt nreg=0 769e2654d75SRichard Henderson 770c4e7c493SRichard Henderson# SVE contiguous load (scalar plus immediate) 771c4e7c493SRichard HendersonLD_zpri 1010010 .... 0.... 101 ... ..... ..... @rpri_load_dt nreg=0 772c4e7c493SRichard Henderson 773e2654d75SRichard Henderson# SVE contiguous non-fault load (scalar plus immediate) 774e2654d75SRichard HendersonLDNF1_zpri 1010010 .... 1.... 101 ... ..... ..... @rpri_load_dt nreg=0 775e2654d75SRichard Henderson 776c4e7c493SRichard Henderson# SVE contiguous non-temporal load (scalar plus scalar) 777c4e7c493SRichard Henderson# LDNT1B, LDNT1H, LDNT1W, LDNT1D 778c4e7c493SRichard Henderson# SVE load multiple structures (scalar plus scalar) 779c4e7c493SRichard Henderson# LD2B, LD2H, LD2W, LD2D; etc. 780c4e7c493SRichard HendersonLD_zprr 1010010 .. nreg:2 ..... 110 ... ..... ..... @rprr_load_msz 781c4e7c493SRichard Henderson 782c4e7c493SRichard Henderson# SVE contiguous non-temporal load (scalar plus immediate) 783c4e7c493SRichard Henderson# LDNT1B, LDNT1H, LDNT1W, LDNT1D 784c4e7c493SRichard Henderson# SVE load multiple structures (scalar plus immediate) 785c4e7c493SRichard Henderson# LD2B, LD2H, LD2W, LD2D; etc. 786c4e7c493SRichard HendersonLD_zpri 1010010 .. nreg:2 0.... 111 ... ..... ..... @rpri_load_msz 7871a039c7eSRichard Henderson 78805abe304SRichard Henderson# SVE load and broadcast quadword (scalar plus scalar) 78905abe304SRichard HendersonLD1RQ_zprr 1010010 .. 00 ..... 000 ... ..... ..... \ 79005abe304SRichard Henderson @rprr_load_msz nreg=0 79105abe304SRichard Henderson 79205abe304SRichard Henderson# SVE load and broadcast quadword (scalar plus immediate) 79305abe304SRichard Henderson# LD1RQB, LD1RQH, LD1RQS, LD1RQD 79405abe304SRichard HendersonLD1RQ_zpri 1010010 .. 00 0.... 001 ... ..... ..... \ 79505abe304SRichard Henderson @rpri_load_msz nreg=0 79605abe304SRichard Henderson 7971a039c7eSRichard Henderson### SVE Memory Store Group 7981a039c7eSRichard Henderson 7995047c204SRichard Henderson# SVE store predicate register 8005047c204SRichard HendersonSTR_pri 1110010 11 0. ..... 000 ... ..... 0 .... @pd_rn_i9 8015047c204SRichard Henderson 8025047c204SRichard Henderson# SVE store vector register 8035047c204SRichard HendersonSTR_zri 1110010 11 0. ..... 010 ... ..... ..... @rd_rn_i9 8045047c204SRichard Henderson 8051a039c7eSRichard Henderson# SVE contiguous store (scalar plus immediate) 8061a039c7eSRichard Henderson# ST1B, ST1H, ST1W, ST1D; require msz <= esz 8071a039c7eSRichard HendersonST_zpri 1110010 .. esz:2 0.... 111 ... ..... ..... \ 8081a039c7eSRichard Henderson @rpri_store_msz nreg=0 8091a039c7eSRichard Henderson 8101a039c7eSRichard Henderson# SVE contiguous store (scalar plus scalar) 8111a039c7eSRichard Henderson# ST1B, ST1H, ST1W, ST1D; require msz <= esz 8121a039c7eSRichard Henderson# Enumerate msz lest we conflict with STR_zri. 8131a039c7eSRichard HendersonST_zprr 1110010 00 .. ..... 010 ... ..... ..... \ 8141a039c7eSRichard Henderson @rprr_store_esz_n0 msz=0 8151a039c7eSRichard HendersonST_zprr 1110010 01 .. ..... 010 ... ..... ..... \ 8161a039c7eSRichard Henderson @rprr_store_esz_n0 msz=1 8171a039c7eSRichard HendersonST_zprr 1110010 10 .. ..... 010 ... ..... ..... \ 8181a039c7eSRichard Henderson @rprr_store_esz_n0 msz=2 8191a039c7eSRichard HendersonST_zprr 1110010 11 11 ..... 010 ... ..... ..... \ 8201a039c7eSRichard Henderson @rprr_store msz=3 esz=3 nreg=0 8211a039c7eSRichard Henderson 8221a039c7eSRichard Henderson# SVE contiguous non-temporal store (scalar plus immediate) (nreg == 0) 8231a039c7eSRichard Henderson# SVE store multiple structures (scalar plus immediate) (nreg != 0) 8241a039c7eSRichard HendersonST_zpri 1110010 .. nreg:2 1.... 111 ... ..... ..... \ 8251a039c7eSRichard Henderson @rpri_store_msz esz=%size_23 8261a039c7eSRichard Henderson 8271a039c7eSRichard Henderson# SVE contiguous non-temporal store (scalar plus scalar) (nreg == 0) 8281a039c7eSRichard Henderson# SVE store multiple structures (scalar plus scalar) (nreg != 0) 8291a039c7eSRichard HendersonST_zprr 1110010 msz:2 nreg:2 ..... 011 ... ..... ..... \ 8301a039c7eSRichard Henderson @rprr_store esz=%size_23 831*f6dbf62aSRichard Henderson 832*f6dbf62aSRichard Henderson# SVE 32-bit scatter store (scalar plus 32-bit scaled offsets) 833*f6dbf62aSRichard Henderson# Require msz > 0 && msz <= esz. 834*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 11 ..... 100 ... ..... ..... \ 835*f6dbf62aSRichard Henderson @rprr_scatter_store xs=0 esz=2 scale=1 836*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 11 ..... 110 ... ..... ..... \ 837*f6dbf62aSRichard Henderson @rprr_scatter_store xs=1 esz=2 scale=1 838*f6dbf62aSRichard Henderson 839*f6dbf62aSRichard Henderson# SVE 32-bit scatter store (scalar plus 32-bit unscaled offsets) 840*f6dbf62aSRichard Henderson# Require msz <= esz. 841*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 10 ..... 100 ... ..... ..... \ 842*f6dbf62aSRichard Henderson @rprr_scatter_store xs=0 esz=2 scale=0 843*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 10 ..... 110 ... ..... ..... \ 844*f6dbf62aSRichard Henderson @rprr_scatter_store xs=1 esz=2 scale=0 845*f6dbf62aSRichard Henderson 846*f6dbf62aSRichard Henderson# SVE 64-bit scatter store (scalar plus 64-bit scaled offset) 847*f6dbf62aSRichard Henderson# Require msz > 0 848*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 01 ..... 101 ... ..... ..... \ 849*f6dbf62aSRichard Henderson @rprr_scatter_store xs=2 esz=3 scale=1 850*f6dbf62aSRichard Henderson 851*f6dbf62aSRichard Henderson# SVE 64-bit scatter store (scalar plus 64-bit unscaled offset) 852*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 00 ..... 101 ... ..... ..... \ 853*f6dbf62aSRichard Henderson @rprr_scatter_store xs=2 esz=3 scale=0 854*f6dbf62aSRichard Henderson 855*f6dbf62aSRichard Henderson# SVE 64-bit scatter store (scalar plus unpacked 32-bit scaled offset) 856*f6dbf62aSRichard Henderson# Require msz > 0 857*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 01 ..... 100 ... ..... ..... \ 858*f6dbf62aSRichard Henderson @rprr_scatter_store xs=0 esz=3 scale=1 859*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 01 ..... 110 ... ..... ..... \ 860*f6dbf62aSRichard Henderson @rprr_scatter_store xs=1 esz=3 scale=1 861*f6dbf62aSRichard Henderson 862*f6dbf62aSRichard Henderson# SVE 64-bit scatter store (scalar plus unpacked 32-bit unscaled offset) 863*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 00 ..... 100 ... ..... ..... \ 864*f6dbf62aSRichard Henderson @rprr_scatter_store xs=0 esz=3 scale=0 865*f6dbf62aSRichard HendersonST1_zprz 1110010 .. 00 ..... 110 ... ..... ..... \ 866*f6dbf62aSRichard Henderson @rprr_scatter_store xs=1 esz=3 scale=0 867