138388f7eSRichard Henderson# AArch64 SVE instruction descriptions 238388f7eSRichard Henderson# 338388f7eSRichard Henderson# Copyright (c) 2017 Linaro, Ltd 438388f7eSRichard Henderson# 538388f7eSRichard Henderson# This library is free software; you can redistribute it and/or 638388f7eSRichard Henderson# modify it under the terms of the GNU Lesser General Public 738388f7eSRichard Henderson# License as published by the Free Software Foundation; either 838388f7eSRichard Henderson# version 2 of the License, or (at your option) any later version. 938388f7eSRichard Henderson# 1038388f7eSRichard Henderson# This library is distributed in the hope that it will be useful, 1138388f7eSRichard Henderson# but WITHOUT ANY WARRANTY; without even the implied warranty of 1238388f7eSRichard Henderson# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 1338388f7eSRichard Henderson# Lesser General Public License for more details. 1438388f7eSRichard Henderson# 1538388f7eSRichard Henderson# You should have received a copy of the GNU Lesser General Public 1638388f7eSRichard Henderson# License along with this library; if not, see <http://www.gnu.org/licenses/>. 1738388f7eSRichard Henderson 1838388f7eSRichard Henderson# 1938388f7eSRichard Henderson# This file is processed by scripts/decodetree.py 2038388f7eSRichard Henderson# 2138388f7eSRichard Henderson 2238388f7eSRichard Henderson########################################################################### 23d1822297SRichard Henderson# Named fields. These are primarily for disjoint fields. 24d1822297SRichard Henderson 25d1822297SRichard Henderson%imm9_16_10 16:s6 10:3 26d1822297SRichard Henderson 27d1822297SRichard Henderson########################################################################### 2838388f7eSRichard Henderson# Named attribute sets. These are used to make nice(er) names 2938388f7eSRichard Henderson# when creating helpers common to those for the individual 3038388f7eSRichard Henderson# instruction patterns. 3138388f7eSRichard Henderson 32d1822297SRichard Henderson&rri rd rn imm 3338388f7eSRichard Henderson&rrr_esz rd rn rm esz 3438388f7eSRichard Henderson 3538388f7eSRichard Henderson########################################################################### 3638388f7eSRichard Henderson# Named instruction formats. These are generally used to 3738388f7eSRichard Henderson# reduce the amount of duplication between instruction patterns. 3838388f7eSRichard Henderson 3938388f7eSRichard Henderson# Three operand with unused vector element size 4038388f7eSRichard Henderson@rd_rn_rm_e0 ........ ... rm:5 ... ... rn:5 rd:5 &rrr_esz esz=0 4138388f7eSRichard Henderson 42d1822297SRichard Henderson# Basic Load/Store with 9-bit immediate offset 43d1822297SRichard Henderson@pd_rn_i9 ........ ........ ...... rn:5 . rd:4 \ 44d1822297SRichard Henderson &rri imm=%imm9_16_10 45d1822297SRichard Henderson@rd_rn_i9 ........ ........ ...... rn:5 rd:5 \ 46d1822297SRichard Henderson &rri imm=%imm9_16_10 47d1822297SRichard Henderson 4838388f7eSRichard Henderson########################################################################### 4938388f7eSRichard Henderson# Instruction patterns. Grouped according to the SVE encodingindex.xhtml. 5038388f7eSRichard Henderson 5138388f7eSRichard Henderson### SVE Logical - Unpredicated Group 5238388f7eSRichard Henderson 5338388f7eSRichard Henderson# SVE bitwise logical operations (unpredicated) 5438388f7eSRichard HendersonAND_zzz 00000100 00 1 ..... 001 100 ..... ..... @rd_rn_rm_e0 5538388f7eSRichard HendersonORR_zzz 00000100 01 1 ..... 001 100 ..... ..... @rd_rn_rm_e0 5638388f7eSRichard HendersonEOR_zzz 00000100 10 1 ..... 001 100 ..... ..... @rd_rn_rm_e0 5738388f7eSRichard HendersonBIC_zzz 00000100 11 1 ..... 001 100 ..... ..... @rd_rn_rm_e0 58d1822297SRichard Henderson 59*9e18d7a6SRichard Henderson### SVE Predicate Misc Group 60*9e18d7a6SRichard Henderson 61*9e18d7a6SRichard Henderson# SVE predicate test 62*9e18d7a6SRichard HendersonPTEST 00100101 01 010000 11 pg:4 0 rn:4 0 0000 63*9e18d7a6SRichard Henderson 64d1822297SRichard Henderson### SVE Memory - 32-bit Gather and Unsized Contiguous Group 65d1822297SRichard Henderson 66d1822297SRichard Henderson# SVE load predicate register 67d1822297SRichard HendersonLDR_pri 10000101 10 ...... 000 ... ..... 0 .... @pd_rn_i9 68d1822297SRichard Henderson 69d1822297SRichard Henderson# SVE load vector register 70d1822297SRichard HendersonLDR_zri 10000101 10 ...... 010 ... ..... ..... @rd_rn_i9 71