xref: /qemu/target/arm/tcg/neon-dp.decode (revision cb294bca866f1cd776e44e03e5e432942bc676e8)
1625e3dd4SPeter Maydell# AArch32 Neon data-processing instruction descriptions
2625e3dd4SPeter Maydell#
3625e3dd4SPeter Maydell#  Copyright (c) 2020 Linaro, Ltd
4625e3dd4SPeter Maydell#
5625e3dd4SPeter Maydell# This library is free software; you can redistribute it and/or
6625e3dd4SPeter Maydell# modify it under the terms of the GNU Lesser General Public
7625e3dd4SPeter Maydell# License as published by the Free Software Foundation; either
8625e3dd4SPeter Maydell# version 2 of the License, or (at your option) any later version.
9625e3dd4SPeter Maydell#
10625e3dd4SPeter Maydell# This library is distributed in the hope that it will be useful,
11625e3dd4SPeter Maydell# but WITHOUT ANY WARRANTY; without even the implied warranty of
12625e3dd4SPeter Maydell# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13625e3dd4SPeter Maydell# Lesser General Public License for more details.
14625e3dd4SPeter Maydell#
15625e3dd4SPeter Maydell# You should have received a copy of the GNU Lesser General Public
16625e3dd4SPeter Maydell# License along with this library; if not, see <http://www.gnu.org/licenses/>.
17625e3dd4SPeter Maydell
18625e3dd4SPeter Maydell#
19625e3dd4SPeter Maydell# This file is processed by scripts/decodetree.py
20625e3dd4SPeter Maydell#
21a4e143acSPeter Maydell# VFP/Neon register fields; same as vfp.decode
22a4e143acSPeter Maydell%vm_dp  5:1 0:4
23a4e143acSPeter Maydell%vn_dp  7:1 16:4
24a4e143acSPeter Maydell%vd_dp  22:1 12:4
25625e3dd4SPeter Maydell
26625e3dd4SPeter Maydell# Encodings for Neon data processing instructions where the T32 encoding
27625e3dd4SPeter Maydell# is a simple transformation of the A32 encoding.
28625e3dd4SPeter Maydell# More specifically, this file covers instructions where the A32 encoding is
29625e3dd4SPeter Maydell#   0b1111_001p_qqqq_qqqq_qqqq_qqqq_qqqq_qqqq
30625e3dd4SPeter Maydell# and the T32 encoding is
31625e3dd4SPeter Maydell#   0b111p_1111_qqqq_qqqq_qqqq_qqqq_qqqq_qqqq
32625e3dd4SPeter Maydell# This file works on the A32 encoding only; calling code for T32 has to
33625e3dd4SPeter Maydell# transform the insn into the A32 version first.
34a4e143acSPeter Maydell
35a4e143acSPeter Maydell######################################################################
36a4e143acSPeter Maydell# 3-reg-same grouping:
37a4e143acSPeter Maydell# 1111 001 U 0 D sz:2 Vn:4 Vd:4 opc:4 N Q M op Vm:4
38a4e143acSPeter Maydell######################################################################
39a4e143acSPeter Maydell
40a4e143acSPeter Maydell&3same vm vn vd q size
41a4e143acSPeter Maydell
42a4e143acSPeter Maydell@3same           .... ... . . . size:2 .... .... .... . q:1 . . .... \
43a4e143acSPeter Maydell                 &3same vm=%vm_dp vn=%vn_dp vd=%vd_dp
44a4e143acSPeter Maydell
45*cb294bcaSPeter MaydellVHADD_S_3s       1111 001 0 0 . .. .... .... 0000 . . . 0 .... @3same
46*cb294bcaSPeter MaydellVHADD_U_3s       1111 001 1 0 . .. .... .... 0000 . . . 0 .... @3same
477a9497f1SPeter MaydellVQADD_S_3s       1111 001 0 0 . .. .... .... 0000 . . . 1 .... @3same
487a9497f1SPeter MaydellVQADD_U_3s       1111 001 1 0 . .. .... .... 0000 . . . 1 .... @3same
497a9497f1SPeter Maydell
5035a548edSPeter Maydell@3same_logic     .... ... . . . .. .... .... .... . q:1 .. .... \
5135a548edSPeter Maydell                 &3same vm=%vm_dp vn=%vn_dp vd=%vd_dp size=0
5235a548edSPeter Maydell
5335a548edSPeter MaydellVAND_3s          1111 001 0 0 . 00 .... .... 0001 ... 1 .... @3same_logic
5435a548edSPeter MaydellVBIC_3s          1111 001 0 0 . 01 .... .... 0001 ... 1 .... @3same_logic
5535a548edSPeter MaydellVORR_3s          1111 001 0 0 . 10 .... .... 0001 ... 1 .... @3same_logic
5635a548edSPeter MaydellVORN_3s          1111 001 0 0 . 11 .... .... 0001 ... 1 .... @3same_logic
5735a548edSPeter MaydellVEOR_3s          1111 001 1 0 . 00 .... .... 0001 ... 1 .... @3same_logic
5835a548edSPeter MaydellVBSL_3s          1111 001 1 0 . 01 .... .... 0001 ... 1 .... @3same_logic
5935a548edSPeter MaydellVBIT_3s          1111 001 1 0 . 10 .... .... 0001 ... 1 .... @3same_logic
6035a548edSPeter MaydellVBIF_3s          1111 001 1 0 . 11 .... .... 0001 ... 1 .... @3same_logic
6135a548edSPeter Maydell
627a9497f1SPeter MaydellVQSUB_S_3s       1111 001 0 0 . .. .... .... 0010 . . . 1 .... @3same
637a9497f1SPeter MaydellVQSUB_U_3s       1111 001 1 0 . .. .... .... 0010 . . . 1 .... @3same
647a9497f1SPeter Maydell
6502bd0cdbSPeter MaydellVCGT_S_3s        1111 001 0 0 . .. .... .... 0011 . . . 0 .... @3same
6602bd0cdbSPeter MaydellVCGT_U_3s        1111 001 1 0 . .. .... .... 0011 . . . 0 .... @3same
6702bd0cdbSPeter MaydellVCGE_S_3s        1111 001 0 0 . .. .... .... 0011 . . . 1 .... @3same
6802bd0cdbSPeter MaydellVCGE_U_3s        1111 001 1 0 . .. .... .... 0011 . . . 1 .... @3same
6902bd0cdbSPeter Maydell
70e9eee531SRichard Henderson# The _rev suffix indicates that Vn and Vm are reversed. This is
71e9eee531SRichard Henderson# the case for shifts. In the Arm ARM these insns are documented
72e9eee531SRichard Henderson# with the Vm and Vn fields in their usual places, but in the
73e9eee531SRichard Henderson# assembly the operands are listed "backwards", ie in the order
74e9eee531SRichard Henderson# Dd, Dm, Dn where other insns use Dd, Dn, Dm. For QEMU we choose
75e9eee531SRichard Henderson# to consider Vm and Vn as being in different fields in the insn,
76e9eee531SRichard Henderson# which allows us to avoid special-casing shifts in the trans_
77e9eee531SRichard Henderson# function code. We would otherwise need to manually swap the operands
78e9eee531SRichard Henderson# over to call Neon helper functions that are shared with AArch64,
79e9eee531SRichard Henderson# which does not have this odd reversed-operand situation.
80e9eee531SRichard Henderson@3same_rev       .... ... . . . size:2 .... .... .... . q:1 . . .... \
81e9eee531SRichard Henderson                 &3same vn=%vm_dp vm=%vn_dp vd=%vd_dp
82e9eee531SRichard Henderson
83e9eee531SRichard HendersonVSHL_S_3s        1111 001 0 0 . .. .... .... 0100 . . . 0 .... @3same_rev
84e9eee531SRichard HendersonVSHL_U_3s        1111 001 1 0 . .. .... .... 0100 . . . 0 .... @3same_rev
850de34fd4SPeter Maydell
8635d4352fSPeter Maydell# Insns operating on 64-bit elements (size!=0b11 handled elsewhere)
8735d4352fSPeter Maydell# The _rev suffix indicates that Vn and Vm are reversed (as explained
8835d4352fSPeter Maydell# by the comment for the @3same_rev format).
8935d4352fSPeter Maydell@3same_64_rev    .... ... . . . 11 .... .... .... . q:1 . . .... \
9035d4352fSPeter Maydell                 &3same vm=%vn_dp vn=%vm_dp vd=%vd_dp size=3
9135d4352fSPeter Maydell
9235d4352fSPeter MaydellVQSHL_S64_3s     1111 001 0 0 . .. .... .... 0100 . . . 1 .... @3same_64_rev
9335d4352fSPeter MaydellVQSHL_U64_3s     1111 001 1 0 . .. .... .... 0100 . . . 1 .... @3same_64_rev
9435d4352fSPeter MaydellVRSHL_S64_3s     1111 001 0 0 . .. .... .... 0101 . . . 0 .... @3same_64_rev
9535d4352fSPeter MaydellVRSHL_U64_3s     1111 001 1 0 . .. .... .... 0101 . . . 0 .... @3same_64_rev
9635d4352fSPeter MaydellVQRSHL_S64_3s    1111 001 0 0 . .. .... .... 0101 . . . 1 .... @3same_64_rev
9735d4352fSPeter MaydellVQRSHL_U64_3s    1111 001 1 0 . .. .... .... 0101 . . . 1 .... @3same_64_rev
9835d4352fSPeter Maydell
9936b59310SPeter MaydellVMAX_S_3s        1111 001 0 0 . .. .... .... 0110 . . . 0 .... @3same
10036b59310SPeter MaydellVMAX_U_3s        1111 001 1 0 . .. .... .... 0110 . . . 0 .... @3same
10136b59310SPeter MaydellVMIN_S_3s        1111 001 0 0 . .. .... .... 0110 . . . 1 .... @3same
10236b59310SPeter MaydellVMIN_U_3s        1111 001 1 0 . .. .... .... 0110 . . . 1 .... @3same
10336b59310SPeter Maydell
104a4e143acSPeter MaydellVADD_3s          1111 001 0 0 . .. .... .... 1000 . . . 0 .... @3same
105a4e143acSPeter MaydellVSUB_3s          1111 001 1 0 . .. .... .... 1000 . . . 0 .... @3same
10602bd0cdbSPeter Maydell
10702bd0cdbSPeter MaydellVTST_3s          1111 001 0 0 . .. .... .... 1000 . . . 1 .... @3same
10802bd0cdbSPeter MaydellVCEQ_3s          1111 001 1 0 . .. .... .... 1000 . . . 1 .... @3same
1090de34fd4SPeter Maydell
1100de34fd4SPeter MaydellVMLA_3s          1111 001 0 0 . .. .... .... 1001 . . . 0 .... @3same
1110de34fd4SPeter MaydellVMLS_3s          1111 001 1 0 . .. .... .... 1001 . . . 0 .... @3same
1120de34fd4SPeter Maydell
1130de34fd4SPeter MaydellVMUL_3s          1111 001 0 0 . .. .... .... 1001 . . . 1 .... @3same
1140de34fd4SPeter MaydellVMUL_p_3s        1111 001 1 0 . .. .... .... 1001 . . . 1 .... @3same
115a0635695SPeter Maydell
116a0635695SPeter MaydellVQRDMLAH_3s      1111 001 1 0 . .. .... .... 1011 ... 1 .... @3same
11721290edfSPeter Maydell
11821290edfSPeter MaydellSHA1_3s          1111 001 0 0 . optype:2 .... .... 1100 . 1 . 0 .... \
11921290edfSPeter Maydell                 vm=%vm_dp vn=%vn_dp vd=%vd_dp
12021290edfSPeter MaydellSHA256H_3s       1111 001 1 0 . 00 .... .... 1100 . 1 . 0 .... \
12121290edfSPeter Maydell                 vm=%vm_dp vn=%vn_dp vd=%vd_dp
12221290edfSPeter MaydellSHA256H2_3s      1111 001 1 0 . 01 .... .... 1100 . 1 . 0 .... \
12321290edfSPeter Maydell                 vm=%vm_dp vn=%vn_dp vd=%vd_dp
12421290edfSPeter MaydellSHA256SU1_3s     1111 001 1 0 . 10 .... .... 1100 . 1 . 0 .... \
12521290edfSPeter Maydell                 vm=%vm_dp vn=%vn_dp vd=%vd_dp
12621290edfSPeter Maydell
127a0635695SPeter MaydellVQRDMLSH_3s      1111 001 1 0 . .. .... .... 1100 ... 1 .... @3same
128