xref: /qemu/target/arm/tcg/mve_helper.c (revision 3f4f1880c245453b75d4c09049845b19de9964bf)
1 /*
2  * M-profile MVE Operations
3  *
4  * Copyright (c) 2021 Linaro, Ltd.
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "internals.h"
23 #include "vec_internal.h"
24 #include "exec/helper-proto.h"
25 #include "exec/cpu_ldst.h"
26 #include "exec/exec-all.h"
27 #include "tcg/tcg.h"
28 
29 static uint16_t mve_element_mask(CPUARMState *env)
30 {
31     /*
32      * Return the mask of which elements in the MVE vector should be
33      * updated. This is a combination of multiple things:
34      *  (1) by default, we update every lane in the vector
35      *  (2) VPT predication stores its state in the VPR register;
36      *  (3) low-overhead-branch tail predication will mask out part
37      *      the vector on the final iteration of the loop
38      *  (4) if EPSR.ECI is set then we must execute only some beats
39      *      of the insn
40      * We combine all these into a 16-bit result with the same semantics
41      * as VPR.P0: 0 to mask the lane, 1 if it is active.
42      * 8-bit vector ops will look at all bits of the result;
43      * 16-bit ops will look at bits 0, 2, 4, ...;
44      * 32-bit ops will look at bits 0, 4, 8 and 12.
45      * Compare pseudocode GetCurInstrBeat(), though that only returns
46      * the 4-bit slice of the mask corresponding to a single beat.
47      */
48     uint16_t mask = FIELD_EX32(env->v7m.vpr, V7M_VPR, P0);
49 
50     if (!(env->v7m.vpr & R_V7M_VPR_MASK01_MASK)) {
51         mask |= 0xff;
52     }
53     if (!(env->v7m.vpr & R_V7M_VPR_MASK23_MASK)) {
54         mask |= 0xff00;
55     }
56 
57     if (env->v7m.ltpsize < 4 &&
58         env->regs[14] <= (1 << (4 - env->v7m.ltpsize))) {
59         /*
60          * Tail predication active, and this is the last loop iteration.
61          * The element size is (1 << ltpsize), and we only want to process
62          * loopcount elements, so we want to retain the least significant
63          * (loopcount * esize) predicate bits and zero out bits above that.
64          */
65         int masklen = env->regs[14] << env->v7m.ltpsize;
66         assert(masklen <= 16);
67         uint16_t ltpmask = masklen ? MAKE_64BIT_MASK(0, masklen) : 0;
68         mask &= ltpmask;
69     }
70 
71     if ((env->condexec_bits & 0xf) == 0) {
72         /*
73          * ECI bits indicate which beats are already executed;
74          * we handle this by effectively predicating them out.
75          */
76         int eci = env->condexec_bits >> 4;
77         switch (eci) {
78         case ECI_NONE:
79             break;
80         case ECI_A0:
81             mask &= 0xfff0;
82             break;
83         case ECI_A0A1:
84             mask &= 0xff00;
85             break;
86         case ECI_A0A1A2:
87         case ECI_A0A1A2B0:
88             mask &= 0xf000;
89             break;
90         default:
91             g_assert_not_reached();
92         }
93     }
94 
95     return mask;
96 }
97 
98 static void mve_advance_vpt(CPUARMState *env)
99 {
100     /* Advance the VPT and ECI state if necessary */
101     uint32_t vpr = env->v7m.vpr;
102     unsigned mask01, mask23;
103 
104     if ((env->condexec_bits & 0xf) == 0) {
105         env->condexec_bits = (env->condexec_bits == (ECI_A0A1A2B0 << 4)) ?
106             (ECI_A0 << 4) : (ECI_NONE << 4);
107     }
108 
109     if (!(vpr & (R_V7M_VPR_MASK01_MASK | R_V7M_VPR_MASK23_MASK))) {
110         /* VPT not enabled, nothing to do */
111         return;
112     }
113 
114     mask01 = FIELD_EX32(vpr, V7M_VPR, MASK01);
115     mask23 = FIELD_EX32(vpr, V7M_VPR, MASK23);
116     if (mask01 > 8) {
117         /* high bit set, but not 0b1000: invert the relevant half of P0 */
118         vpr ^= 0xff;
119     }
120     if (mask23 > 8) {
121         /* high bit set, but not 0b1000: invert the relevant half of P0 */
122         vpr ^= 0xff00;
123     }
124     vpr = FIELD_DP32(vpr, V7M_VPR, MASK01, mask01 << 1);
125     vpr = FIELD_DP32(vpr, V7M_VPR, MASK23, mask23 << 1);
126     env->v7m.vpr = vpr;
127 }
128 
129 
130 #define DO_VLDR(OP, MSIZE, LDTYPE, ESIZE, TYPE)                         \
131     void HELPER(mve_##OP)(CPUARMState *env, void *vd, uint32_t addr)    \
132     {                                                                   \
133         TYPE *d = vd;                                                   \
134         uint16_t mask = mve_element_mask(env);                          \
135         unsigned b, e;                                                  \
136         /*                                                              \
137          * R_SXTM allows the dest reg to become UNKNOWN for abandoned   \
138          * beats so we don't care if we update part of the dest and     \
139          * then take an exception.                                      \
140          */                                                             \
141         for (b = 0, e = 0; b < 16; b += ESIZE, e++) {                   \
142             if (mask & (1 << b)) {                                      \
143                 d[H##ESIZE(e)] = cpu_##LDTYPE##_data_ra(env, addr, GETPC()); \
144             }                                                           \
145             addr += MSIZE;                                              \
146         }                                                               \
147         mve_advance_vpt(env);                                           \
148     }
149 
150 #define DO_VSTR(OP, MSIZE, STTYPE, ESIZE, TYPE)                         \
151     void HELPER(mve_##OP)(CPUARMState *env, void *vd, uint32_t addr)    \
152     {                                                                   \
153         TYPE *d = vd;                                                   \
154         uint16_t mask = mve_element_mask(env);                          \
155         unsigned b, e;                                                  \
156         for (b = 0, e = 0; b < 16; b += ESIZE, e++) {                   \
157             if (mask & (1 << b)) {                                      \
158                 cpu_##STTYPE##_data_ra(env, addr, d[H##ESIZE(e)], GETPC()); \
159             }                                                           \
160             addr += MSIZE;                                              \
161         }                                                               \
162         mve_advance_vpt(env);                                           \
163     }
164 
165 DO_VLDR(vldrb, 1, ldub, 1, uint8_t)
166 DO_VLDR(vldrh, 2, lduw, 2, uint16_t)
167 DO_VLDR(vldrw, 4, ldl, 4, uint32_t)
168 
169 DO_VSTR(vstrb, 1, stb, 1, uint8_t)
170 DO_VSTR(vstrh, 2, stw, 2, uint16_t)
171 DO_VSTR(vstrw, 4, stl, 4, uint32_t)
172 
173 DO_VLDR(vldrb_sh, 1, ldsb, 2, int16_t)
174 DO_VLDR(vldrb_sw, 1, ldsb, 4, int32_t)
175 DO_VLDR(vldrb_uh, 1, ldub, 2, uint16_t)
176 DO_VLDR(vldrb_uw, 1, ldub, 4, uint32_t)
177 DO_VLDR(vldrh_sw, 2, ldsw, 4, int32_t)
178 DO_VLDR(vldrh_uw, 2, lduw, 4, uint32_t)
179 
180 DO_VSTR(vstrb_h, 1, stb, 2, int16_t)
181 DO_VSTR(vstrb_w, 1, stb, 4, int32_t)
182 DO_VSTR(vstrh_w, 2, stw, 4, int32_t)
183 
184 #undef DO_VLDR
185 #undef DO_VSTR
186 
187 /*
188  * The mergemask(D, R, M) macro performs the operation "*D = R" but
189  * storing only the bytes which correspond to 1 bits in M,
190  * leaving other bytes in *D unchanged. We use _Generic
191  * to select the correct implementation based on the type of D.
192  */
193 
194 static void mergemask_ub(uint8_t *d, uint8_t r, uint16_t mask)
195 {
196     if (mask & 1) {
197         *d = r;
198     }
199 }
200 
201 static void mergemask_sb(int8_t *d, int8_t r, uint16_t mask)
202 {
203     mergemask_ub((uint8_t *)d, r, mask);
204 }
205 
206 static void mergemask_uh(uint16_t *d, uint16_t r, uint16_t mask)
207 {
208     uint16_t bmask = expand_pred_b_data[mask & 3];
209     *d = (*d & ~bmask) | (r & bmask);
210 }
211 
212 static void mergemask_sh(int16_t *d, int16_t r, uint16_t mask)
213 {
214     mergemask_uh((uint16_t *)d, r, mask);
215 }
216 
217 static void mergemask_uw(uint32_t *d, uint32_t r, uint16_t mask)
218 {
219     uint32_t bmask = expand_pred_b_data[mask & 0xf];
220     *d = (*d & ~bmask) | (r & bmask);
221 }
222 
223 static void mergemask_sw(int32_t *d, int32_t r, uint16_t mask)
224 {
225     mergemask_uw((uint32_t *)d, r, mask);
226 }
227 
228 static void mergemask_uq(uint64_t *d, uint64_t r, uint16_t mask)
229 {
230     uint64_t bmask = expand_pred_b_data[mask & 0xff];
231     *d = (*d & ~bmask) | (r & bmask);
232 }
233 
234 static void mergemask_sq(int64_t *d, int64_t r, uint16_t mask)
235 {
236     mergemask_uq((uint64_t *)d, r, mask);
237 }
238 
239 #define mergemask(D, R, M)                      \
240     _Generic(D,                                 \
241              uint8_t *: mergemask_ub,           \
242              int8_t *:  mergemask_sb,           \
243              uint16_t *: mergemask_uh,          \
244              int16_t *:  mergemask_sh,          \
245              uint32_t *: mergemask_uw,          \
246              int32_t *:  mergemask_sw,          \
247              uint64_t *: mergemask_uq,          \
248              int64_t *:  mergemask_sq)(D, R, M)
249 
250 void HELPER(mve_vdup)(CPUARMState *env, void *vd, uint32_t val)
251 {
252     /*
253      * The generated code already replicated an 8 or 16 bit constant
254      * into the 32-bit value, so we only need to write the 32-bit
255      * value to all elements of the Qreg, allowing for predication.
256      */
257     uint32_t *d = vd;
258     uint16_t mask = mve_element_mask(env);
259     unsigned e;
260     for (e = 0; e < 16 / 4; e++, mask >>= 4) {
261         mergemask(&d[H4(e)], val, mask);
262     }
263     mve_advance_vpt(env);
264 }
265 
266 #define DO_1OP(OP, ESIZE, TYPE, FN)                                     \
267     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm)         \
268     {                                                                   \
269         TYPE *d = vd, *m = vm;                                          \
270         uint16_t mask = mve_element_mask(env);                          \
271         unsigned e;                                                     \
272         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
273             mergemask(&d[H##ESIZE(e)], FN(m[H##ESIZE(e)]), mask);       \
274         }                                                               \
275         mve_advance_vpt(env);                                           \
276     }
277 
278 #define DO_CLS_B(N)   (clrsb32(N) - 24)
279 #define DO_CLS_H(N)   (clrsb32(N) - 16)
280 
281 DO_1OP(vclsb, 1, int8_t, DO_CLS_B)
282 DO_1OP(vclsh, 2, int16_t, DO_CLS_H)
283 DO_1OP(vclsw, 4, int32_t, clrsb32)
284 
285 #define DO_CLZ_B(N)   (clz32(N) - 24)
286 #define DO_CLZ_H(N)   (clz32(N) - 16)
287 
288 DO_1OP(vclzb, 1, uint8_t, DO_CLZ_B)
289 DO_1OP(vclzh, 2, uint16_t, DO_CLZ_H)
290 DO_1OP(vclzw, 4, uint32_t, clz32)
291 
292 DO_1OP(vrev16b, 2, uint16_t, bswap16)
293 DO_1OP(vrev32b, 4, uint32_t, bswap32)
294 DO_1OP(vrev32h, 4, uint32_t, hswap32)
295 DO_1OP(vrev64b, 8, uint64_t, bswap64)
296 DO_1OP(vrev64h, 8, uint64_t, hswap64)
297 DO_1OP(vrev64w, 8, uint64_t, wswap64)
298 
299 #define DO_NOT(N) (~(N))
300 
301 DO_1OP(vmvn, 8, uint64_t, DO_NOT)
302 
303 #define DO_ABS(N) ((N) < 0 ? -(N) : (N))
304 #define DO_FABSH(N)  ((N) & dup_const(MO_16, 0x7fff))
305 #define DO_FABSS(N)  ((N) & dup_const(MO_32, 0x7fffffff))
306 
307 DO_1OP(vabsb, 1, int8_t, DO_ABS)
308 DO_1OP(vabsh, 2, int16_t, DO_ABS)
309 DO_1OP(vabsw, 4, int32_t, DO_ABS)
310 
311 /* We can do these 64 bits at a time */
312 DO_1OP(vfabsh, 8, uint64_t, DO_FABSH)
313 DO_1OP(vfabss, 8, uint64_t, DO_FABSS)
314 
315 #define DO_NEG(N)    (-(N))
316 #define DO_FNEGH(N) ((N) ^ dup_const(MO_16, 0x8000))
317 #define DO_FNEGS(N) ((N) ^ dup_const(MO_32, 0x80000000))
318 
319 DO_1OP(vnegb, 1, int8_t, DO_NEG)
320 DO_1OP(vnegh, 2, int16_t, DO_NEG)
321 DO_1OP(vnegw, 4, int32_t, DO_NEG)
322 
323 /* We can do these 64 bits at a time */
324 DO_1OP(vfnegh, 8, uint64_t, DO_FNEGH)
325 DO_1OP(vfnegs, 8, uint64_t, DO_FNEGS)
326 
327 /*
328  * 1 operand immediates: Vda is destination and possibly also one source.
329  * All these insns work at 64-bit widths.
330  */
331 #define DO_1OP_IMM(OP, FN)                                              \
332     void HELPER(mve_##OP)(CPUARMState *env, void *vda, uint64_t imm)    \
333     {                                                                   \
334         uint64_t *da = vda;                                             \
335         uint16_t mask = mve_element_mask(env);                          \
336         unsigned e;                                                     \
337         for (e = 0; e < 16 / 8; e++, mask >>= 8) {                      \
338             mergemask(&da[H8(e)], FN(da[H8(e)], imm), mask);            \
339         }                                                               \
340         mve_advance_vpt(env);                                           \
341     }
342 
343 #define DO_MOVI(N, I) (I)
344 #define DO_ANDI(N, I) ((N) & (I))
345 #define DO_ORRI(N, I) ((N) | (I))
346 
347 DO_1OP_IMM(vmovi, DO_MOVI)
348 DO_1OP_IMM(vandi, DO_ANDI)
349 DO_1OP_IMM(vorri, DO_ORRI)
350 
351 #define DO_2OP(OP, ESIZE, TYPE, FN)                                     \
352     void HELPER(glue(mve_, OP))(CPUARMState *env,                       \
353                                 void *vd, void *vn, void *vm)           \
354     {                                                                   \
355         TYPE *d = vd, *n = vn, *m = vm;                                 \
356         uint16_t mask = mve_element_mask(env);                          \
357         unsigned e;                                                     \
358         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
359             mergemask(&d[H##ESIZE(e)],                                  \
360                       FN(n[H##ESIZE(e)], m[H##ESIZE(e)]), mask);        \
361         }                                                               \
362         mve_advance_vpt(env);                                           \
363     }
364 
365 /* provide unsigned 2-op helpers for all sizes */
366 #define DO_2OP_U(OP, FN)                        \
367     DO_2OP(OP##b, 1, uint8_t, FN)               \
368     DO_2OP(OP##h, 2, uint16_t, FN)              \
369     DO_2OP(OP##w, 4, uint32_t, FN)
370 
371 /* provide signed 2-op helpers for all sizes */
372 #define DO_2OP_S(OP, FN)                        \
373     DO_2OP(OP##b, 1, int8_t, FN)                \
374     DO_2OP(OP##h, 2, int16_t, FN)               \
375     DO_2OP(OP##w, 4, int32_t, FN)
376 
377 /*
378  * "Long" operations where two half-sized inputs (taken from either the
379  * top or the bottom of the input vector) produce a double-width result.
380  * Here ESIZE, TYPE are for the input, and LESIZE, LTYPE for the output.
381  */
382 #define DO_2OP_L(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN)               \
383     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \
384     {                                                                   \
385         LTYPE *d = vd;                                                  \
386         TYPE *n = vn, *m = vm;                                          \
387         uint16_t mask = mve_element_mask(env);                          \
388         unsigned le;                                                    \
389         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
390             LTYPE r = FN((LTYPE)n[H##ESIZE(le * 2 + TOP)],              \
391                          m[H##ESIZE(le * 2 + TOP)]);                    \
392             mergemask(&d[H##LESIZE(le)], r, mask);                      \
393         }                                                               \
394         mve_advance_vpt(env);                                           \
395     }
396 
397 #define DO_2OP_SAT(OP, ESIZE, TYPE, FN)                                 \
398     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \
399     {                                                                   \
400         TYPE *d = vd, *n = vn, *m = vm;                                 \
401         uint16_t mask = mve_element_mask(env);                          \
402         unsigned e;                                                     \
403         bool qc = false;                                                \
404         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
405             bool sat = false;                                           \
406             TYPE r = FN(n[H##ESIZE(e)], m[H##ESIZE(e)], &sat);          \
407             mergemask(&d[H##ESIZE(e)], r, mask);                        \
408             qc |= sat & mask & 1;                                       \
409         }                                                               \
410         if (qc) {                                                       \
411             env->vfp.qc[0] = qc;                                        \
412         }                                                               \
413         mve_advance_vpt(env);                                           \
414     }
415 
416 /* provide unsigned 2-op helpers for all sizes */
417 #define DO_2OP_SAT_U(OP, FN)                    \
418     DO_2OP_SAT(OP##b, 1, uint8_t, FN)           \
419     DO_2OP_SAT(OP##h, 2, uint16_t, FN)          \
420     DO_2OP_SAT(OP##w, 4, uint32_t, FN)
421 
422 /* provide signed 2-op helpers for all sizes */
423 #define DO_2OP_SAT_S(OP, FN)                    \
424     DO_2OP_SAT(OP##b, 1, int8_t, FN)            \
425     DO_2OP_SAT(OP##h, 2, int16_t, FN)           \
426     DO_2OP_SAT(OP##w, 4, int32_t, FN)
427 
428 #define DO_AND(N, M)  ((N) & (M))
429 #define DO_BIC(N, M)  ((N) & ~(M))
430 #define DO_ORR(N, M)  ((N) | (M))
431 #define DO_ORN(N, M)  ((N) | ~(M))
432 #define DO_EOR(N, M)  ((N) ^ (M))
433 
434 DO_2OP(vand, 8, uint64_t, DO_AND)
435 DO_2OP(vbic, 8, uint64_t, DO_BIC)
436 DO_2OP(vorr, 8, uint64_t, DO_ORR)
437 DO_2OP(vorn, 8, uint64_t, DO_ORN)
438 DO_2OP(veor, 8, uint64_t, DO_EOR)
439 
440 #define DO_ADD(N, M) ((N) + (M))
441 #define DO_SUB(N, M) ((N) - (M))
442 #define DO_MUL(N, M) ((N) * (M))
443 
444 DO_2OP_U(vadd, DO_ADD)
445 DO_2OP_U(vsub, DO_SUB)
446 DO_2OP_U(vmul, DO_MUL)
447 
448 DO_2OP_L(vmullbsb, 0, 1, int8_t, 2, int16_t, DO_MUL)
449 DO_2OP_L(vmullbsh, 0, 2, int16_t, 4, int32_t, DO_MUL)
450 DO_2OP_L(vmullbsw, 0, 4, int32_t, 8, int64_t, DO_MUL)
451 DO_2OP_L(vmullbub, 0, 1, uint8_t, 2, uint16_t, DO_MUL)
452 DO_2OP_L(vmullbuh, 0, 2, uint16_t, 4, uint32_t, DO_MUL)
453 DO_2OP_L(vmullbuw, 0, 4, uint32_t, 8, uint64_t, DO_MUL)
454 
455 DO_2OP_L(vmulltsb, 1, 1, int8_t, 2, int16_t, DO_MUL)
456 DO_2OP_L(vmulltsh, 1, 2, int16_t, 4, int32_t, DO_MUL)
457 DO_2OP_L(vmulltsw, 1, 4, int32_t, 8, int64_t, DO_MUL)
458 DO_2OP_L(vmulltub, 1, 1, uint8_t, 2, uint16_t, DO_MUL)
459 DO_2OP_L(vmulltuh, 1, 2, uint16_t, 4, uint32_t, DO_MUL)
460 DO_2OP_L(vmulltuw, 1, 4, uint32_t, 8, uint64_t, DO_MUL)
461 
462 /*
463  * Because the computation type is at least twice as large as required,
464  * these work for both signed and unsigned source types.
465  */
466 static inline uint8_t do_mulh_b(int32_t n, int32_t m)
467 {
468     return (n * m) >> 8;
469 }
470 
471 static inline uint16_t do_mulh_h(int32_t n, int32_t m)
472 {
473     return (n * m) >> 16;
474 }
475 
476 static inline uint32_t do_mulh_w(int64_t n, int64_t m)
477 {
478     return (n * m) >> 32;
479 }
480 
481 static inline uint8_t do_rmulh_b(int32_t n, int32_t m)
482 {
483     return (n * m + (1U << 7)) >> 8;
484 }
485 
486 static inline uint16_t do_rmulh_h(int32_t n, int32_t m)
487 {
488     return (n * m + (1U << 15)) >> 16;
489 }
490 
491 static inline uint32_t do_rmulh_w(int64_t n, int64_t m)
492 {
493     return (n * m + (1U << 31)) >> 32;
494 }
495 
496 DO_2OP(vmulhsb, 1, int8_t, do_mulh_b)
497 DO_2OP(vmulhsh, 2, int16_t, do_mulh_h)
498 DO_2OP(vmulhsw, 4, int32_t, do_mulh_w)
499 DO_2OP(vmulhub, 1, uint8_t, do_mulh_b)
500 DO_2OP(vmulhuh, 2, uint16_t, do_mulh_h)
501 DO_2OP(vmulhuw, 4, uint32_t, do_mulh_w)
502 
503 DO_2OP(vrmulhsb, 1, int8_t, do_rmulh_b)
504 DO_2OP(vrmulhsh, 2, int16_t, do_rmulh_h)
505 DO_2OP(vrmulhsw, 4, int32_t, do_rmulh_w)
506 DO_2OP(vrmulhub, 1, uint8_t, do_rmulh_b)
507 DO_2OP(vrmulhuh, 2, uint16_t, do_rmulh_h)
508 DO_2OP(vrmulhuw, 4, uint32_t, do_rmulh_w)
509 
510 #define DO_MAX(N, M)  ((N) >= (M) ? (N) : (M))
511 #define DO_MIN(N, M)  ((N) >= (M) ? (M) : (N))
512 
513 DO_2OP_S(vmaxs, DO_MAX)
514 DO_2OP_U(vmaxu, DO_MAX)
515 DO_2OP_S(vmins, DO_MIN)
516 DO_2OP_U(vminu, DO_MIN)
517 
518 #define DO_ABD(N, M)  ((N) >= (M) ? (N) - (M) : (M) - (N))
519 
520 DO_2OP_S(vabds, DO_ABD)
521 DO_2OP_U(vabdu, DO_ABD)
522 
523 static inline uint32_t do_vhadd_u(uint32_t n, uint32_t m)
524 {
525     return ((uint64_t)n + m) >> 1;
526 }
527 
528 static inline int32_t do_vhadd_s(int32_t n, int32_t m)
529 {
530     return ((int64_t)n + m) >> 1;
531 }
532 
533 static inline uint32_t do_vhsub_u(uint32_t n, uint32_t m)
534 {
535     return ((uint64_t)n - m) >> 1;
536 }
537 
538 static inline int32_t do_vhsub_s(int32_t n, int32_t m)
539 {
540     return ((int64_t)n - m) >> 1;
541 }
542 
543 DO_2OP_S(vhadds, do_vhadd_s)
544 DO_2OP_U(vhaddu, do_vhadd_u)
545 DO_2OP_S(vhsubs, do_vhsub_s)
546 DO_2OP_U(vhsubu, do_vhsub_u)
547 
548 #define DO_VSHLS(N, M) do_sqrshl_bhs(N, (int8_t)(M), sizeof(N) * 8, false, NULL)
549 #define DO_VSHLU(N, M) do_uqrshl_bhs(N, (int8_t)(M), sizeof(N) * 8, false, NULL)
550 #define DO_VRSHLS(N, M) do_sqrshl_bhs(N, (int8_t)(M), sizeof(N) * 8, true, NULL)
551 #define DO_VRSHLU(N, M) do_uqrshl_bhs(N, (int8_t)(M), sizeof(N) * 8, true, NULL)
552 
553 DO_2OP_S(vshls, DO_VSHLS)
554 DO_2OP_U(vshlu, DO_VSHLU)
555 DO_2OP_S(vrshls, DO_VRSHLS)
556 DO_2OP_U(vrshlu, DO_VRSHLU)
557 
558 #define DO_RHADD_S(N, M) (((int64_t)(N) + (M) + 1) >> 1)
559 #define DO_RHADD_U(N, M) (((uint64_t)(N) + (M) + 1) >> 1)
560 
561 DO_2OP_S(vrhadds, DO_RHADD_S)
562 DO_2OP_U(vrhaddu, DO_RHADD_U)
563 
564 static void do_vadc(CPUARMState *env, uint32_t *d, uint32_t *n, uint32_t *m,
565                     uint32_t inv, uint32_t carry_in, bool update_flags)
566 {
567     uint16_t mask = mve_element_mask(env);
568     unsigned e;
569 
570     /* If any additions trigger, we will update flags. */
571     if (mask & 0x1111) {
572         update_flags = true;
573     }
574 
575     for (e = 0; e < 16 / 4; e++, mask >>= 4) {
576         uint64_t r = carry_in;
577         r += n[H4(e)];
578         r += m[H4(e)] ^ inv;
579         if (mask & 1) {
580             carry_in = r >> 32;
581         }
582         mergemask(&d[H4(e)], r, mask);
583     }
584 
585     if (update_flags) {
586         /* Store C, clear NZV. */
587         env->vfp.xregs[ARM_VFP_FPSCR] &= ~FPCR_NZCV_MASK;
588         env->vfp.xregs[ARM_VFP_FPSCR] |= carry_in * FPCR_C;
589     }
590     mve_advance_vpt(env);
591 }
592 
593 void HELPER(mve_vadc)(CPUARMState *env, void *vd, void *vn, void *vm)
594 {
595     bool carry_in = env->vfp.xregs[ARM_VFP_FPSCR] & FPCR_C;
596     do_vadc(env, vd, vn, vm, 0, carry_in, false);
597 }
598 
599 void HELPER(mve_vsbc)(CPUARMState *env, void *vd, void *vn, void *vm)
600 {
601     bool carry_in = env->vfp.xregs[ARM_VFP_FPSCR] & FPCR_C;
602     do_vadc(env, vd, vn, vm, -1, carry_in, false);
603 }
604 
605 
606 void HELPER(mve_vadci)(CPUARMState *env, void *vd, void *vn, void *vm)
607 {
608     do_vadc(env, vd, vn, vm, 0, 0, true);
609 }
610 
611 void HELPER(mve_vsbci)(CPUARMState *env, void *vd, void *vn, void *vm)
612 {
613     do_vadc(env, vd, vn, vm, -1, 1, true);
614 }
615 
616 #define DO_VCADD(OP, ESIZE, TYPE, FN0, FN1)                             \
617     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \
618     {                                                                   \
619         TYPE *d = vd, *n = vn, *m = vm;                                 \
620         uint16_t mask = mve_element_mask(env);                          \
621         unsigned e;                                                     \
622         TYPE r[16 / ESIZE];                                             \
623         /* Calculate all results first to avoid overwriting inputs */   \
624         for (e = 0; e < 16 / ESIZE; e++) {                              \
625             if (!(e & 1)) {                                             \
626                 r[e] = FN0(n[H##ESIZE(e)], m[H##ESIZE(e + 1)]);         \
627             } else {                                                    \
628                 r[e] = FN1(n[H##ESIZE(e)], m[H##ESIZE(e - 1)]);         \
629             }                                                           \
630         }                                                               \
631         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
632             mergemask(&d[H##ESIZE(e)], r[e], mask);                     \
633         }                                                               \
634         mve_advance_vpt(env);                                           \
635     }
636 
637 #define DO_VCADD_ALL(OP, FN0, FN1)              \
638     DO_VCADD(OP##b, 1, int8_t, FN0, FN1)        \
639     DO_VCADD(OP##h, 2, int16_t, FN0, FN1)       \
640     DO_VCADD(OP##w, 4, int32_t, FN0, FN1)
641 
642 DO_VCADD_ALL(vcadd90, DO_SUB, DO_ADD)
643 DO_VCADD_ALL(vcadd270, DO_ADD, DO_SUB)
644 DO_VCADD_ALL(vhcadd90, do_vhsub_s, do_vhadd_s)
645 DO_VCADD_ALL(vhcadd270, do_vhadd_s, do_vhsub_s)
646 
647 static inline int32_t do_sat_bhw(int64_t val, int64_t min, int64_t max, bool *s)
648 {
649     if (val > max) {
650         *s = true;
651         return max;
652     } else if (val < min) {
653         *s = true;
654         return min;
655     }
656     return val;
657 }
658 
659 #define DO_SQADD_B(n, m, s) do_sat_bhw((int64_t)n + m, INT8_MIN, INT8_MAX, s)
660 #define DO_SQADD_H(n, m, s) do_sat_bhw((int64_t)n + m, INT16_MIN, INT16_MAX, s)
661 #define DO_SQADD_W(n, m, s) do_sat_bhw((int64_t)n + m, INT32_MIN, INT32_MAX, s)
662 
663 #define DO_UQADD_B(n, m, s) do_sat_bhw((int64_t)n + m, 0, UINT8_MAX, s)
664 #define DO_UQADD_H(n, m, s) do_sat_bhw((int64_t)n + m, 0, UINT16_MAX, s)
665 #define DO_UQADD_W(n, m, s) do_sat_bhw((int64_t)n + m, 0, UINT32_MAX, s)
666 
667 #define DO_SQSUB_B(n, m, s) do_sat_bhw((int64_t)n - m, INT8_MIN, INT8_MAX, s)
668 #define DO_SQSUB_H(n, m, s) do_sat_bhw((int64_t)n - m, INT16_MIN, INT16_MAX, s)
669 #define DO_SQSUB_W(n, m, s) do_sat_bhw((int64_t)n - m, INT32_MIN, INT32_MAX, s)
670 
671 #define DO_UQSUB_B(n, m, s) do_sat_bhw((int64_t)n - m, 0, UINT8_MAX, s)
672 #define DO_UQSUB_H(n, m, s) do_sat_bhw((int64_t)n - m, 0, UINT16_MAX, s)
673 #define DO_UQSUB_W(n, m, s) do_sat_bhw((int64_t)n - m, 0, UINT32_MAX, s)
674 
675 /*
676  * For QDMULH and QRDMULH we simplify "double and shift by esize" into
677  * "shift by esize-1", adjusting the QRDMULH rounding constant to match.
678  */
679 #define DO_QDMULH_B(n, m, s) do_sat_bhw(((int64_t)n * m) >> 7, \
680                                         INT8_MIN, INT8_MAX, s)
681 #define DO_QDMULH_H(n, m, s) do_sat_bhw(((int64_t)n * m) >> 15, \
682                                         INT16_MIN, INT16_MAX, s)
683 #define DO_QDMULH_W(n, m, s) do_sat_bhw(((int64_t)n * m) >> 31, \
684                                         INT32_MIN, INT32_MAX, s)
685 
686 #define DO_QRDMULH_B(n, m, s) do_sat_bhw(((int64_t)n * m + (1 << 6)) >> 7, \
687                                          INT8_MIN, INT8_MAX, s)
688 #define DO_QRDMULH_H(n, m, s) do_sat_bhw(((int64_t)n * m + (1 << 14)) >> 15, \
689                                          INT16_MIN, INT16_MAX, s)
690 #define DO_QRDMULH_W(n, m, s) do_sat_bhw(((int64_t)n * m + (1 << 30)) >> 31, \
691                                          INT32_MIN, INT32_MAX, s)
692 
693 DO_2OP_SAT(vqdmulhb, 1, int8_t, DO_QDMULH_B)
694 DO_2OP_SAT(vqdmulhh, 2, int16_t, DO_QDMULH_H)
695 DO_2OP_SAT(vqdmulhw, 4, int32_t, DO_QDMULH_W)
696 
697 DO_2OP_SAT(vqrdmulhb, 1, int8_t, DO_QRDMULH_B)
698 DO_2OP_SAT(vqrdmulhh, 2, int16_t, DO_QRDMULH_H)
699 DO_2OP_SAT(vqrdmulhw, 4, int32_t, DO_QRDMULH_W)
700 
701 DO_2OP_SAT(vqaddub, 1, uint8_t, DO_UQADD_B)
702 DO_2OP_SAT(vqadduh, 2, uint16_t, DO_UQADD_H)
703 DO_2OP_SAT(vqadduw, 4, uint32_t, DO_UQADD_W)
704 DO_2OP_SAT(vqaddsb, 1, int8_t, DO_SQADD_B)
705 DO_2OP_SAT(vqaddsh, 2, int16_t, DO_SQADD_H)
706 DO_2OP_SAT(vqaddsw, 4, int32_t, DO_SQADD_W)
707 
708 DO_2OP_SAT(vqsubub, 1, uint8_t, DO_UQSUB_B)
709 DO_2OP_SAT(vqsubuh, 2, uint16_t, DO_UQSUB_H)
710 DO_2OP_SAT(vqsubuw, 4, uint32_t, DO_UQSUB_W)
711 DO_2OP_SAT(vqsubsb, 1, int8_t, DO_SQSUB_B)
712 DO_2OP_SAT(vqsubsh, 2, int16_t, DO_SQSUB_H)
713 DO_2OP_SAT(vqsubsw, 4, int32_t, DO_SQSUB_W)
714 
715 /*
716  * This wrapper fixes up the impedance mismatch between do_sqrshl_bhs()
717  * and friends wanting a uint32_t* sat and our needing a bool*.
718  */
719 #define WRAP_QRSHL_HELPER(FN, N, M, ROUND, satp)                        \
720     ({                                                                  \
721         uint32_t su32 = 0;                                              \
722         typeof(N) r = FN(N, (int8_t)(M), sizeof(N) * 8, ROUND, &su32);  \
723         if (su32) {                                                     \
724             *satp = true;                                               \
725         }                                                               \
726         r;                                                              \
727     })
728 
729 #define DO_SQSHL_OP(N, M, satp) \
730     WRAP_QRSHL_HELPER(do_sqrshl_bhs, N, M, false, satp)
731 #define DO_UQSHL_OP(N, M, satp) \
732     WRAP_QRSHL_HELPER(do_uqrshl_bhs, N, M, false, satp)
733 #define DO_SQRSHL_OP(N, M, satp) \
734     WRAP_QRSHL_HELPER(do_sqrshl_bhs, N, M, true, satp)
735 #define DO_UQRSHL_OP(N, M, satp) \
736     WRAP_QRSHL_HELPER(do_uqrshl_bhs, N, M, true, satp)
737 #define DO_SUQSHL_OP(N, M, satp) \
738     WRAP_QRSHL_HELPER(do_suqrshl_bhs, N, M, false, satp)
739 
740 DO_2OP_SAT_S(vqshls, DO_SQSHL_OP)
741 DO_2OP_SAT_U(vqshlu, DO_UQSHL_OP)
742 DO_2OP_SAT_S(vqrshls, DO_SQRSHL_OP)
743 DO_2OP_SAT_U(vqrshlu, DO_UQRSHL_OP)
744 
745 /*
746  * Multiply add dual returning high half
747  * The 'FN' here takes four inputs A, B, C, D, a 0/1 indicator of
748  * whether to add the rounding constant, and the pointer to the
749  * saturation flag, and should do "(A * B + C * D) * 2 + rounding constant",
750  * saturate to twice the input size and return the high half; or
751  * (A * B - C * D) etc for VQDMLSDH.
752  */
753 #define DO_VQDMLADH_OP(OP, ESIZE, TYPE, XCHG, ROUND, FN)                \
754     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
755                                 void *vm)                               \
756     {                                                                   \
757         TYPE *d = vd, *n = vn, *m = vm;                                 \
758         uint16_t mask = mve_element_mask(env);                          \
759         unsigned e;                                                     \
760         bool qc = false;                                                \
761         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
762             bool sat = false;                                           \
763             if ((e & 1) == XCHG) {                                      \
764                 TYPE r = FN(n[H##ESIZE(e)],                             \
765                             m[H##ESIZE(e - XCHG)],                      \
766                             n[H##ESIZE(e + (1 - 2 * XCHG))],            \
767                             m[H##ESIZE(e + (1 - XCHG))],                \
768                             ROUND, &sat);                               \
769                 mergemask(&d[H##ESIZE(e)], r, mask);                    \
770                 qc |= sat & mask & 1;                                   \
771             }                                                           \
772         }                                                               \
773         if (qc) {                                                       \
774             env->vfp.qc[0] = qc;                                        \
775         }                                                               \
776         mve_advance_vpt(env);                                           \
777     }
778 
779 static int8_t do_vqdmladh_b(int8_t a, int8_t b, int8_t c, int8_t d,
780                             int round, bool *sat)
781 {
782     int64_t r = ((int64_t)a * b + (int64_t)c * d) * 2 + (round << 7);
783     return do_sat_bhw(r, INT16_MIN, INT16_MAX, sat) >> 8;
784 }
785 
786 static int16_t do_vqdmladh_h(int16_t a, int16_t b, int16_t c, int16_t d,
787                              int round, bool *sat)
788 {
789     int64_t r = ((int64_t)a * b + (int64_t)c * d) * 2 + (round << 15);
790     return do_sat_bhw(r, INT32_MIN, INT32_MAX, sat) >> 16;
791 }
792 
793 static int32_t do_vqdmladh_w(int32_t a, int32_t b, int32_t c, int32_t d,
794                              int round, bool *sat)
795 {
796     int64_t m1 = (int64_t)a * b;
797     int64_t m2 = (int64_t)c * d;
798     int64_t r;
799     /*
800      * Architecturally we should do the entire add, double, round
801      * and then check for saturation. We do three saturating adds,
802      * but we need to be careful about the order. If the first
803      * m1 + m2 saturates then it's impossible for the *2+rc to
804      * bring it back into the non-saturated range. However, if
805      * m1 + m2 is negative then it's possible that doing the doubling
806      * would take the intermediate result below INT64_MAX and the
807      * addition of the rounding constant then brings it back in range.
808      * So we add half the rounding constant before doubling rather
809      * than adding the rounding constant after the doubling.
810      */
811     if (sadd64_overflow(m1, m2, &r) ||
812         sadd64_overflow(r, (round << 30), &r) ||
813         sadd64_overflow(r, r, &r)) {
814         *sat = true;
815         return r < 0 ? INT32_MAX : INT32_MIN;
816     }
817     return r >> 32;
818 }
819 
820 static int8_t do_vqdmlsdh_b(int8_t a, int8_t b, int8_t c, int8_t d,
821                             int round, bool *sat)
822 {
823     int64_t r = ((int64_t)a * b - (int64_t)c * d) * 2 + (round << 7);
824     return do_sat_bhw(r, INT16_MIN, INT16_MAX, sat) >> 8;
825 }
826 
827 static int16_t do_vqdmlsdh_h(int16_t a, int16_t b, int16_t c, int16_t d,
828                              int round, bool *sat)
829 {
830     int64_t r = ((int64_t)a * b - (int64_t)c * d) * 2 + (round << 15);
831     return do_sat_bhw(r, INT32_MIN, INT32_MAX, sat) >> 16;
832 }
833 
834 static int32_t do_vqdmlsdh_w(int32_t a, int32_t b, int32_t c, int32_t d,
835                              int round, bool *sat)
836 {
837     int64_t m1 = (int64_t)a * b;
838     int64_t m2 = (int64_t)c * d;
839     int64_t r;
840     /* The same ordering issue as in do_vqdmladh_w applies here too */
841     if (ssub64_overflow(m1, m2, &r) ||
842         sadd64_overflow(r, (round << 30), &r) ||
843         sadd64_overflow(r, r, &r)) {
844         *sat = true;
845         return r < 0 ? INT32_MAX : INT32_MIN;
846     }
847     return r >> 32;
848 }
849 
850 DO_VQDMLADH_OP(vqdmladhb, 1, int8_t, 0, 0, do_vqdmladh_b)
851 DO_VQDMLADH_OP(vqdmladhh, 2, int16_t, 0, 0, do_vqdmladh_h)
852 DO_VQDMLADH_OP(vqdmladhw, 4, int32_t, 0, 0, do_vqdmladh_w)
853 DO_VQDMLADH_OP(vqdmladhxb, 1, int8_t, 1, 0, do_vqdmladh_b)
854 DO_VQDMLADH_OP(vqdmladhxh, 2, int16_t, 1, 0, do_vqdmladh_h)
855 DO_VQDMLADH_OP(vqdmladhxw, 4, int32_t, 1, 0, do_vqdmladh_w)
856 
857 DO_VQDMLADH_OP(vqrdmladhb, 1, int8_t, 0, 1, do_vqdmladh_b)
858 DO_VQDMLADH_OP(vqrdmladhh, 2, int16_t, 0, 1, do_vqdmladh_h)
859 DO_VQDMLADH_OP(vqrdmladhw, 4, int32_t, 0, 1, do_vqdmladh_w)
860 DO_VQDMLADH_OP(vqrdmladhxb, 1, int8_t, 1, 1, do_vqdmladh_b)
861 DO_VQDMLADH_OP(vqrdmladhxh, 2, int16_t, 1, 1, do_vqdmladh_h)
862 DO_VQDMLADH_OP(vqrdmladhxw, 4, int32_t, 1, 1, do_vqdmladh_w)
863 
864 DO_VQDMLADH_OP(vqdmlsdhb, 1, int8_t, 0, 0, do_vqdmlsdh_b)
865 DO_VQDMLADH_OP(vqdmlsdhh, 2, int16_t, 0, 0, do_vqdmlsdh_h)
866 DO_VQDMLADH_OP(vqdmlsdhw, 4, int32_t, 0, 0, do_vqdmlsdh_w)
867 DO_VQDMLADH_OP(vqdmlsdhxb, 1, int8_t, 1, 0, do_vqdmlsdh_b)
868 DO_VQDMLADH_OP(vqdmlsdhxh, 2, int16_t, 1, 0, do_vqdmlsdh_h)
869 DO_VQDMLADH_OP(vqdmlsdhxw, 4, int32_t, 1, 0, do_vqdmlsdh_w)
870 
871 DO_VQDMLADH_OP(vqrdmlsdhb, 1, int8_t, 0, 1, do_vqdmlsdh_b)
872 DO_VQDMLADH_OP(vqrdmlsdhh, 2, int16_t, 0, 1, do_vqdmlsdh_h)
873 DO_VQDMLADH_OP(vqrdmlsdhw, 4, int32_t, 0, 1, do_vqdmlsdh_w)
874 DO_VQDMLADH_OP(vqrdmlsdhxb, 1, int8_t, 1, 1, do_vqdmlsdh_b)
875 DO_VQDMLADH_OP(vqrdmlsdhxh, 2, int16_t, 1, 1, do_vqdmlsdh_h)
876 DO_VQDMLADH_OP(vqrdmlsdhxw, 4, int32_t, 1, 1, do_vqdmlsdh_w)
877 
878 #define DO_2OP_SCALAR(OP, ESIZE, TYPE, FN)                              \
879     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
880                                 uint32_t rm)                            \
881     {                                                                   \
882         TYPE *d = vd, *n = vn;                                          \
883         TYPE m = rm;                                                    \
884         uint16_t mask = mve_element_mask(env);                          \
885         unsigned e;                                                     \
886         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
887             mergemask(&d[H##ESIZE(e)], FN(n[H##ESIZE(e)], m), mask);    \
888         }                                                               \
889         mve_advance_vpt(env);                                           \
890     }
891 
892 #define DO_2OP_SAT_SCALAR(OP, ESIZE, TYPE, FN)                          \
893     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
894                                 uint32_t rm)                            \
895     {                                                                   \
896         TYPE *d = vd, *n = vn;                                          \
897         TYPE m = rm;                                                    \
898         uint16_t mask = mve_element_mask(env);                          \
899         unsigned e;                                                     \
900         bool qc = false;                                                \
901         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
902             bool sat = false;                                           \
903             mergemask(&d[H##ESIZE(e)], FN(n[H##ESIZE(e)], m, &sat),     \
904                       mask);                                            \
905             qc |= sat & mask & 1;                                       \
906         }                                                               \
907         if (qc) {                                                       \
908             env->vfp.qc[0] = qc;                                        \
909         }                                                               \
910         mve_advance_vpt(env);                                           \
911     }
912 
913 /* provide unsigned 2-op scalar helpers for all sizes */
914 #define DO_2OP_SCALAR_U(OP, FN)                 \
915     DO_2OP_SCALAR(OP##b, 1, uint8_t, FN)        \
916     DO_2OP_SCALAR(OP##h, 2, uint16_t, FN)       \
917     DO_2OP_SCALAR(OP##w, 4, uint32_t, FN)
918 #define DO_2OP_SCALAR_S(OP, FN)                 \
919     DO_2OP_SCALAR(OP##b, 1, int8_t, FN)         \
920     DO_2OP_SCALAR(OP##h, 2, int16_t, FN)        \
921     DO_2OP_SCALAR(OP##w, 4, int32_t, FN)
922 
923 DO_2OP_SCALAR_U(vadd_scalar, DO_ADD)
924 DO_2OP_SCALAR_U(vsub_scalar, DO_SUB)
925 DO_2OP_SCALAR_U(vmul_scalar, DO_MUL)
926 DO_2OP_SCALAR_S(vhadds_scalar, do_vhadd_s)
927 DO_2OP_SCALAR_U(vhaddu_scalar, do_vhadd_u)
928 DO_2OP_SCALAR_S(vhsubs_scalar, do_vhsub_s)
929 DO_2OP_SCALAR_U(vhsubu_scalar, do_vhsub_u)
930 
931 DO_2OP_SAT_SCALAR(vqaddu_scalarb, 1, uint8_t, DO_UQADD_B)
932 DO_2OP_SAT_SCALAR(vqaddu_scalarh, 2, uint16_t, DO_UQADD_H)
933 DO_2OP_SAT_SCALAR(vqaddu_scalarw, 4, uint32_t, DO_UQADD_W)
934 DO_2OP_SAT_SCALAR(vqadds_scalarb, 1, int8_t, DO_SQADD_B)
935 DO_2OP_SAT_SCALAR(vqadds_scalarh, 2, int16_t, DO_SQADD_H)
936 DO_2OP_SAT_SCALAR(vqadds_scalarw, 4, int32_t, DO_SQADD_W)
937 
938 DO_2OP_SAT_SCALAR(vqsubu_scalarb, 1, uint8_t, DO_UQSUB_B)
939 DO_2OP_SAT_SCALAR(vqsubu_scalarh, 2, uint16_t, DO_UQSUB_H)
940 DO_2OP_SAT_SCALAR(vqsubu_scalarw, 4, uint32_t, DO_UQSUB_W)
941 DO_2OP_SAT_SCALAR(vqsubs_scalarb, 1, int8_t, DO_SQSUB_B)
942 DO_2OP_SAT_SCALAR(vqsubs_scalarh, 2, int16_t, DO_SQSUB_H)
943 DO_2OP_SAT_SCALAR(vqsubs_scalarw, 4, int32_t, DO_SQSUB_W)
944 
945 DO_2OP_SAT_SCALAR(vqdmulh_scalarb, 1, int8_t, DO_QDMULH_B)
946 DO_2OP_SAT_SCALAR(vqdmulh_scalarh, 2, int16_t, DO_QDMULH_H)
947 DO_2OP_SAT_SCALAR(vqdmulh_scalarw, 4, int32_t, DO_QDMULH_W)
948 DO_2OP_SAT_SCALAR(vqrdmulh_scalarb, 1, int8_t, DO_QRDMULH_B)
949 DO_2OP_SAT_SCALAR(vqrdmulh_scalarh, 2, int16_t, DO_QRDMULH_H)
950 DO_2OP_SAT_SCALAR(vqrdmulh_scalarw, 4, int32_t, DO_QRDMULH_W)
951 
952 /*
953  * Long saturating scalar ops. As with DO_2OP_L, TYPE and H are for the
954  * input (smaller) type and LESIZE, LTYPE, LH for the output (long) type.
955  * SATMASK specifies which bits of the predicate mask matter for determining
956  * whether to propagate a saturation indication into FPSCR.QC -- for
957  * the 16x16->32 case we must check only the bit corresponding to the T or B
958  * half that we used, but for the 32x32->64 case we propagate if the mask
959  * bit is set for either half.
960  */
961 #define DO_2OP_SAT_SCALAR_L(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN, SATMASK) \
962     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
963                                 uint32_t rm)                            \
964     {                                                                   \
965         LTYPE *d = vd;                                                  \
966         TYPE *n = vn;                                                   \
967         TYPE m = rm;                                                    \
968         uint16_t mask = mve_element_mask(env);                          \
969         unsigned le;                                                    \
970         bool qc = false;                                                \
971         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
972             bool sat = false;                                           \
973             LTYPE r = FN((LTYPE)n[H##ESIZE(le * 2 + TOP)], m, &sat);    \
974             mergemask(&d[H##LESIZE(le)], r, mask);                      \
975             qc |= sat && (mask & SATMASK);                              \
976         }                                                               \
977         if (qc) {                                                       \
978             env->vfp.qc[0] = qc;                                        \
979         }                                                               \
980         mve_advance_vpt(env);                                           \
981     }
982 
983 static inline int32_t do_qdmullh(int16_t n, int16_t m, bool *sat)
984 {
985     int64_t r = ((int64_t)n * m) * 2;
986     return do_sat_bhw(r, INT32_MIN, INT32_MAX, sat);
987 }
988 
989 static inline int64_t do_qdmullw(int32_t n, int32_t m, bool *sat)
990 {
991     /* The multiply can't overflow, but the doubling might */
992     int64_t r = (int64_t)n * m;
993     if (r > INT64_MAX / 2) {
994         *sat = true;
995         return INT64_MAX;
996     } else if (r < INT64_MIN / 2) {
997         *sat = true;
998         return INT64_MIN;
999     } else {
1000         return r * 2;
1001     }
1002 }
1003 
1004 #define SATMASK16B 1
1005 #define SATMASK16T (1 << 2)
1006 #define SATMASK32 ((1 << 4) | 1)
1007 
1008 DO_2OP_SAT_SCALAR_L(vqdmullb_scalarh, 0, 2, int16_t, 4, int32_t, \
1009                     do_qdmullh, SATMASK16B)
1010 DO_2OP_SAT_SCALAR_L(vqdmullb_scalarw, 0, 4, int32_t, 8, int64_t, \
1011                     do_qdmullw, SATMASK32)
1012 DO_2OP_SAT_SCALAR_L(vqdmullt_scalarh, 1, 2, int16_t, 4, int32_t, \
1013                     do_qdmullh, SATMASK16T)
1014 DO_2OP_SAT_SCALAR_L(vqdmullt_scalarw, 1, 4, int32_t, 8, int64_t, \
1015                     do_qdmullw, SATMASK32)
1016 
1017 /*
1018  * Long saturating ops
1019  */
1020 #define DO_2OP_SAT_L(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN, SATMASK)  \
1021     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
1022                                 void *vm)                               \
1023     {                                                                   \
1024         LTYPE *d = vd;                                                  \
1025         TYPE *n = vn, *m = vm;                                          \
1026         uint16_t mask = mve_element_mask(env);                          \
1027         unsigned le;                                                    \
1028         bool qc = false;                                                \
1029         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
1030             bool sat = false;                                           \
1031             LTYPE op1 = n[H##ESIZE(le * 2 + TOP)];                      \
1032             LTYPE op2 = m[H##ESIZE(le * 2 + TOP)];                      \
1033             mergemask(&d[H##LESIZE(le)], FN(op1, op2, &sat), mask);     \
1034             qc |= sat && (mask & SATMASK);                              \
1035         }                                                               \
1036         if (qc) {                                                       \
1037             env->vfp.qc[0] = qc;                                        \
1038         }                                                               \
1039         mve_advance_vpt(env);                                           \
1040     }
1041 
1042 DO_2OP_SAT_L(vqdmullbh, 0, 2, int16_t, 4, int32_t, do_qdmullh, SATMASK16B)
1043 DO_2OP_SAT_L(vqdmullbw, 0, 4, int32_t, 8, int64_t, do_qdmullw, SATMASK32)
1044 DO_2OP_SAT_L(vqdmullth, 1, 2, int16_t, 4, int32_t, do_qdmullh, SATMASK16T)
1045 DO_2OP_SAT_L(vqdmulltw, 1, 4, int32_t, 8, int64_t, do_qdmullw, SATMASK32)
1046 
1047 static inline uint32_t do_vbrsrb(uint32_t n, uint32_t m)
1048 {
1049     m &= 0xff;
1050     if (m == 0) {
1051         return 0;
1052     }
1053     n = revbit8(n);
1054     if (m < 8) {
1055         n >>= 8 - m;
1056     }
1057     return n;
1058 }
1059 
1060 static inline uint32_t do_vbrsrh(uint32_t n, uint32_t m)
1061 {
1062     m &= 0xff;
1063     if (m == 0) {
1064         return 0;
1065     }
1066     n = revbit16(n);
1067     if (m < 16) {
1068         n >>= 16 - m;
1069     }
1070     return n;
1071 }
1072 
1073 static inline uint32_t do_vbrsrw(uint32_t n, uint32_t m)
1074 {
1075     m &= 0xff;
1076     if (m == 0) {
1077         return 0;
1078     }
1079     n = revbit32(n);
1080     if (m < 32) {
1081         n >>= 32 - m;
1082     }
1083     return n;
1084 }
1085 
1086 DO_2OP_SCALAR(vbrsrb, 1, uint8_t, do_vbrsrb)
1087 DO_2OP_SCALAR(vbrsrh, 2, uint16_t, do_vbrsrh)
1088 DO_2OP_SCALAR(vbrsrw, 4, uint32_t, do_vbrsrw)
1089 
1090 /*
1091  * Multiply add long dual accumulate ops.
1092  */
1093 #define DO_LDAV(OP, ESIZE, TYPE, XCHG, EVENACC, ODDACC)                 \
1094     uint64_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vn,         \
1095                                     void *vm, uint64_t a)               \
1096     {                                                                   \
1097         uint16_t mask = mve_element_mask(env);                          \
1098         unsigned e;                                                     \
1099         TYPE *n = vn, *m = vm;                                          \
1100         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
1101             if (mask & 1) {                                             \
1102                 if (e & 1) {                                            \
1103                     a ODDACC                                            \
1104                         (int64_t)n[H##ESIZE(e - 1 * XCHG)] * m[H##ESIZE(e)]; \
1105                 } else {                                                \
1106                     a EVENACC                                           \
1107                         (int64_t)n[H##ESIZE(e + 1 * XCHG)] * m[H##ESIZE(e)]; \
1108                 }                                                       \
1109             }                                                           \
1110         }                                                               \
1111         mve_advance_vpt(env);                                           \
1112         return a;                                                       \
1113     }
1114 
1115 DO_LDAV(vmlaldavsh, 2, int16_t, false, +=, +=)
1116 DO_LDAV(vmlaldavxsh, 2, int16_t, true, +=, +=)
1117 DO_LDAV(vmlaldavsw, 4, int32_t, false, +=, +=)
1118 DO_LDAV(vmlaldavxsw, 4, int32_t, true, +=, +=)
1119 
1120 DO_LDAV(vmlaldavuh, 2, uint16_t, false, +=, +=)
1121 DO_LDAV(vmlaldavuw, 4, uint32_t, false, +=, +=)
1122 
1123 DO_LDAV(vmlsldavsh, 2, int16_t, false, +=, -=)
1124 DO_LDAV(vmlsldavxsh, 2, int16_t, true, +=, -=)
1125 DO_LDAV(vmlsldavsw, 4, int32_t, false, +=, -=)
1126 DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
1127 
1128 /*
1129  * Rounding multiply add long dual accumulate high. In the pseudocode
1130  * this is implemented with a 72-bit internal accumulator value of which
1131  * the top 64 bits are returned. We optimize this to avoid having to
1132  * use 128-bit arithmetic -- we can do this because the 74-bit accumulator
1133  * is squashed back into 64-bits after each beat.
1134  */
1135 #define DO_LDAVH(OP, TYPE, LTYPE, XCHG, SUB)                            \
1136     uint64_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vn,         \
1137                                     void *vm, uint64_t a)               \
1138     {                                                                   \
1139         uint16_t mask = mve_element_mask(env);                          \
1140         unsigned e;                                                     \
1141         TYPE *n = vn, *m = vm;                                          \
1142         for (e = 0; e < 16 / 4; e++, mask >>= 4) {                      \
1143             if (mask & 1) {                                             \
1144                 LTYPE mul;                                              \
1145                 if (e & 1) {                                            \
1146                     mul = (LTYPE)n[H4(e - 1 * XCHG)] * m[H4(e)];        \
1147                     if (SUB) {                                          \
1148                         mul = -mul;                                     \
1149                     }                                                   \
1150                 } else {                                                \
1151                     mul = (LTYPE)n[H4(e + 1 * XCHG)] * m[H4(e)];        \
1152                 }                                                       \
1153                 mul = (mul >> 8) + ((mul >> 7) & 1);                    \
1154                 a += mul;                                               \
1155             }                                                           \
1156         }                                                               \
1157         mve_advance_vpt(env);                                           \
1158         return a;                                                       \
1159     }
1160 
1161 DO_LDAVH(vrmlaldavhsw, int32_t, int64_t, false, false)
1162 DO_LDAVH(vrmlaldavhxsw, int32_t, int64_t, true, false)
1163 
1164 DO_LDAVH(vrmlaldavhuw, uint32_t, uint64_t, false, false)
1165 
1166 DO_LDAVH(vrmlsldavhsw, int32_t, int64_t, false, true)
1167 DO_LDAVH(vrmlsldavhxsw, int32_t, int64_t, true, true)
1168 
1169 /* Vector add across vector */
1170 #define DO_VADDV(OP, ESIZE, TYPE)                               \
1171     uint32_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vm, \
1172                                     uint32_t ra)                \
1173     {                                                           \
1174         uint16_t mask = mve_element_mask(env);                  \
1175         unsigned e;                                             \
1176         TYPE *m = vm;                                           \
1177         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
1178             if (mask & 1) {                                     \
1179                 ra += m[H##ESIZE(e)];                           \
1180             }                                                   \
1181         }                                                       \
1182         mve_advance_vpt(env);                                   \
1183         return ra;                                              \
1184     }                                                           \
1185 
1186 DO_VADDV(vaddvsb, 1, int8_t)
1187 DO_VADDV(vaddvsh, 2, int16_t)
1188 DO_VADDV(vaddvsw, 4, int32_t)
1189 DO_VADDV(vaddvub, 1, uint8_t)
1190 DO_VADDV(vaddvuh, 2, uint16_t)
1191 DO_VADDV(vaddvuw, 4, uint32_t)
1192 
1193 #define DO_VADDLV(OP, TYPE, LTYPE)                              \
1194     uint64_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vm, \
1195                                     uint64_t ra)                \
1196     {                                                           \
1197         uint16_t mask = mve_element_mask(env);                  \
1198         unsigned e;                                             \
1199         TYPE *m = vm;                                           \
1200         for (e = 0; e < 16 / 4; e++, mask >>= 4) {              \
1201             if (mask & 1) {                                     \
1202                 ra += (LTYPE)m[H4(e)];                          \
1203             }                                                   \
1204         }                                                       \
1205         mve_advance_vpt(env);                                   \
1206         return ra;                                              \
1207     }                                                           \
1208 
1209 DO_VADDLV(vaddlv_s, int32_t, int64_t)
1210 DO_VADDLV(vaddlv_u, uint32_t, uint64_t)
1211 
1212 /* Shifts by immediate */
1213 #define DO_2SHIFT(OP, ESIZE, TYPE, FN)                          \
1214     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,     \
1215                                 void *vm, uint32_t shift)       \
1216     {                                                           \
1217         TYPE *d = vd, *m = vm;                                  \
1218         uint16_t mask = mve_element_mask(env);                  \
1219         unsigned e;                                             \
1220         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
1221             mergemask(&d[H##ESIZE(e)],                          \
1222                       FN(m[H##ESIZE(e)], shift), mask);         \
1223         }                                                       \
1224         mve_advance_vpt(env);                                   \
1225     }
1226 
1227 #define DO_2SHIFT_SAT(OP, ESIZE, TYPE, FN)                      \
1228     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,     \
1229                                 void *vm, uint32_t shift)       \
1230     {                                                           \
1231         TYPE *d = vd, *m = vm;                                  \
1232         uint16_t mask = mve_element_mask(env);                  \
1233         unsigned e;                                             \
1234         bool qc = false;                                        \
1235         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
1236             bool sat = false;                                   \
1237             mergemask(&d[H##ESIZE(e)],                          \
1238                       FN(m[H##ESIZE(e)], shift, &sat), mask);   \
1239             qc |= sat & mask & 1;                               \
1240         }                                                       \
1241         if (qc) {                                               \
1242             env->vfp.qc[0] = qc;                                \
1243         }                                                       \
1244         mve_advance_vpt(env);                                   \
1245     }
1246 
1247 /* provide unsigned 2-op shift helpers for all sizes */
1248 #define DO_2SHIFT_U(OP, FN)                     \
1249     DO_2SHIFT(OP##b, 1, uint8_t, FN)            \
1250     DO_2SHIFT(OP##h, 2, uint16_t, FN)           \
1251     DO_2SHIFT(OP##w, 4, uint32_t, FN)
1252 #define DO_2SHIFT_S(OP, FN)                     \
1253     DO_2SHIFT(OP##b, 1, int8_t, FN)             \
1254     DO_2SHIFT(OP##h, 2, int16_t, FN)            \
1255     DO_2SHIFT(OP##w, 4, int32_t, FN)
1256 
1257 #define DO_2SHIFT_SAT_U(OP, FN)                 \
1258     DO_2SHIFT_SAT(OP##b, 1, uint8_t, FN)        \
1259     DO_2SHIFT_SAT(OP##h, 2, uint16_t, FN)       \
1260     DO_2SHIFT_SAT(OP##w, 4, uint32_t, FN)
1261 #define DO_2SHIFT_SAT_S(OP, FN)                 \
1262     DO_2SHIFT_SAT(OP##b, 1, int8_t, FN)         \
1263     DO_2SHIFT_SAT(OP##h, 2, int16_t, FN)        \
1264     DO_2SHIFT_SAT(OP##w, 4, int32_t, FN)
1265 
1266 DO_2SHIFT_U(vshli_u, DO_VSHLU)
1267 DO_2SHIFT_S(vshli_s, DO_VSHLS)
1268 DO_2SHIFT_SAT_U(vqshli_u, DO_UQSHL_OP)
1269 DO_2SHIFT_SAT_S(vqshli_s, DO_SQSHL_OP)
1270 DO_2SHIFT_SAT_S(vqshlui_s, DO_SUQSHL_OP)
1271 DO_2SHIFT_U(vrshli_u, DO_VRSHLU)
1272 DO_2SHIFT_S(vrshli_s, DO_VRSHLS)
1273 
1274 /* Shift-and-insert; we always work with 64 bits at a time */
1275 #define DO_2SHIFT_INSERT(OP, ESIZE, SHIFTFN, MASKFN)                    \
1276     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,             \
1277                                 void *vm, uint32_t shift)               \
1278     {                                                                   \
1279         uint64_t *d = vd, *m = vm;                                      \
1280         uint16_t mask;                                                  \
1281         uint64_t shiftmask;                                             \
1282         unsigned e;                                                     \
1283         if (shift == ESIZE * 8) {                                       \
1284             /*                                                          \
1285              * Only VSRI can shift by <dt>; it should mean "don't       \
1286              * update the destination". The generic logic can't handle  \
1287              * this because it would try to shift by an out-of-range    \
1288              * amount, so special case it here.                         \
1289              */                                                         \
1290             goto done;                                                  \
1291         }                                                               \
1292         assert(shift < ESIZE * 8);                                      \
1293         mask = mve_element_mask(env);                                   \
1294         /* ESIZE / 2 gives the MO_* value if ESIZE is in [1,2,4] */     \
1295         shiftmask = dup_const(ESIZE / 2, MASKFN(ESIZE * 8, shift));     \
1296         for (e = 0; e < 16 / 8; e++, mask >>= 8) {                      \
1297             uint64_t r = (SHIFTFN(m[H8(e)], shift) & shiftmask) |       \
1298                 (d[H8(e)] & ~shiftmask);                                \
1299             mergemask(&d[H8(e)], r, mask);                              \
1300         }                                                               \
1301 done:                                                                   \
1302         mve_advance_vpt(env);                                           \
1303     }
1304 
1305 #define DO_SHL(N, SHIFT) ((N) << (SHIFT))
1306 #define DO_SHR(N, SHIFT) ((N) >> (SHIFT))
1307 #define SHL_MASK(EBITS, SHIFT) MAKE_64BIT_MASK((SHIFT), (EBITS) - (SHIFT))
1308 #define SHR_MASK(EBITS, SHIFT) MAKE_64BIT_MASK(0, (EBITS) - (SHIFT))
1309 
1310 DO_2SHIFT_INSERT(vsrib, 1, DO_SHR, SHR_MASK)
1311 DO_2SHIFT_INSERT(vsrih, 2, DO_SHR, SHR_MASK)
1312 DO_2SHIFT_INSERT(vsriw, 4, DO_SHR, SHR_MASK)
1313 DO_2SHIFT_INSERT(vslib, 1, DO_SHL, SHL_MASK)
1314 DO_2SHIFT_INSERT(vslih, 2, DO_SHL, SHL_MASK)
1315 DO_2SHIFT_INSERT(vsliw, 4, DO_SHL, SHL_MASK)
1316 
1317 /*
1318  * Long shifts taking half-sized inputs from top or bottom of the input
1319  * vector and producing a double-width result. ESIZE, TYPE are for
1320  * the input, and LESIZE, LTYPE for the output.
1321  * Unlike the normal shift helpers, we do not handle negative shift counts,
1322  * because the long shift is strictly left-only.
1323  */
1324 #define DO_VSHLL(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE)                   \
1325     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,             \
1326                                 void *vm, uint32_t shift)               \
1327     {                                                                   \
1328         LTYPE *d = vd;                                                  \
1329         TYPE *m = vm;                                                   \
1330         uint16_t mask = mve_element_mask(env);                          \
1331         unsigned le;                                                    \
1332         assert(shift <= 16);                                            \
1333         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
1334             LTYPE r = (LTYPE)m[H##ESIZE(le * 2 + TOP)] << shift;        \
1335             mergemask(&d[H##LESIZE(le)], r, mask);                      \
1336         }                                                               \
1337         mve_advance_vpt(env);                                           \
1338     }
1339 
1340 #define DO_VSHLL_ALL(OP, TOP)                                \
1341     DO_VSHLL(OP##sb, TOP, 1, int8_t, 2, int16_t)             \
1342     DO_VSHLL(OP##ub, TOP, 1, uint8_t, 2, uint16_t)           \
1343     DO_VSHLL(OP##sh, TOP, 2, int16_t, 4, int32_t)            \
1344     DO_VSHLL(OP##uh, TOP, 2, uint16_t, 4, uint32_t)          \
1345 
1346 DO_VSHLL_ALL(vshllb, false)
1347 DO_VSHLL_ALL(vshllt, true)
1348 
1349 /*
1350  * Narrowing right shifts, taking a double sized input, shifting it
1351  * and putting the result in either the top or bottom half of the output.
1352  * ESIZE, TYPE are the output, and LESIZE, LTYPE the input.
1353  */
1354 #define DO_VSHRN(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN)       \
1355     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,     \
1356                                 void *vm, uint32_t shift)       \
1357     {                                                           \
1358         LTYPE *m = vm;                                          \
1359         TYPE *d = vd;                                           \
1360         uint16_t mask = mve_element_mask(env);                  \
1361         unsigned le;                                            \
1362         mask >>= ESIZE * TOP;                                   \
1363         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) { \
1364             TYPE r = FN(m[H##LESIZE(le)], shift);               \
1365             mergemask(&d[H##ESIZE(le * 2 + TOP)], r, mask);     \
1366         }                                                       \
1367         mve_advance_vpt(env);                                   \
1368     }
1369 
1370 #define DO_VSHRN_ALL(OP, FN)                                    \
1371     DO_VSHRN(OP##bb, false, 1, uint8_t, 2, uint16_t, FN)        \
1372     DO_VSHRN(OP##bh, false, 2, uint16_t, 4, uint32_t, FN)       \
1373     DO_VSHRN(OP##tb, true, 1, uint8_t, 2, uint16_t, FN)         \
1374     DO_VSHRN(OP##th, true, 2, uint16_t, 4, uint32_t, FN)
1375 
1376 static inline uint64_t do_urshr(uint64_t x, unsigned sh)
1377 {
1378     if (likely(sh < 64)) {
1379         return (x >> sh) + ((x >> (sh - 1)) & 1);
1380     } else if (sh == 64) {
1381         return x >> 63;
1382     } else {
1383         return 0;
1384     }
1385 }
1386 
1387 static inline int64_t do_srshr(int64_t x, unsigned sh)
1388 {
1389     if (likely(sh < 64)) {
1390         return (x >> sh) + ((x >> (sh - 1)) & 1);
1391     } else {
1392         /* Rounding the sign bit always produces 0. */
1393         return 0;
1394     }
1395 }
1396 
1397 DO_VSHRN_ALL(vshrn, DO_SHR)
1398 DO_VSHRN_ALL(vrshrn, do_urshr)
1399 
1400 static inline int32_t do_sat_bhs(int64_t val, int64_t min, int64_t max,
1401                                  bool *satp)
1402 {
1403     if (val > max) {
1404         *satp = true;
1405         return max;
1406     } else if (val < min) {
1407         *satp = true;
1408         return min;
1409     } else {
1410         return val;
1411     }
1412 }
1413 
1414 /* Saturating narrowing right shifts */
1415 #define DO_VSHRN_SAT(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN)   \
1416     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,     \
1417                                 void *vm, uint32_t shift)       \
1418     {                                                           \
1419         LTYPE *m = vm;                                          \
1420         TYPE *d = vd;                                           \
1421         uint16_t mask = mve_element_mask(env);                  \
1422         bool qc = false;                                        \
1423         unsigned le;                                            \
1424         mask >>= ESIZE * TOP;                                   \
1425         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) { \
1426             bool sat = false;                                   \
1427             TYPE r = FN(m[H##LESIZE(le)], shift, &sat);         \
1428             mergemask(&d[H##ESIZE(le * 2 + TOP)], r, mask);     \
1429             qc |= sat & mask & 1;                               \
1430         }                                                       \
1431         if (qc) {                                               \
1432             env->vfp.qc[0] = qc;                                \
1433         }                                                       \
1434         mve_advance_vpt(env);                                   \
1435     }
1436 
1437 #define DO_VSHRN_SAT_UB(BOP, TOP, FN)                           \
1438     DO_VSHRN_SAT(BOP, false, 1, uint8_t, 2, uint16_t, FN)       \
1439     DO_VSHRN_SAT(TOP, true, 1, uint8_t, 2, uint16_t, FN)
1440 
1441 #define DO_VSHRN_SAT_UH(BOP, TOP, FN)                           \
1442     DO_VSHRN_SAT(BOP, false, 2, uint16_t, 4, uint32_t, FN)      \
1443     DO_VSHRN_SAT(TOP, true, 2, uint16_t, 4, uint32_t, FN)
1444 
1445 #define DO_VSHRN_SAT_SB(BOP, TOP, FN)                           \
1446     DO_VSHRN_SAT(BOP, false, 1, int8_t, 2, int16_t, FN)         \
1447     DO_VSHRN_SAT(TOP, true, 1, int8_t, 2, int16_t, FN)
1448 
1449 #define DO_VSHRN_SAT_SH(BOP, TOP, FN)                           \
1450     DO_VSHRN_SAT(BOP, false, 2, int16_t, 4, int32_t, FN)        \
1451     DO_VSHRN_SAT(TOP, true, 2, int16_t, 4, int32_t, FN)
1452 
1453 #define DO_SHRN_SB(N, M, SATP)                                  \
1454     do_sat_bhs((int64_t)(N) >> (M), INT8_MIN, INT8_MAX, SATP)
1455 #define DO_SHRN_UB(N, M, SATP)                                  \
1456     do_sat_bhs((uint64_t)(N) >> (M), 0, UINT8_MAX, SATP)
1457 #define DO_SHRUN_B(N, M, SATP)                                  \
1458     do_sat_bhs((int64_t)(N) >> (M), 0, UINT8_MAX, SATP)
1459 
1460 #define DO_SHRN_SH(N, M, SATP)                                  \
1461     do_sat_bhs((int64_t)(N) >> (M), INT16_MIN, INT16_MAX, SATP)
1462 #define DO_SHRN_UH(N, M, SATP)                                  \
1463     do_sat_bhs((uint64_t)(N) >> (M), 0, UINT16_MAX, SATP)
1464 #define DO_SHRUN_H(N, M, SATP)                                  \
1465     do_sat_bhs((int64_t)(N) >> (M), 0, UINT16_MAX, SATP)
1466 
1467 #define DO_RSHRN_SB(N, M, SATP)                                 \
1468     do_sat_bhs(do_srshr(N, M), INT8_MIN, INT8_MAX, SATP)
1469 #define DO_RSHRN_UB(N, M, SATP)                                 \
1470     do_sat_bhs(do_urshr(N, M), 0, UINT8_MAX, SATP)
1471 #define DO_RSHRUN_B(N, M, SATP)                                 \
1472     do_sat_bhs(do_srshr(N, M), 0, UINT8_MAX, SATP)
1473 
1474 #define DO_RSHRN_SH(N, M, SATP)                                 \
1475     do_sat_bhs(do_srshr(N, M), INT16_MIN, INT16_MAX, SATP)
1476 #define DO_RSHRN_UH(N, M, SATP)                                 \
1477     do_sat_bhs(do_urshr(N, M), 0, UINT16_MAX, SATP)
1478 #define DO_RSHRUN_H(N, M, SATP)                                 \
1479     do_sat_bhs(do_srshr(N, M), 0, UINT16_MAX, SATP)
1480 
1481 DO_VSHRN_SAT_SB(vqshrnb_sb, vqshrnt_sb, DO_SHRN_SB)
1482 DO_VSHRN_SAT_SH(vqshrnb_sh, vqshrnt_sh, DO_SHRN_SH)
1483 DO_VSHRN_SAT_UB(vqshrnb_ub, vqshrnt_ub, DO_SHRN_UB)
1484 DO_VSHRN_SAT_UH(vqshrnb_uh, vqshrnt_uh, DO_SHRN_UH)
1485 DO_VSHRN_SAT_SB(vqshrunbb, vqshruntb, DO_SHRUN_B)
1486 DO_VSHRN_SAT_SH(vqshrunbh, vqshrunth, DO_SHRUN_H)
1487 
1488 DO_VSHRN_SAT_SB(vqrshrnb_sb, vqrshrnt_sb, DO_RSHRN_SB)
1489 DO_VSHRN_SAT_SH(vqrshrnb_sh, vqrshrnt_sh, DO_RSHRN_SH)
1490 DO_VSHRN_SAT_UB(vqrshrnb_ub, vqrshrnt_ub, DO_RSHRN_UB)
1491 DO_VSHRN_SAT_UH(vqrshrnb_uh, vqrshrnt_uh, DO_RSHRN_UH)
1492 DO_VSHRN_SAT_SB(vqrshrunbb, vqrshruntb, DO_RSHRUN_B)
1493 DO_VSHRN_SAT_SH(vqrshrunbh, vqrshrunth, DO_RSHRUN_H)
1494 
1495 uint32_t HELPER(mve_vshlc)(CPUARMState *env, void *vd, uint32_t rdm,
1496                            uint32_t shift)
1497 {
1498     uint32_t *d = vd;
1499     uint16_t mask = mve_element_mask(env);
1500     unsigned e;
1501     uint32_t r;
1502 
1503     /*
1504      * For each 32-bit element, we shift it left, bringing in the
1505      * low 'shift' bits of rdm at the bottom. Bits shifted out at
1506      * the top become the new rdm, if the predicate mask permits.
1507      * The final rdm value is returned to update the register.
1508      * shift == 0 here means "shift by 32 bits".
1509      */
1510     if (shift == 0) {
1511         for (e = 0; e < 16 / 4; e++, mask >>= 4) {
1512             r = rdm;
1513             if (mask & 1) {
1514                 rdm = d[H4(e)];
1515             }
1516             mergemask(&d[H4(e)], r, mask);
1517         }
1518     } else {
1519         uint32_t shiftmask = MAKE_64BIT_MASK(0, shift);
1520 
1521         for (e = 0; e < 16 / 4; e++, mask >>= 4) {
1522             r = (d[H4(e)] << shift) | (rdm & shiftmask);
1523             if (mask & 1) {
1524                 rdm = d[H4(e)] >> (32 - shift);
1525             }
1526             mergemask(&d[H4(e)], r, mask);
1527         }
1528     }
1529     mve_advance_vpt(env);
1530     return rdm;
1531 }
1532 
1533 uint64_t HELPER(mve_sshrl)(CPUARMState *env, uint64_t n, uint32_t shift)
1534 {
1535     return do_sqrshl_d(n, -(int8_t)shift, false, NULL);
1536 }
1537 
1538 uint64_t HELPER(mve_ushll)(CPUARMState *env, uint64_t n, uint32_t shift)
1539 {
1540     return do_uqrshl_d(n, (int8_t)shift, false, NULL);
1541 }
1542 
1543 uint64_t HELPER(mve_sqshll)(CPUARMState *env, uint64_t n, uint32_t shift)
1544 {
1545     return do_sqrshl_d(n, (int8_t)shift, false, &env->QF);
1546 }
1547 
1548 uint64_t HELPER(mve_uqshll)(CPUARMState *env, uint64_t n, uint32_t shift)
1549 {
1550     return do_uqrshl_d(n, (int8_t)shift, false, &env->QF);
1551 }
1552 
1553 uint64_t HELPER(mve_sqrshrl)(CPUARMState *env, uint64_t n, uint32_t shift)
1554 {
1555     return do_sqrshl_d(n, -(int8_t)shift, true, &env->QF);
1556 }
1557 
1558 uint64_t HELPER(mve_uqrshll)(CPUARMState *env, uint64_t n, uint32_t shift)
1559 {
1560     return do_uqrshl_d(n, (int8_t)shift, true, &env->QF);
1561 }
1562 
1563 /* Operate on 64-bit values, but saturate at 48 bits */
1564 static inline int64_t do_sqrshl48_d(int64_t src, int64_t shift,
1565                                     bool round, uint32_t *sat)
1566 {
1567     int64_t val, extval;
1568 
1569     if (shift <= -48) {
1570         /* Rounding the sign bit always produces 0. */
1571         if (round) {
1572             return 0;
1573         }
1574         return src >> 63;
1575     } else if (shift < 0) {
1576         if (round) {
1577             src >>= -shift - 1;
1578             val = (src >> 1) + (src & 1);
1579         } else {
1580             val = src >> -shift;
1581         }
1582         extval = sextract64(val, 0, 48);
1583         if (!sat || val == extval) {
1584             return extval;
1585         }
1586     } else if (shift < 48) {
1587         int64_t extval = sextract64(src << shift, 0, 48);
1588         if (!sat || src == (extval >> shift)) {
1589             return extval;
1590         }
1591     } else if (!sat || src == 0) {
1592         return 0;
1593     }
1594 
1595     *sat = 1;
1596     return src >= 0 ? MAKE_64BIT_MASK(0, 47) : MAKE_64BIT_MASK(47, 17);
1597 }
1598 
1599 /* Operate on 64-bit values, but saturate at 48 bits */
1600 static inline uint64_t do_uqrshl48_d(uint64_t src, int64_t shift,
1601                                      bool round, uint32_t *sat)
1602 {
1603     uint64_t val, extval;
1604 
1605     if (shift <= -(48 + round)) {
1606         return 0;
1607     } else if (shift < 0) {
1608         if (round) {
1609             val = src >> (-shift - 1);
1610             val = (val >> 1) + (val & 1);
1611         } else {
1612             val = src >> -shift;
1613         }
1614         extval = extract64(val, 0, 48);
1615         if (!sat || val == extval) {
1616             return extval;
1617         }
1618     } else if (shift < 48) {
1619         uint64_t extval = extract64(src << shift, 0, 48);
1620         if (!sat || src == (extval >> shift)) {
1621             return extval;
1622         }
1623     } else if (!sat || src == 0) {
1624         return 0;
1625     }
1626 
1627     *sat = 1;
1628     return MAKE_64BIT_MASK(0, 48);
1629 }
1630 
1631 uint64_t HELPER(mve_sqrshrl48)(CPUARMState *env, uint64_t n, uint32_t shift)
1632 {
1633     return do_sqrshl48_d(n, -(int8_t)shift, true, &env->QF);
1634 }
1635 
1636 uint64_t HELPER(mve_uqrshll48)(CPUARMState *env, uint64_t n, uint32_t shift)
1637 {
1638     return do_uqrshl48_d(n, (int8_t)shift, true, &env->QF);
1639 }
1640 
1641 uint32_t HELPER(mve_uqshl)(CPUARMState *env, uint32_t n, uint32_t shift)
1642 {
1643     return do_uqrshl_bhs(n, (int8_t)shift, 32, false, &env->QF);
1644 }
1645 
1646 uint32_t HELPER(mve_sqshl)(CPUARMState *env, uint32_t n, uint32_t shift)
1647 {
1648     return do_sqrshl_bhs(n, (int8_t)shift, 32, false, &env->QF);
1649 }
1650 
1651 uint32_t HELPER(mve_uqrshl)(CPUARMState *env, uint32_t n, uint32_t shift)
1652 {
1653     return do_uqrshl_bhs(n, (int8_t)shift, 32, true, &env->QF);
1654 }
1655 
1656 uint32_t HELPER(mve_sqrshr)(CPUARMState *env, uint32_t n, uint32_t shift)
1657 {
1658     return do_sqrshl_bhs(n, -(int8_t)shift, 32, true, &env->QF);
1659 }
1660