1 /* 2 * M-profile MVE Operations 3 * 4 * Copyright (c) 2021 Linaro, Ltd. 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/int128.h" 22 #include "cpu.h" 23 #include "internals.h" 24 #include "vec_internal.h" 25 #include "exec/helper-proto.h" 26 #include "exec/cpu_ldst.h" 27 #include "exec/exec-all.h" 28 #include "tcg/tcg.h" 29 30 static uint16_t mve_element_mask(CPUARMState *env) 31 { 32 /* 33 * Return the mask of which elements in the MVE vector should be 34 * updated. This is a combination of multiple things: 35 * (1) by default, we update every lane in the vector 36 * (2) VPT predication stores its state in the VPR register; 37 * (3) low-overhead-branch tail predication will mask out part 38 * the vector on the final iteration of the loop 39 * (4) if EPSR.ECI is set then we must execute only some beats 40 * of the insn 41 * We combine all these into a 16-bit result with the same semantics 42 * as VPR.P0: 0 to mask the lane, 1 if it is active. 43 * 8-bit vector ops will look at all bits of the result; 44 * 16-bit ops will look at bits 0, 2, 4, ...; 45 * 32-bit ops will look at bits 0, 4, 8 and 12. 46 * Compare pseudocode GetCurInstrBeat(), though that only returns 47 * the 4-bit slice of the mask corresponding to a single beat. 48 */ 49 uint16_t mask = FIELD_EX32(env->v7m.vpr, V7M_VPR, P0); 50 51 if (!(env->v7m.vpr & R_V7M_VPR_MASK01_MASK)) { 52 mask |= 0xff; 53 } 54 if (!(env->v7m.vpr & R_V7M_VPR_MASK23_MASK)) { 55 mask |= 0xff00; 56 } 57 58 if (env->v7m.ltpsize < 4 && 59 env->regs[14] <= (1 << (4 - env->v7m.ltpsize))) { 60 /* 61 * Tail predication active, and this is the last loop iteration. 62 * The element size is (1 << ltpsize), and we only want to process 63 * loopcount elements, so we want to retain the least significant 64 * (loopcount * esize) predicate bits and zero out bits above that. 65 */ 66 int masklen = env->regs[14] << env->v7m.ltpsize; 67 assert(masklen <= 16); 68 mask &= MAKE_64BIT_MASK(0, masklen); 69 } 70 71 if ((env->condexec_bits & 0xf) == 0) { 72 /* 73 * ECI bits indicate which beats are already executed; 74 * we handle this by effectively predicating them out. 75 */ 76 int eci = env->condexec_bits >> 4; 77 switch (eci) { 78 case ECI_NONE: 79 break; 80 case ECI_A0: 81 mask &= 0xfff0; 82 break; 83 case ECI_A0A1: 84 mask &= 0xff00; 85 break; 86 case ECI_A0A1A2: 87 case ECI_A0A1A2B0: 88 mask &= 0xf000; 89 break; 90 default: 91 g_assert_not_reached(); 92 } 93 } 94 95 return mask; 96 } 97 98 static void mve_advance_vpt(CPUARMState *env) 99 { 100 /* Advance the VPT and ECI state if necessary */ 101 uint32_t vpr = env->v7m.vpr; 102 unsigned mask01, mask23; 103 104 if ((env->condexec_bits & 0xf) == 0) { 105 env->condexec_bits = (env->condexec_bits == (ECI_A0A1A2B0 << 4)) ? 106 (ECI_A0 << 4) : (ECI_NONE << 4); 107 } 108 109 if (!(vpr & (R_V7M_VPR_MASK01_MASK | R_V7M_VPR_MASK23_MASK))) { 110 /* VPT not enabled, nothing to do */ 111 return; 112 } 113 114 mask01 = FIELD_EX32(vpr, V7M_VPR, MASK01); 115 mask23 = FIELD_EX32(vpr, V7M_VPR, MASK23); 116 if (mask01 > 8) { 117 /* high bit set, but not 0b1000: invert the relevant half of P0 */ 118 vpr ^= 0xff; 119 } 120 if (mask23 > 8) { 121 /* high bit set, but not 0b1000: invert the relevant half of P0 */ 122 vpr ^= 0xff00; 123 } 124 vpr = FIELD_DP32(vpr, V7M_VPR, MASK01, mask01 << 1); 125 vpr = FIELD_DP32(vpr, V7M_VPR, MASK23, mask23 << 1); 126 env->v7m.vpr = vpr; 127 } 128 129 130 #define DO_VLDR(OP, MSIZE, LDTYPE, ESIZE, TYPE) \ 131 void HELPER(mve_##OP)(CPUARMState *env, void *vd, uint32_t addr) \ 132 { \ 133 TYPE *d = vd; \ 134 uint16_t mask = mve_element_mask(env); \ 135 unsigned b, e; \ 136 /* \ 137 * R_SXTM allows the dest reg to become UNKNOWN for abandoned \ 138 * beats so we don't care if we update part of the dest and \ 139 * then take an exception. \ 140 */ \ 141 for (b = 0, e = 0; b < 16; b += ESIZE, e++) { \ 142 if (mask & (1 << b)) { \ 143 d[H##ESIZE(e)] = cpu_##LDTYPE##_data_ra(env, addr, GETPC()); \ 144 } \ 145 addr += MSIZE; \ 146 } \ 147 mve_advance_vpt(env); \ 148 } 149 150 #define DO_VSTR(OP, MSIZE, STTYPE, ESIZE, TYPE) \ 151 void HELPER(mve_##OP)(CPUARMState *env, void *vd, uint32_t addr) \ 152 { \ 153 TYPE *d = vd; \ 154 uint16_t mask = mve_element_mask(env); \ 155 unsigned b, e; \ 156 for (b = 0, e = 0; b < 16; b += ESIZE, e++) { \ 157 if (mask & (1 << b)) { \ 158 cpu_##STTYPE##_data_ra(env, addr, d[H##ESIZE(e)], GETPC()); \ 159 } \ 160 addr += MSIZE; \ 161 } \ 162 mve_advance_vpt(env); \ 163 } 164 165 DO_VLDR(vldrb, 1, ldub, 1, uint8_t) 166 DO_VLDR(vldrh, 2, lduw, 2, uint16_t) 167 DO_VLDR(vldrw, 4, ldl, 4, uint32_t) 168 169 DO_VSTR(vstrb, 1, stb, 1, uint8_t) 170 DO_VSTR(vstrh, 2, stw, 2, uint16_t) 171 DO_VSTR(vstrw, 4, stl, 4, uint32_t) 172 173 DO_VLDR(vldrb_sh, 1, ldsb, 2, int16_t) 174 DO_VLDR(vldrb_sw, 1, ldsb, 4, int32_t) 175 DO_VLDR(vldrb_uh, 1, ldub, 2, uint16_t) 176 DO_VLDR(vldrb_uw, 1, ldub, 4, uint32_t) 177 DO_VLDR(vldrh_sw, 2, ldsw, 4, int32_t) 178 DO_VLDR(vldrh_uw, 2, lduw, 4, uint32_t) 179 180 DO_VSTR(vstrb_h, 1, stb, 2, int16_t) 181 DO_VSTR(vstrb_w, 1, stb, 4, int32_t) 182 DO_VSTR(vstrh_w, 2, stw, 4, int32_t) 183 184 #undef DO_VLDR 185 #undef DO_VSTR 186 187 /* 188 * The mergemask(D, R, M) macro performs the operation "*D = R" but 189 * storing only the bytes which correspond to 1 bits in M, 190 * leaving other bytes in *D unchanged. We use _Generic 191 * to select the correct implementation based on the type of D. 192 */ 193 194 static void mergemask_ub(uint8_t *d, uint8_t r, uint16_t mask) 195 { 196 if (mask & 1) { 197 *d = r; 198 } 199 } 200 201 static void mergemask_sb(int8_t *d, int8_t r, uint16_t mask) 202 { 203 mergemask_ub((uint8_t *)d, r, mask); 204 } 205 206 static void mergemask_uh(uint16_t *d, uint16_t r, uint16_t mask) 207 { 208 uint16_t bmask = expand_pred_b_data[mask & 3]; 209 *d = (*d & ~bmask) | (r & bmask); 210 } 211 212 static void mergemask_sh(int16_t *d, int16_t r, uint16_t mask) 213 { 214 mergemask_uh((uint16_t *)d, r, mask); 215 } 216 217 static void mergemask_uw(uint32_t *d, uint32_t r, uint16_t mask) 218 { 219 uint32_t bmask = expand_pred_b_data[mask & 0xf]; 220 *d = (*d & ~bmask) | (r & bmask); 221 } 222 223 static void mergemask_sw(int32_t *d, int32_t r, uint16_t mask) 224 { 225 mergemask_uw((uint32_t *)d, r, mask); 226 } 227 228 static void mergemask_uq(uint64_t *d, uint64_t r, uint16_t mask) 229 { 230 uint64_t bmask = expand_pred_b_data[mask & 0xff]; 231 *d = (*d & ~bmask) | (r & bmask); 232 } 233 234 static void mergemask_sq(int64_t *d, int64_t r, uint16_t mask) 235 { 236 mergemask_uq((uint64_t *)d, r, mask); 237 } 238 239 #define mergemask(D, R, M) \ 240 _Generic(D, \ 241 uint8_t *: mergemask_ub, \ 242 int8_t *: mergemask_sb, \ 243 uint16_t *: mergemask_uh, \ 244 int16_t *: mergemask_sh, \ 245 uint32_t *: mergemask_uw, \ 246 int32_t *: mergemask_sw, \ 247 uint64_t *: mergemask_uq, \ 248 int64_t *: mergemask_sq)(D, R, M) 249 250 void HELPER(mve_vdup)(CPUARMState *env, void *vd, uint32_t val) 251 { 252 /* 253 * The generated code already replicated an 8 or 16 bit constant 254 * into the 32-bit value, so we only need to write the 32-bit 255 * value to all elements of the Qreg, allowing for predication. 256 */ 257 uint32_t *d = vd; 258 uint16_t mask = mve_element_mask(env); 259 unsigned e; 260 for (e = 0; e < 16 / 4; e++, mask >>= 4) { 261 mergemask(&d[H4(e)], val, mask); 262 } 263 mve_advance_vpt(env); 264 } 265 266 #define DO_1OP(OP, ESIZE, TYPE, FN) \ 267 void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm) \ 268 { \ 269 TYPE *d = vd, *m = vm; \ 270 uint16_t mask = mve_element_mask(env); \ 271 unsigned e; \ 272 for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \ 273 mergemask(&d[H##ESIZE(e)], FN(m[H##ESIZE(e)]), mask); \ 274 } \ 275 mve_advance_vpt(env); \ 276 } 277 278 #define DO_CLS_B(N) (clrsb32(N) - 24) 279 #define DO_CLS_H(N) (clrsb32(N) - 16) 280 281 DO_1OP(vclsb, 1, int8_t, DO_CLS_B) 282 DO_1OP(vclsh, 2, int16_t, DO_CLS_H) 283 DO_1OP(vclsw, 4, int32_t, clrsb32) 284 285 #define DO_CLZ_B(N) (clz32(N) - 24) 286 #define DO_CLZ_H(N) (clz32(N) - 16) 287 288 DO_1OP(vclzb, 1, uint8_t, DO_CLZ_B) 289 DO_1OP(vclzh, 2, uint16_t, DO_CLZ_H) 290 DO_1OP(vclzw, 4, uint32_t, clz32) 291 292 DO_1OP(vrev16b, 2, uint16_t, bswap16) 293 DO_1OP(vrev32b, 4, uint32_t, bswap32) 294 DO_1OP(vrev32h, 4, uint32_t, hswap32) 295 DO_1OP(vrev64b, 8, uint64_t, bswap64) 296 DO_1OP(vrev64h, 8, uint64_t, hswap64) 297 DO_1OP(vrev64w, 8, uint64_t, wswap64) 298 299 #define DO_NOT(N) (~(N)) 300 301 DO_1OP(vmvn, 8, uint64_t, DO_NOT) 302 303 #define DO_ABS(N) ((N) < 0 ? -(N) : (N)) 304 #define DO_FABSH(N) ((N) & dup_const(MO_16, 0x7fff)) 305 #define DO_FABSS(N) ((N) & dup_const(MO_32, 0x7fffffff)) 306 307 DO_1OP(vabsb, 1, int8_t, DO_ABS) 308 DO_1OP(vabsh, 2, int16_t, DO_ABS) 309 DO_1OP(vabsw, 4, int32_t, DO_ABS) 310 311 /* We can do these 64 bits at a time */ 312 DO_1OP(vfabsh, 8, uint64_t, DO_FABSH) 313 DO_1OP(vfabss, 8, uint64_t, DO_FABSS) 314 315 #define DO_NEG(N) (-(N)) 316 #define DO_FNEGH(N) ((N) ^ dup_const(MO_16, 0x8000)) 317 #define DO_FNEGS(N) ((N) ^ dup_const(MO_32, 0x80000000)) 318 319 DO_1OP(vnegb, 1, int8_t, DO_NEG) 320 DO_1OP(vnegh, 2, int16_t, DO_NEG) 321 DO_1OP(vnegw, 4, int32_t, DO_NEG) 322 323 /* We can do these 64 bits at a time */ 324 DO_1OP(vfnegh, 8, uint64_t, DO_FNEGH) 325 DO_1OP(vfnegs, 8, uint64_t, DO_FNEGS) 326 327 #define DO_2OP(OP, ESIZE, TYPE, FN) \ 328 void HELPER(glue(mve_, OP))(CPUARMState *env, \ 329 void *vd, void *vn, void *vm) \ 330 { \ 331 TYPE *d = vd, *n = vn, *m = vm; \ 332 uint16_t mask = mve_element_mask(env); \ 333 unsigned e; \ 334 for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \ 335 mergemask(&d[H##ESIZE(e)], \ 336 FN(n[H##ESIZE(e)], m[H##ESIZE(e)]), mask); \ 337 } \ 338 mve_advance_vpt(env); \ 339 } 340 341 /* provide unsigned 2-op helpers for all sizes */ 342 #define DO_2OP_U(OP, FN) \ 343 DO_2OP(OP##b, 1, uint8_t, FN) \ 344 DO_2OP(OP##h, 2, uint16_t, FN) \ 345 DO_2OP(OP##w, 4, uint32_t, FN) 346 347 /* provide signed 2-op helpers for all sizes */ 348 #define DO_2OP_S(OP, FN) \ 349 DO_2OP(OP##b, 1, int8_t, FN) \ 350 DO_2OP(OP##h, 2, int16_t, FN) \ 351 DO_2OP(OP##w, 4, int32_t, FN) 352 353 /* 354 * "Long" operations where two half-sized inputs (taken from either the 355 * top or the bottom of the input vector) produce a double-width result. 356 * Here ESIZE, TYPE are for the input, and LESIZE, LTYPE for the output. 357 */ 358 #define DO_2OP_L(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN) \ 359 void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \ 360 { \ 361 LTYPE *d = vd; \ 362 TYPE *n = vn, *m = vm; \ 363 uint16_t mask = mve_element_mask(env); \ 364 unsigned le; \ 365 for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) { \ 366 LTYPE r = FN((LTYPE)n[H##ESIZE(le * 2 + TOP)], \ 367 m[H##ESIZE(le * 2 + TOP)]); \ 368 mergemask(&d[H##LESIZE(le)], r, mask); \ 369 } \ 370 mve_advance_vpt(env); \ 371 } 372 373 #define DO_AND(N, M) ((N) & (M)) 374 #define DO_BIC(N, M) ((N) & ~(M)) 375 #define DO_ORR(N, M) ((N) | (M)) 376 #define DO_ORN(N, M) ((N) | ~(M)) 377 #define DO_EOR(N, M) ((N) ^ (M)) 378 379 DO_2OP(vand, 8, uint64_t, DO_AND) 380 DO_2OP(vbic, 8, uint64_t, DO_BIC) 381 DO_2OP(vorr, 8, uint64_t, DO_ORR) 382 DO_2OP(vorn, 8, uint64_t, DO_ORN) 383 DO_2OP(veor, 8, uint64_t, DO_EOR) 384 385 #define DO_ADD(N, M) ((N) + (M)) 386 #define DO_SUB(N, M) ((N) - (M)) 387 #define DO_MUL(N, M) ((N) * (M)) 388 389 DO_2OP_U(vadd, DO_ADD) 390 DO_2OP_U(vsub, DO_SUB) 391 DO_2OP_U(vmul, DO_MUL) 392 393 DO_2OP_L(vmullbsb, 0, 1, int8_t, 2, int16_t, DO_MUL) 394 DO_2OP_L(vmullbsh, 0, 2, int16_t, 4, int32_t, DO_MUL) 395 DO_2OP_L(vmullbsw, 0, 4, int32_t, 8, int64_t, DO_MUL) 396 DO_2OP_L(vmullbub, 0, 1, uint8_t, 2, uint16_t, DO_MUL) 397 DO_2OP_L(vmullbuh, 0, 2, uint16_t, 4, uint32_t, DO_MUL) 398 DO_2OP_L(vmullbuw, 0, 4, uint32_t, 8, uint64_t, DO_MUL) 399 400 DO_2OP_L(vmulltsb, 1, 1, int8_t, 2, int16_t, DO_MUL) 401 DO_2OP_L(vmulltsh, 1, 2, int16_t, 4, int32_t, DO_MUL) 402 DO_2OP_L(vmulltsw, 1, 4, int32_t, 8, int64_t, DO_MUL) 403 DO_2OP_L(vmulltub, 1, 1, uint8_t, 2, uint16_t, DO_MUL) 404 DO_2OP_L(vmulltuh, 1, 2, uint16_t, 4, uint32_t, DO_MUL) 405 DO_2OP_L(vmulltuw, 1, 4, uint32_t, 8, uint64_t, DO_MUL) 406 407 /* 408 * Because the computation type is at least twice as large as required, 409 * these work for both signed and unsigned source types. 410 */ 411 static inline uint8_t do_mulh_b(int32_t n, int32_t m) 412 { 413 return (n * m) >> 8; 414 } 415 416 static inline uint16_t do_mulh_h(int32_t n, int32_t m) 417 { 418 return (n * m) >> 16; 419 } 420 421 static inline uint32_t do_mulh_w(int64_t n, int64_t m) 422 { 423 return (n * m) >> 32; 424 } 425 426 static inline uint8_t do_rmulh_b(int32_t n, int32_t m) 427 { 428 return (n * m + (1U << 7)) >> 8; 429 } 430 431 static inline uint16_t do_rmulh_h(int32_t n, int32_t m) 432 { 433 return (n * m + (1U << 15)) >> 16; 434 } 435 436 static inline uint32_t do_rmulh_w(int64_t n, int64_t m) 437 { 438 return (n * m + (1U << 31)) >> 32; 439 } 440 441 DO_2OP(vmulhsb, 1, int8_t, do_mulh_b) 442 DO_2OP(vmulhsh, 2, int16_t, do_mulh_h) 443 DO_2OP(vmulhsw, 4, int32_t, do_mulh_w) 444 DO_2OP(vmulhub, 1, uint8_t, do_mulh_b) 445 DO_2OP(vmulhuh, 2, uint16_t, do_mulh_h) 446 DO_2OP(vmulhuw, 4, uint32_t, do_mulh_w) 447 448 DO_2OP(vrmulhsb, 1, int8_t, do_rmulh_b) 449 DO_2OP(vrmulhsh, 2, int16_t, do_rmulh_h) 450 DO_2OP(vrmulhsw, 4, int32_t, do_rmulh_w) 451 DO_2OP(vrmulhub, 1, uint8_t, do_rmulh_b) 452 DO_2OP(vrmulhuh, 2, uint16_t, do_rmulh_h) 453 DO_2OP(vrmulhuw, 4, uint32_t, do_rmulh_w) 454 455 #define DO_MAX(N, M) ((N) >= (M) ? (N) : (M)) 456 #define DO_MIN(N, M) ((N) >= (M) ? (M) : (N)) 457 458 DO_2OP_S(vmaxs, DO_MAX) 459 DO_2OP_U(vmaxu, DO_MAX) 460 DO_2OP_S(vmins, DO_MIN) 461 DO_2OP_U(vminu, DO_MIN) 462 463 #define DO_ABD(N, M) ((N) >= (M) ? (N) - (M) : (M) - (N)) 464 465 DO_2OP_S(vabds, DO_ABD) 466 DO_2OP_U(vabdu, DO_ABD) 467 468 static inline uint32_t do_vhadd_u(uint32_t n, uint32_t m) 469 { 470 return ((uint64_t)n + m) >> 1; 471 } 472 473 static inline int32_t do_vhadd_s(int32_t n, int32_t m) 474 { 475 return ((int64_t)n + m) >> 1; 476 } 477 478 static inline uint32_t do_vhsub_u(uint32_t n, uint32_t m) 479 { 480 return ((uint64_t)n - m) >> 1; 481 } 482 483 static inline int32_t do_vhsub_s(int32_t n, int32_t m) 484 { 485 return ((int64_t)n - m) >> 1; 486 } 487 488 DO_2OP_S(vhadds, do_vhadd_s) 489 DO_2OP_U(vhaddu, do_vhadd_u) 490 DO_2OP_S(vhsubs, do_vhsub_s) 491 DO_2OP_U(vhsubu, do_vhsub_u) 492 493 static inline int32_t do_sat_bhw(int64_t val, int64_t min, int64_t max, bool *s) 494 { 495 if (val > max) { 496 *s = true; 497 return max; 498 } else if (val < min) { 499 *s = true; 500 return min; 501 } 502 return val; 503 } 504 505 #define DO_SQADD_B(n, m, s) do_sat_bhw((int64_t)n + m, INT8_MIN, INT8_MAX, s) 506 #define DO_SQADD_H(n, m, s) do_sat_bhw((int64_t)n + m, INT16_MIN, INT16_MAX, s) 507 #define DO_SQADD_W(n, m, s) do_sat_bhw((int64_t)n + m, INT32_MIN, INT32_MAX, s) 508 509 #define DO_UQADD_B(n, m, s) do_sat_bhw((int64_t)n + m, 0, UINT8_MAX, s) 510 #define DO_UQADD_H(n, m, s) do_sat_bhw((int64_t)n + m, 0, UINT16_MAX, s) 511 #define DO_UQADD_W(n, m, s) do_sat_bhw((int64_t)n + m, 0, UINT32_MAX, s) 512 513 #define DO_SQSUB_B(n, m, s) do_sat_bhw((int64_t)n - m, INT8_MIN, INT8_MAX, s) 514 #define DO_SQSUB_H(n, m, s) do_sat_bhw((int64_t)n - m, INT16_MIN, INT16_MAX, s) 515 #define DO_SQSUB_W(n, m, s) do_sat_bhw((int64_t)n - m, INT32_MIN, INT32_MAX, s) 516 517 #define DO_UQSUB_B(n, m, s) do_sat_bhw((int64_t)n - m, 0, UINT8_MAX, s) 518 #define DO_UQSUB_H(n, m, s) do_sat_bhw((int64_t)n - m, 0, UINT16_MAX, s) 519 #define DO_UQSUB_W(n, m, s) do_sat_bhw((int64_t)n - m, 0, UINT32_MAX, s) 520 521 #define DO_2OP_SCALAR(OP, ESIZE, TYPE, FN) \ 522 void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, \ 523 uint32_t rm) \ 524 { \ 525 TYPE *d = vd, *n = vn; \ 526 TYPE m = rm; \ 527 uint16_t mask = mve_element_mask(env); \ 528 unsigned e; \ 529 for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \ 530 mergemask(&d[H##ESIZE(e)], FN(n[H##ESIZE(e)], m), mask); \ 531 } \ 532 mve_advance_vpt(env); \ 533 } 534 535 #define DO_2OP_SAT_SCALAR(OP, ESIZE, TYPE, FN) \ 536 void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, \ 537 uint32_t rm) \ 538 { \ 539 TYPE *d = vd, *n = vn; \ 540 TYPE m = rm; \ 541 uint16_t mask = mve_element_mask(env); \ 542 unsigned e; \ 543 bool qc = false; \ 544 for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \ 545 bool sat = false; \ 546 mergemask(&d[H##ESIZE(e)], FN(n[H##ESIZE(e)], m, &sat), \ 547 mask); \ 548 qc |= sat & mask & 1; \ 549 } \ 550 if (qc) { \ 551 env->vfp.qc[0] = qc; \ 552 } \ 553 mve_advance_vpt(env); \ 554 } 555 556 /* provide unsigned 2-op scalar helpers for all sizes */ 557 #define DO_2OP_SCALAR_U(OP, FN) \ 558 DO_2OP_SCALAR(OP##b, 1, uint8_t, FN) \ 559 DO_2OP_SCALAR(OP##h, 2, uint16_t, FN) \ 560 DO_2OP_SCALAR(OP##w, 4, uint32_t, FN) 561 #define DO_2OP_SCALAR_S(OP, FN) \ 562 DO_2OP_SCALAR(OP##b, 1, int8_t, FN) \ 563 DO_2OP_SCALAR(OP##h, 2, int16_t, FN) \ 564 DO_2OP_SCALAR(OP##w, 4, int32_t, FN) 565 566 DO_2OP_SCALAR_U(vadd_scalar, DO_ADD) 567 DO_2OP_SCALAR_U(vsub_scalar, DO_SUB) 568 DO_2OP_SCALAR_U(vmul_scalar, DO_MUL) 569 DO_2OP_SCALAR_S(vhadds_scalar, do_vhadd_s) 570 DO_2OP_SCALAR_U(vhaddu_scalar, do_vhadd_u) 571 DO_2OP_SCALAR_S(vhsubs_scalar, do_vhsub_s) 572 DO_2OP_SCALAR_U(vhsubu_scalar, do_vhsub_u) 573 574 DO_2OP_SAT_SCALAR(vqaddu_scalarb, 1, uint8_t, DO_UQADD_B) 575 DO_2OP_SAT_SCALAR(vqaddu_scalarh, 2, uint16_t, DO_UQADD_H) 576 DO_2OP_SAT_SCALAR(vqaddu_scalarw, 4, uint32_t, DO_UQADD_W) 577 DO_2OP_SAT_SCALAR(vqadds_scalarb, 1, int8_t, DO_SQADD_B) 578 DO_2OP_SAT_SCALAR(vqadds_scalarh, 2, int16_t, DO_SQADD_H) 579 DO_2OP_SAT_SCALAR(vqadds_scalarw, 4, int32_t, DO_SQADD_W) 580 581 DO_2OP_SAT_SCALAR(vqsubu_scalarb, 1, uint8_t, DO_UQSUB_B) 582 DO_2OP_SAT_SCALAR(vqsubu_scalarh, 2, uint16_t, DO_UQSUB_H) 583 DO_2OP_SAT_SCALAR(vqsubu_scalarw, 4, uint32_t, DO_UQSUB_W) 584 DO_2OP_SAT_SCALAR(vqsubs_scalarb, 1, int8_t, DO_SQSUB_B) 585 DO_2OP_SAT_SCALAR(vqsubs_scalarh, 2, int16_t, DO_SQSUB_H) 586 DO_2OP_SAT_SCALAR(vqsubs_scalarw, 4, int32_t, DO_SQSUB_W) 587 588 static inline uint32_t do_vbrsrb(uint32_t n, uint32_t m) 589 { 590 m &= 0xff; 591 if (m == 0) { 592 return 0; 593 } 594 n = revbit8(n); 595 if (m < 8) { 596 n >>= 8 - m; 597 } 598 return n; 599 } 600 601 static inline uint32_t do_vbrsrh(uint32_t n, uint32_t m) 602 { 603 m &= 0xff; 604 if (m == 0) { 605 return 0; 606 } 607 n = revbit16(n); 608 if (m < 16) { 609 n >>= 16 - m; 610 } 611 return n; 612 } 613 614 static inline uint32_t do_vbrsrw(uint32_t n, uint32_t m) 615 { 616 m &= 0xff; 617 if (m == 0) { 618 return 0; 619 } 620 n = revbit32(n); 621 if (m < 32) { 622 n >>= 32 - m; 623 } 624 return n; 625 } 626 627 DO_2OP_SCALAR(vbrsrb, 1, uint8_t, do_vbrsrb) 628 DO_2OP_SCALAR(vbrsrh, 2, uint16_t, do_vbrsrh) 629 DO_2OP_SCALAR(vbrsrw, 4, uint32_t, do_vbrsrw) 630 631 /* 632 * Multiply add long dual accumulate ops. 633 */ 634 #define DO_LDAV(OP, ESIZE, TYPE, XCHG, EVENACC, ODDACC) \ 635 uint64_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vn, \ 636 void *vm, uint64_t a) \ 637 { \ 638 uint16_t mask = mve_element_mask(env); \ 639 unsigned e; \ 640 TYPE *n = vn, *m = vm; \ 641 for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \ 642 if (mask & 1) { \ 643 if (e & 1) { \ 644 a ODDACC \ 645 (int64_t)n[H##ESIZE(e - 1 * XCHG)] * m[H##ESIZE(e)]; \ 646 } else { \ 647 a EVENACC \ 648 (int64_t)n[H##ESIZE(e + 1 * XCHG)] * m[H##ESIZE(e)]; \ 649 } \ 650 } \ 651 } \ 652 mve_advance_vpt(env); \ 653 return a; \ 654 } 655 656 DO_LDAV(vmlaldavsh, 2, int16_t, false, +=, +=) 657 DO_LDAV(vmlaldavxsh, 2, int16_t, true, +=, +=) 658 DO_LDAV(vmlaldavsw, 4, int32_t, false, +=, +=) 659 DO_LDAV(vmlaldavxsw, 4, int32_t, true, +=, +=) 660 661 DO_LDAV(vmlaldavuh, 2, uint16_t, false, +=, +=) 662 DO_LDAV(vmlaldavuw, 4, uint32_t, false, +=, +=) 663 664 DO_LDAV(vmlsldavsh, 2, int16_t, false, +=, -=) 665 DO_LDAV(vmlsldavxsh, 2, int16_t, true, +=, -=) 666 DO_LDAV(vmlsldavsw, 4, int32_t, false, +=, -=) 667 DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=) 668 669 /* 670 * Rounding multiply add long dual accumulate high: we must keep 671 * a 72-bit internal accumulator value and return the top 64 bits. 672 */ 673 #define DO_LDAVH(OP, ESIZE, TYPE, XCHG, EVENACC, ODDACC, TO128) \ 674 uint64_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vn, \ 675 void *vm, uint64_t a) \ 676 { \ 677 uint16_t mask = mve_element_mask(env); \ 678 unsigned e; \ 679 TYPE *n = vn, *m = vm; \ 680 Int128 acc = int128_lshift(TO128(a), 8); \ 681 for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \ 682 if (mask & 1) { \ 683 if (e & 1) { \ 684 acc = ODDACC(acc, TO128(n[H##ESIZE(e - 1 * XCHG)] * \ 685 m[H##ESIZE(e)])); \ 686 } else { \ 687 acc = EVENACC(acc, TO128(n[H##ESIZE(e + 1 * XCHG)] * \ 688 m[H##ESIZE(e)])); \ 689 } \ 690 acc = int128_add(acc, int128_make64(1 << 7)); \ 691 } \ 692 } \ 693 mve_advance_vpt(env); \ 694 return int128_getlo(int128_rshift(acc, 8)); \ 695 } 696 697 DO_LDAVH(vrmlaldavhsw, 4, int32_t, false, int128_add, int128_add, int128_makes64) 698 DO_LDAVH(vrmlaldavhxsw, 4, int32_t, true, int128_add, int128_add, int128_makes64) 699 700 DO_LDAVH(vrmlaldavhuw, 4, uint32_t, false, int128_add, int128_add, int128_make64) 701 702 DO_LDAVH(vrmlsldavhsw, 4, int32_t, false, int128_add, int128_sub, int128_makes64) 703 DO_LDAVH(vrmlsldavhxsw, 4, int32_t, true, int128_add, int128_sub, int128_makes64) 704