16390eed4SPeter Maydell# M-profile MVE instruction descriptions 26390eed4SPeter Maydell# 36390eed4SPeter Maydell# Copyright (c) 2021 Linaro, Ltd 46390eed4SPeter Maydell# 56390eed4SPeter Maydell# This library is free software; you can redistribute it and/or 66390eed4SPeter Maydell# modify it under the terms of the GNU Lesser General Public 76390eed4SPeter Maydell# License as published by the Free Software Foundation; either 86390eed4SPeter Maydell# version 2.1 of the License, or (at your option) any later version. 96390eed4SPeter Maydell# 106390eed4SPeter Maydell# This library is distributed in the hope that it will be useful, 116390eed4SPeter Maydell# but WITHOUT ANY WARRANTY; without even the implied warranty of 126390eed4SPeter Maydell# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 136390eed4SPeter Maydell# Lesser General Public License for more details. 146390eed4SPeter Maydell# 156390eed4SPeter Maydell# You should have received a copy of the GNU Lesser General Public 166390eed4SPeter Maydell# License along with this library; if not, see <http://www.gnu.org/licenses/>. 176390eed4SPeter Maydell 186390eed4SPeter Maydell# 196390eed4SPeter Maydell# This file is processed by scripts/decodetree.py 206390eed4SPeter Maydell# 21507b6a50SPeter Maydell 22507b6a50SPeter Maydell%qd 22:1 13:3 230f0f2bd5SPeter Maydell%qm 5:1 1:3 24ab59362fSPeter Maydell%qn 7:1 17:3 25507b6a50SPeter Maydell 26a8890353SPeter Maydell# VQDMULL has size in bit 28: 0 for 16 bit, 1 for 32 bit 27a8890353SPeter Maydell%size_28 28:1 !function=plus_1 28a8890353SPeter Maydell 29eab84139SPeter Maydell# 1imm format immediate 30eab84139SPeter Maydell%imm_28_16_0 28:1 16:3 0:4 31eab84139SPeter Maydell 322fc6b751SPeter Maydell&vldr_vstr rn qd imm p a w size l u 330f0f2bd5SPeter Maydell&1op qd qm size 3468245e44SPeter Maydell&2op qd qm qn size 35e51896b3SPeter Maydell&2scalar qd qn rm size 36eab84139SPeter Maydell&1imm qd imm cmode op 37f9ed6174SPeter Maydell&2shift qd qm shift size 38395b92d5SPeter Maydell&vidup qd rn size imm 39395b92d5SPeter Maydell&viwdup qd rn rm size imm 40*eff5d9a9SPeter Maydell&vcmp qm qn size mask 41507b6a50SPeter Maydell 422fc6b751SPeter Maydell@vldr_vstr ....... . . . . l:1 rn:4 ... ...... imm:7 &vldr_vstr qd=%qd u=0 432fc6b751SPeter Maydell# Note that both Rn and Qd are 3 bits only (no D bit) 442fc6b751SPeter Maydell@vldst_wn ... u:1 ... . . . . l:1 . rn:3 qd:3 . ... .. imm:7 &vldr_vstr 45507b6a50SPeter Maydell 460f0f2bd5SPeter Maydell@1op .... .... .... size:2 .. .... .... .... .... &1op qd=%qd qm=%qm 478abd3c80SPeter Maydell@1op_nosz .... .... .... .... .... .... .... .... &1op qd=%qd qm=%qm size=0 489333fe4dSPeter Maydell@2op .... .... .. size:2 .... .... .... .... .... &2op qd=%qd qm=%qm qn=%qn 4968245e44SPeter Maydell@2op_nosz .... .... .... .... .... .... .... .... &2op qd=%qd qm=%qm qn=%qn size=0 5043364321SPeter Maydell@2op_sz28 .... .... .... .... .... .... .... .... &2op qd=%qd qm=%qm qn=%qn \ 5143364321SPeter Maydell size=%size_28 52eab84139SPeter Maydell@1imm .... .... .... .... .... cmode:4 .. op:1 . .... &1imm qd=%qd imm=%imm_28_16_0 530f0f2bd5SPeter Maydell 54483da661SPeter Maydell# The _rev suffix indicates that Vn and Vm are reversed. This is 55483da661SPeter Maydell# the case for shifts. In the Arm ARM these insns are documented 56483da661SPeter Maydell# with the Vm and Vn fields in their usual places, but in the 57483da661SPeter Maydell# assembly the operands are listed "backwards", ie in the order 58483da661SPeter Maydell# Qd, Qm, Qn where other insns use Qd, Qn, Qm. For QEMU we choose 59483da661SPeter Maydell# to consider Vm and Vn as being in different fields in the insn. 60483da661SPeter Maydell# This gives us consistency with A64 and Neon. 61483da661SPeter Maydell@2op_rev .... .... .. size:2 .... .... .... .... .... &2op qd=%qd qm=%qn qn=%qm 62483da661SPeter Maydell 63e51896b3SPeter Maydell@2scalar .... .... .. size:2 .... .... .... .... rm:4 &2scalar qd=%qd qn=%qn 64a8890353SPeter Maydell@2scalar_nosz .... .... .... .... .... .... .... rm:4 &2scalar qd=%qd qn=%qn 65e51896b3SPeter Maydell 66f9ed6174SPeter Maydell@2_shl_b .... .... .. 001 shift:3 .... .... .... .... &2shift qd=%qd qm=%qm size=0 67f9ed6174SPeter Maydell@2_shl_h .... .... .. 01 shift:4 .... .... .... .... &2shift qd=%qd qm=%qm size=1 68f9ed6174SPeter Maydell@2_shl_w .... .... .. 1 shift:5 .... .... .... .... &2shift qd=%qd qm=%qm size=2 69f9ed6174SPeter Maydell 70c2262707SPeter Maydell@2_shll_b .... .... ... 01 shift:3 .... .... .... .... &2shift qd=%qd qm=%qm size=0 71c2262707SPeter Maydell@2_shll_h .... .... ... 1 shift:4 .... .... .... .... &2shift qd=%qd qm=%qm size=1 72c2262707SPeter Maydell# VSHLL encoding T2 where shift == esize 73c2262707SPeter Maydell@2_shll_esize_b .... .... .... 00 .. .... .... .... .... &2shift \ 74c2262707SPeter Maydell qd=%qd qm=%qm size=0 shift=8 75c2262707SPeter Maydell@2_shll_esize_h .... .... .... 01 .. .... .... .... .... &2shift \ 76c2262707SPeter Maydell qd=%qd qm=%qm size=1 shift=16 77c2262707SPeter Maydell 783394116fSPeter Maydell# Right shifts are encoded as N - shift, where N is the element size in bits. 793394116fSPeter Maydell%rshift_i5 16:5 !function=rsub_32 803394116fSPeter Maydell%rshift_i4 16:4 !function=rsub_16 813394116fSPeter Maydell%rshift_i3 16:3 !function=rsub_8 823394116fSPeter Maydell 833394116fSPeter Maydell@2_shr_b .... .... .. 001 ... .... .... .... .... &2shift qd=%qd qm=%qm \ 843394116fSPeter Maydell size=0 shift=%rshift_i3 853394116fSPeter Maydell@2_shr_h .... .... .. 01 .... .... .... .... .... &2shift qd=%qd qm=%qm \ 863394116fSPeter Maydell size=1 shift=%rshift_i4 873394116fSPeter Maydell@2_shr_w .... .... .. 1 ..... .... .... .... .... &2shift qd=%qd qm=%qm \ 883394116fSPeter Maydell size=2 shift=%rshift_i5 893394116fSPeter Maydell 90*eff5d9a9SPeter Maydell# Vector comparison; 4-bit Qm but 3-bit Qn 91*eff5d9a9SPeter Maydell%mask_22_13 22:1 13:3 92*eff5d9a9SPeter Maydell@vcmp .... .... .. size:2 qn:3 . .... .... .... .... &vcmp qm=%qm mask=%mask_22_13 93*eff5d9a9SPeter Maydell 94507b6a50SPeter Maydell# Vector loads and stores 95507b6a50SPeter Maydell 962fc6b751SPeter Maydell# Widening loads and narrowing stores: 972fc6b751SPeter Maydell# for these P=0 W=0 is 'related encoding'; sz=11 is 'related encoding' 982fc6b751SPeter Maydell# This means we need to expand out to multiple patterns for P, W, SZ. 992fc6b751SPeter Maydell# For stores the U bit must be 0 but we catch that in the trans_ function. 1002fc6b751SPeter Maydell# The naming scheme here is "VLDSTB_H == in-memory byte load/store to/from 1012fc6b751SPeter Maydell# signed halfword element in register", etc. 1022fc6b751SPeter MaydellVLDSTB_H 111 . 110 0 a:1 0 1 . 0 ... ... 0 111 01 ....... @vldst_wn \ 1032fc6b751SPeter Maydell p=0 w=1 size=1 1042fc6b751SPeter MaydellVLDSTB_H 111 . 110 1 a:1 0 w:1 . 0 ... ... 0 111 01 ....... @vldst_wn \ 1052fc6b751SPeter Maydell p=1 size=1 1062fc6b751SPeter MaydellVLDSTB_W 111 . 110 0 a:1 0 1 . 0 ... ... 0 111 10 ....... @vldst_wn \ 1072fc6b751SPeter Maydell p=0 w=1 size=2 1082fc6b751SPeter MaydellVLDSTB_W 111 . 110 1 a:1 0 w:1 . 0 ... ... 0 111 10 ....... @vldst_wn \ 1092fc6b751SPeter Maydell p=1 size=2 1102fc6b751SPeter MaydellVLDSTH_W 111 . 110 0 a:1 0 1 . 1 ... ... 0 111 10 ....... @vldst_wn \ 1112fc6b751SPeter Maydell p=0 w=1 size=2 1122fc6b751SPeter MaydellVLDSTH_W 111 . 110 1 a:1 0 w:1 . 1 ... ... 0 111 10 ....... @vldst_wn \ 1132fc6b751SPeter Maydell p=1 size=2 1142fc6b751SPeter Maydell 115507b6a50SPeter Maydell# Non-widening loads/stores (P=0 W=0 is 'related encoding') 116507b6a50SPeter MaydellVLDR_VSTR 1110110 0 a:1 . 1 . .... ... 111100 ....... @vldr_vstr \ 117507b6a50SPeter Maydell size=0 p=0 w=1 118507b6a50SPeter MaydellVLDR_VSTR 1110110 0 a:1 . 1 . .... ... 111101 ....... @vldr_vstr \ 119507b6a50SPeter Maydell size=1 p=0 w=1 120507b6a50SPeter MaydellVLDR_VSTR 1110110 0 a:1 . 1 . .... ... 111110 ....... @vldr_vstr \ 121507b6a50SPeter Maydell size=2 p=0 w=1 122507b6a50SPeter MaydellVLDR_VSTR 1110110 1 a:1 . w:1 . .... ... 111100 ....... @vldr_vstr \ 123507b6a50SPeter Maydell size=0 p=1 124507b6a50SPeter MaydellVLDR_VSTR 1110110 1 a:1 . w:1 . .... ... 111101 ....... @vldr_vstr \ 125507b6a50SPeter Maydell size=1 p=1 126507b6a50SPeter MaydellVLDR_VSTR 1110110 1 a:1 . w:1 . .... ... 111110 ....... @vldr_vstr \ 127507b6a50SPeter Maydell size=2 p=1 1280f0f2bd5SPeter Maydell 12968245e44SPeter Maydell# Vector 2-op 13068245e44SPeter MaydellVAND 1110 1111 0 . 00 ... 0 ... 0 0001 . 1 . 1 ... 0 @2op_nosz 13168245e44SPeter MaydellVBIC 1110 1111 0 . 01 ... 0 ... 0 0001 . 1 . 1 ... 0 @2op_nosz 13268245e44SPeter MaydellVORR 1110 1111 0 . 10 ... 0 ... 0 0001 . 1 . 1 ... 0 @2op_nosz 13368245e44SPeter MaydellVORN 1110 1111 0 . 11 ... 0 ... 0 0001 . 1 . 1 ... 0 @2op_nosz 13468245e44SPeter MaydellVEOR 1111 1111 0 . 00 ... 0 ... 0 0001 . 1 . 1 ... 0 @2op_nosz 13568245e44SPeter Maydell 1369333fe4dSPeter MaydellVADD 1110 1111 0 . .. ... 0 ... 0 1000 . 1 . 0 ... 0 @2op 1379333fe4dSPeter MaydellVSUB 1111 1111 0 . .. ... 0 ... 0 1000 . 1 . 0 ... 0 @2op 1389333fe4dSPeter MaydellVMUL 1110 1111 0 . .. ... 0 ... 0 1001 . 1 . 1 ... 0 @2op 1399333fe4dSPeter Maydell 140c2262707SPeter Maydell# The VSHLL T2 encoding is not a @2op pattern, but is here because it 141c2262707SPeter Maydell# overlaps what would be size=0b11 VMULH/VRMULH 142c2262707SPeter Maydell{ 143c2262707SPeter Maydell VSHLL_BS 111 0 1110 0 . 11 .. 01 ... 0 1110 0 0 . 0 ... 1 @2_shll_esize_b 144c2262707SPeter Maydell VSHLL_BS 111 0 1110 0 . 11 .. 01 ... 0 1110 0 0 . 0 ... 1 @2_shll_esize_h 145c2262707SPeter Maydell 146ba62cc56SPeter Maydell VMULH_S 111 0 1110 0 . .. ...1 ... 0 1110 . 0 . 0 ... 1 @2op 147c2262707SPeter Maydell} 148c2262707SPeter Maydell 149c2262707SPeter Maydell{ 150c2262707SPeter Maydell VSHLL_BU 111 1 1110 0 . 11 .. 01 ... 0 1110 0 0 . 0 ... 1 @2_shll_esize_b 151c2262707SPeter Maydell VSHLL_BU 111 1 1110 0 . 11 .. 01 ... 0 1110 0 0 . 0 ... 1 @2_shll_esize_h 152c2262707SPeter Maydell 153ba62cc56SPeter Maydell VMULH_U 111 1 1110 0 . .. ...1 ... 0 1110 . 0 . 0 ... 1 @2op 154c2262707SPeter Maydell} 155c2262707SPeter Maydell 156c2262707SPeter Maydell{ 157c2262707SPeter Maydell VSHLL_TS 111 0 1110 0 . 11 .. 01 ... 1 1110 0 0 . 0 ... 1 @2_shll_esize_b 158c2262707SPeter Maydell VSHLL_TS 111 0 1110 0 . 11 .. 01 ... 1 1110 0 0 . 0 ... 1 @2_shll_esize_h 159ba62cc56SPeter Maydell 160fca87b78SPeter Maydell VRMULH_S 111 0 1110 0 . .. ...1 ... 1 1110 . 0 . 0 ... 1 @2op 161c2262707SPeter Maydell} 162c2262707SPeter Maydell 163c2262707SPeter Maydell{ 164c2262707SPeter Maydell VSHLL_TU 111 1 1110 0 . 11 .. 01 ... 1 1110 0 0 . 0 ... 1 @2_shll_esize_b 165c2262707SPeter Maydell VSHLL_TU 111 1 1110 0 . 11 .. 01 ... 1 1110 0 0 . 0 ... 1 @2_shll_esize_h 166c2262707SPeter Maydell 167fca87b78SPeter Maydell VRMULH_U 111 1 1110 0 . .. ...1 ... 1 1110 . 0 . 0 ... 1 @2op 168c2262707SPeter Maydell} 169fca87b78SPeter Maydell 170cd367ff3SPeter MaydellVMAX_S 111 0 1111 0 . .. ... 0 ... 0 0110 . 1 . 0 ... 0 @2op 171cd367ff3SPeter MaydellVMAX_U 111 1 1111 0 . .. ... 0 ... 0 0110 . 1 . 0 ... 0 @2op 172cd367ff3SPeter MaydellVMIN_S 111 0 1111 0 . .. ... 0 ... 0 0110 . 1 . 1 ... 0 @2op 173cd367ff3SPeter MaydellVMIN_U 111 1 1111 0 . .. ... 0 ... 0 0110 . 1 . 1 ... 0 @2op 174cd367ff3SPeter Maydell 175bc67aa8dSPeter MaydellVABD_S 111 0 1111 0 . .. ... 0 ... 0 0111 . 1 . 0 ... 0 @2op 176bc67aa8dSPeter MaydellVABD_U 111 1 1111 0 . .. ... 0 ... 0 0111 . 1 . 0 ... 0 @2op 177bc67aa8dSPeter Maydell 178abc48e31SPeter MaydellVHADD_S 111 0 1111 0 . .. ... 0 ... 0 0000 . 1 . 0 ... 0 @2op 179abc48e31SPeter MaydellVHADD_U 111 1 1111 0 . .. ... 0 ... 0 0000 . 1 . 0 ... 0 @2op 180abc48e31SPeter MaydellVHSUB_S 111 0 1111 0 . .. ... 0 ... 0 0010 . 1 . 0 ... 0 @2op 181abc48e31SPeter MaydellVHSUB_U 111 1 1111 0 . .. ... 0 ... 0 0010 . 1 . 0 ... 0 @2op 182abc48e31SPeter Maydell 183c1bd78cbSPeter Maydell{ 184c1bd78cbSPeter Maydell VMULLP_B 111 . 1110 0 . 11 ... 1 ... 0 1110 . 0 . 0 ... 0 @2op_sz28 185ac6ad1dcSPeter Maydell VMULL_BS 111 0 1110 0 . .. ... 1 ... 0 1110 . 0 . 0 ... 0 @2op 186ac6ad1dcSPeter Maydell VMULL_BU 111 1 1110 0 . .. ... 1 ... 0 1110 . 0 . 0 ... 0 @2op 187c1bd78cbSPeter Maydell} 188c1bd78cbSPeter Maydell{ 189c1bd78cbSPeter Maydell VMULLP_T 111 . 1110 0 . 11 ... 1 ... 1 1110 . 0 . 0 ... 0 @2op_sz28 190ac6ad1dcSPeter Maydell VMULL_TS 111 0 1110 0 . .. ... 1 ... 1 1110 . 0 . 0 ... 0 @2op 191ac6ad1dcSPeter Maydell VMULL_TU 111 1 1110 0 . .. ... 1 ... 1 1110 . 0 . 0 ... 0 @2op 192c1bd78cbSPeter Maydell} 193ac6ad1dcSPeter Maydell 194380caf6cSPeter MaydellVQDMULH 1110 1111 0 . .. ... 0 ... 0 1011 . 1 . 0 ... 0 @2op 195380caf6cSPeter MaydellVQRDMULH 1111 1111 0 . .. ... 0 ... 0 1011 . 1 . 0 ... 0 @2op 196380caf6cSPeter Maydell 197f741707bSPeter MaydellVQADD_S 111 0 1111 0 . .. ... 0 ... 0 0000 . 1 . 1 ... 0 @2op 198f741707bSPeter MaydellVQADD_U 111 1 1111 0 . .. ... 0 ... 0 0000 . 1 . 1 ... 0 @2op 199f741707bSPeter MaydellVQSUB_S 111 0 1111 0 . .. ... 0 ... 0 0010 . 1 . 1 ... 0 @2op 200f741707bSPeter MaydellVQSUB_U 111 1 1111 0 . .. ... 0 ... 0 0010 . 1 . 1 ... 0 @2op 201f741707bSPeter Maydell 2020372cad8SPeter MaydellVSHL_S 111 0 1111 0 . .. ... 0 ... 0 0100 . 1 . 0 ... 0 @2op_rev 2030372cad8SPeter MaydellVSHL_U 111 1 1111 0 . .. ... 0 ... 0 0100 . 1 . 0 ... 0 @2op_rev 2040372cad8SPeter Maydell 205bb002345SPeter MaydellVRSHL_S 111 0 1111 0 . .. ... 0 ... 0 0101 . 1 . 0 ... 0 @2op_rev 206bb002345SPeter MaydellVRSHL_U 111 1 1111 0 . .. ... 0 ... 0 0101 . 1 . 0 ... 0 @2op_rev 207bb002345SPeter Maydell 208483da661SPeter MaydellVQSHL_S 111 0 1111 0 . .. ... 0 ... 0 0100 . 1 . 1 ... 0 @2op_rev 209483da661SPeter MaydellVQSHL_U 111 1 1111 0 . .. ... 0 ... 0 0100 . 1 . 1 ... 0 @2op_rev 210483da661SPeter Maydell 2119dc868c4SPeter MaydellVQRSHL_S 111 0 1111 0 . .. ... 0 ... 0 0101 . 1 . 1 ... 0 @2op_rev 2129dc868c4SPeter MaydellVQRSHL_U 111 1 1111 0 . .. ... 0 ... 0 0101 . 1 . 1 ... 0 @2op_rev 2139dc868c4SPeter Maydell 214fd677f80SPeter MaydellVQDMLADH 1110 1110 0 . .. ... 0 ... 0 1110 . 0 . 0 ... 0 @2op 215fd677f80SPeter MaydellVQDMLADHX 1110 1110 0 . .. ... 0 ... 1 1110 . 0 . 0 ... 0 @2op 216fd677f80SPeter MaydellVQRDMLADH 1110 1110 0 . .. ... 0 ... 0 1110 . 0 . 0 ... 1 @2op 217fd677f80SPeter MaydellVQRDMLADHX 1110 1110 0 . .. ... 0 ... 1 1110 . 0 . 0 ... 1 @2op 218fd677f80SPeter Maydell 21992f11732SPeter MaydellVQDMLSDH 1111 1110 0 . .. ... 0 ... 0 1110 . 0 . 0 ... 0 @2op 22092f11732SPeter MaydellVQDMLSDHX 1111 1110 0 . .. ... 0 ... 1 1110 . 0 . 0 ... 0 @2op 22192f11732SPeter MaydellVQRDMLSDH 1111 1110 0 . .. ... 0 ... 0 1110 . 0 . 0 ... 1 @2op 22292f11732SPeter MaydellVQRDMLSDHX 1111 1110 0 . .. ... 0 ... 1 1110 . 0 . 0 ... 1 @2op 22392f11732SPeter Maydell 22443364321SPeter MaydellVQDMULLB 111 . 1110 0 . 11 ... 0 ... 0 1111 . 0 . 0 ... 1 @2op_sz28 22543364321SPeter MaydellVQDMULLT 111 . 1110 0 . 11 ... 0 ... 1 1111 . 0 . 0 ... 1 @2op_sz28 22643364321SPeter Maydell 2271eb987a8SPeter MaydellVRHADD_S 111 0 1111 0 . .. ... 0 ... 0 0001 . 1 . 0 ... 0 @2op 2281eb987a8SPeter MaydellVRHADD_U 111 1 1111 0 . .. ... 0 ... 0 0001 . 1 . 0 ... 0 @2op 2291eb987a8SPeter Maydell 2308625693aSPeter Maydell{ 23189bc4c4fSPeter Maydell VADC 1110 1110 0 . 11 ... 0 ... 0 1111 . 0 . 0 ... 0 @2op_nosz 23289bc4c4fSPeter Maydell VADCI 1110 1110 0 . 11 ... 0 ... 1 1111 . 0 . 0 ... 0 @2op_nosz 2338625693aSPeter Maydell VHCADD90 1110 1110 0 . .. ... 0 ... 0 1111 . 0 . 0 ... 0 @2op 2348625693aSPeter Maydell VHCADD270 1110 1110 0 . .. ... 0 ... 1 1111 . 0 . 0 ... 0 @2op 2358625693aSPeter Maydell} 23667ec113bSPeter Maydell 23767ec113bSPeter Maydell{ 23867ec113bSPeter Maydell VSBC 1111 1110 0 . 11 ... 0 ... 0 1111 . 0 . 0 ... 0 @2op_nosz 23989bc4c4fSPeter Maydell VSBCI 1111 1110 0 . 11 ... 0 ... 1 1111 . 0 . 0 ... 0 @2op_nosz 24067ec113bSPeter Maydell VCADD90 1111 1110 0 . .. ... 0 ... 0 1111 . 0 . 0 ... 0 @2op 24167ec113bSPeter Maydell VCADD270 1111 1110 0 . .. ... 0 ... 1 1111 . 0 . 0 ... 0 @2op 24267ec113bSPeter Maydell} 24389bc4c4fSPeter Maydell 2440f0f2bd5SPeter Maydell# Vector miscellaneous 2450f0f2bd5SPeter Maydell 2466437f1f7SPeter MaydellVCLS 1111 1111 1 . 11 .. 00 ... 0 0100 01 . 0 ... 0 @1op 2470f0f2bd5SPeter MaydellVCLZ 1111 1111 1 . 11 .. 00 ... 0 0100 11 . 0 ... 0 @1op 248249b5309SPeter Maydell 249249b5309SPeter MaydellVREV16 1111 1111 1 . 11 .. 00 ... 0 0001 01 . 0 ... 0 @1op 250249b5309SPeter MaydellVREV32 1111 1111 1 . 11 .. 00 ... 0 0000 11 . 0 ... 0 @1op 251249b5309SPeter MaydellVREV64 1111 1111 1 . 11 .. 00 ... 0 0000 01 . 0 ... 0 @1op 2528abd3c80SPeter Maydell 2538abd3c80SPeter MaydellVMVN 1111 1111 1 . 11 00 00 ... 0 0101 11 . 0 ... 0 @1op_nosz 25459c91773SPeter Maydell 25559c91773SPeter MaydellVABS 1111 1111 1 . 11 .. 01 ... 0 0011 01 . 0 ... 0 @1op 25659c91773SPeter MaydellVABS_fp 1111 1111 1 . 11 .. 01 ... 0 0111 01 . 0 ... 0 @1op 257399a8c76SPeter MaydellVNEG 1111 1111 1 . 11 .. 01 ... 0 0011 11 . 0 ... 0 @1op 258399a8c76SPeter MaydellVNEG_fp 1111 1111 1 . 11 .. 01 ... 0 0111 11 . 0 ... 0 @1op 259ab59362fSPeter Maydell 260ab59362fSPeter Maydell&vdup qd rt size 261ab59362fSPeter Maydell# Qd is in the fields usually named Qn 262ab59362fSPeter Maydell@vdup .... .... . . .. ... . rt:4 .... . . . . .... qd=%qn &vdup 263ab59362fSPeter Maydell 264ab59362fSPeter Maydell# B and E bits encode size, which we decode here to the usual size values 265ab59362fSPeter MaydellVDUP 1110 1110 1 1 10 ... 0 .... 1011 . 0 0 1 0000 @vdup size=0 266ab59362fSPeter MaydellVDUP 1110 1110 1 0 10 ... 0 .... 1011 . 0 1 1 0000 @vdup size=1 267ab59362fSPeter MaydellVDUP 1110 1110 1 0 10 ... 0 .... 1011 . 0 0 1 0000 @vdup size=2 2681d2386f7SPeter Maydell 269395b92d5SPeter Maydell# Incrementing and decrementing dup 270395b92d5SPeter Maydell 271395b92d5SPeter Maydell# VIDUP, VDDUP format immediate: 1 << (immh:imml) 272395b92d5SPeter Maydell%imm_vidup 7:1 0:1 !function=vidup_imm 273395b92d5SPeter Maydell 274395b92d5SPeter Maydell# VIDUP, VDDUP registers: Rm bits [3:1] from insn, bit 0 is 1; 275395b92d5SPeter Maydell# Rn bits [3:1] from insn, bit 0 is 0 276395b92d5SPeter Maydell%vidup_rm 1:3 !function=times_2_plus_1 277395b92d5SPeter Maydell%vidup_rn 17:3 !function=times_2 278395b92d5SPeter Maydell 279395b92d5SPeter Maydell@vidup .... .... . . size:2 .... .... .... .... .... \ 280395b92d5SPeter Maydell qd=%qd imm=%imm_vidup rn=%vidup_rn &vidup 281395b92d5SPeter Maydell@viwdup .... .... . . size:2 .... .... .... .... .... \ 282395b92d5SPeter Maydell qd=%qd imm=%imm_vidup rm=%vidup_rm rn=%vidup_rn &viwdup 283395b92d5SPeter Maydell{ 284395b92d5SPeter Maydell VIDUP 1110 1110 0 . .. ... 1 ... 0 1111 . 110 111 . @vidup 285395b92d5SPeter Maydell VIWDUP 1110 1110 0 . .. ... 1 ... 0 1111 . 110 ... . @viwdup 286395b92d5SPeter Maydell} 287395b92d5SPeter Maydell{ 288395b92d5SPeter Maydell VDDUP 1110 1110 0 . .. ... 1 ... 1 1111 . 110 111 . @vidup 289395b92d5SPeter Maydell VDWDUP 1110 1110 0 . .. ... 1 ... 1 1111 . 110 ... . @viwdup 290395b92d5SPeter Maydell} 291395b92d5SPeter Maydell 2921d2386f7SPeter Maydell# multiply-add long dual accumulate 2931d2386f7SPeter Maydell# rdahi: bits [3:1] from insn, bit 0 is 1 2941d2386f7SPeter Maydell# rdalo: bits [3:1] from insn, bit 0 is 0 2951d2386f7SPeter Maydell%rdahi 20:3 !function=times_2_plus_1 2961d2386f7SPeter Maydell%rdalo 13:3 !function=times_2 2971d2386f7SPeter Maydell# size bit is 0 for 16 bit, 1 for 32 bit 2981d2386f7SPeter Maydell%size_16 16:1 !function=plus_1 2991d2386f7SPeter Maydell 3001d2386f7SPeter Maydell&vmlaldav rdahi rdalo size qn qm x a 3011d2386f7SPeter Maydell 3021d2386f7SPeter Maydell@vmlaldav .... .... . ... ... . ... . .... .... qm:3 . \ 3031d2386f7SPeter Maydell qn=%qn rdahi=%rdahi rdalo=%rdalo size=%size_16 &vmlaldav 30438548747SPeter Maydell@vmlaldav_nosz .... .... . ... ... . ... . .... .... qm:3 . \ 30538548747SPeter Maydell qn=%qn rdahi=%rdahi rdalo=%rdalo size=0 &vmlaldav 3061d2386f7SPeter MaydellVMLALDAV_S 1110 1110 1 ... ... . ... x:1 1110 . 0 a:1 0 ... 0 @vmlaldav 3071d2386f7SPeter MaydellVMLALDAV_U 1111 1110 1 ... ... . ... x:1 1110 . 0 a:1 0 ... 0 @vmlaldav 308181cd971SPeter Maydell 309181cd971SPeter MaydellVMLSLDAV 1110 1110 1 ... ... . ... x:1 1110 . 0 a:1 0 ... 1 @vmlaldav 31038548747SPeter Maydell 31138548747SPeter MaydellVRMLALDAVH_S 1110 1110 1 ... ... 0 ... x:1 1111 . 0 a:1 0 ... 0 @vmlaldav_nosz 31238548747SPeter MaydellVRMLALDAVH_U 1111 1110 1 ... ... 0 ... x:1 1111 . 0 a:1 0 ... 0 @vmlaldav_nosz 31338548747SPeter Maydell 31438548747SPeter MaydellVRMLSLDAVH 1111 1110 1 ... ... 0 ... x:1 1110 . 0 a:1 0 ... 1 @vmlaldav_nosz 315e51896b3SPeter Maydell 316e51896b3SPeter Maydell# Scalar operations 317e51896b3SPeter Maydell 318e51896b3SPeter MaydellVADD_scalar 1110 1110 0 . .. ... 1 ... 0 1111 . 100 .... @2scalar 31991a358fdSPeter MaydellVSUB_scalar 1110 1110 0 . .. ... 1 ... 1 1111 . 100 .... @2scalar 32091a358fdSPeter MaydellVMUL_scalar 1110 1110 0 . .. ... 1 ... 1 1110 . 110 .... @2scalar 321644f717cSPeter MaydellVHADD_S_scalar 1110 1110 0 . .. ... 0 ... 0 1111 . 100 .... @2scalar 322644f717cSPeter MaydellVHADD_U_scalar 1111 1110 0 . .. ... 0 ... 0 1111 . 100 .... @2scalar 323644f717cSPeter MaydellVHSUB_S_scalar 1110 1110 0 . .. ... 0 ... 1 1111 . 100 .... @2scalar 324644f717cSPeter MaydellVHSUB_U_scalar 1111 1110 0 . .. ... 0 ... 1 1111 . 100 .... @2scalar 32539f2ec85SPeter Maydell 326a8890353SPeter Maydell{ 32739f2ec85SPeter Maydell VQADD_S_scalar 1110 1110 0 . .. ... 0 ... 0 1111 . 110 .... @2scalar 32839f2ec85SPeter Maydell VQADD_U_scalar 1111 1110 0 . .. ... 0 ... 0 1111 . 110 .... @2scalar 329a8890353SPeter Maydell VQDMULLB_scalar 111 . 1110 0 . 11 ... 0 ... 0 1111 . 110 .... @2scalar_nosz \ 330a8890353SPeter Maydell size=%size_28 331a8890353SPeter Maydell} 332a8890353SPeter Maydell 333a8890353SPeter Maydell{ 33439f2ec85SPeter Maydell VQSUB_S_scalar 1110 1110 0 . .. ... 0 ... 1 1111 . 110 .... @2scalar 33539f2ec85SPeter Maydell VQSUB_U_scalar 1111 1110 0 . .. ... 0 ... 1 1111 . 110 .... @2scalar 336a8890353SPeter Maydell VQDMULLT_scalar 111 . 1110 0 . 11 ... 0 ... 1 1111 . 110 .... @2scalar_nosz \ 337a8890353SPeter Maydell size=%size_28 338a8890353SPeter Maydell} 339a8890353SPeter Maydell 340b050543bSPeter MaydellVBRSR 1111 1110 0 . .. ... 1 ... 1 1110 . 110 .... @2scalar 341387debdbSPeter Maydell 34266c05767SPeter MaydellVQDMULH_scalar 1110 1110 0 . .. ... 1 ... 0 1110 . 110 .... @2scalar 34366c05767SPeter MaydellVQRDMULH_scalar 1111 1110 0 . .. ... 1 ... 0 1110 . 110 .... @2scalar 34466c05767SPeter Maydell 3456f060a63SPeter Maydell# Vector add across vector 346d43ebd9dSPeter Maydell{ 3476f060a63SPeter Maydell VADDV 111 u:1 1110 1111 size:2 01 ... 0 1111 0 0 a:1 0 qm:3 0 rda=%rdalo 348d43ebd9dSPeter Maydell VADDLV 111 u:1 1110 1 ... 1001 ... 0 1111 00 a:1 0 qm:3 0 \ 349d43ebd9dSPeter Maydell rdahi=%rdahi rdalo=%rdalo 350d43ebd9dSPeter Maydell} 351a8890353SPeter Maydell 352387debdbSPeter Maydell# Predicate operations 353387debdbSPeter MaydellVPST 1111 1110 0 . 11 000 1 ... 0 1111 0100 1101 mask=%mask_22_13 354eab84139SPeter Maydell 355eab84139SPeter Maydell# Logical immediate operations (1 reg and modified-immediate) 356eab84139SPeter Maydell 357eab84139SPeter Maydell# The cmode/op bits here decode VORR/VBIC/VMOV/VMVN, but 358eab84139SPeter Maydell# not in a way we can conveniently represent in decodetree without 359eab84139SPeter Maydell# a lot of repetition: 360eab84139SPeter Maydell# VORR: op=0, (cmode & 1) && cmode < 12 361eab84139SPeter Maydell# VBIC: op=1, (cmode & 1) && cmode < 12 362eab84139SPeter Maydell# VMOV: everything else 363eab84139SPeter Maydell# So we have a single decode line and check the cmode/op in the 364eab84139SPeter Maydell# trans function. 365eab84139SPeter MaydellVimm_1r 111 . 1111 1 . 00 0 ... ... 0 .... 0 1 . 1 .... @1imm 366f9ed6174SPeter Maydell 367f9ed6174SPeter Maydell# Shifts by immediate 368f9ed6174SPeter Maydell 369f9ed6174SPeter MaydellVSHLI 111 0 1111 1 . ... ... ... 0 0101 0 1 . 1 ... 0 @2_shl_b 370f9ed6174SPeter MaydellVSHLI 111 0 1111 1 . ... ... ... 0 0101 0 1 . 1 ... 0 @2_shl_h 371f9ed6174SPeter MaydellVSHLI 111 0 1111 1 . ... ... ... 0 0101 0 1 . 1 ... 0 @2_shl_w 372f9ed6174SPeter Maydell 373f9ed6174SPeter MaydellVQSHLI_S 111 0 1111 1 . ... ... ... 0 0111 0 1 . 1 ... 0 @2_shl_b 374f9ed6174SPeter MaydellVQSHLI_S 111 0 1111 1 . ... ... ... 0 0111 0 1 . 1 ... 0 @2_shl_h 375f9ed6174SPeter MaydellVQSHLI_S 111 0 1111 1 . ... ... ... 0 0111 0 1 . 1 ... 0 @2_shl_w 376f9ed6174SPeter Maydell 377f9ed6174SPeter MaydellVQSHLI_U 111 1 1111 1 . ... ... ... 0 0111 0 1 . 1 ... 0 @2_shl_b 378f9ed6174SPeter MaydellVQSHLI_U 111 1 1111 1 . ... ... ... 0 0111 0 1 . 1 ... 0 @2_shl_h 379f9ed6174SPeter MaydellVQSHLI_U 111 1 1111 1 . ... ... ... 0 0111 0 1 . 1 ... 0 @2_shl_w 380f9ed6174SPeter Maydell 381f9ed6174SPeter MaydellVQSHLUI 111 1 1111 1 . ... ... ... 0 0110 0 1 . 1 ... 0 @2_shl_b 382f9ed6174SPeter MaydellVQSHLUI 111 1 1111 1 . ... ... ... 0 0110 0 1 . 1 ... 0 @2_shl_h 383f9ed6174SPeter MaydellVQSHLUI 111 1 1111 1 . ... ... ... 0 0110 0 1 . 1 ... 0 @2_shl_w 3843394116fSPeter Maydell 3853394116fSPeter MaydellVSHRI_S 111 0 1111 1 . ... ... ... 0 0000 0 1 . 1 ... 0 @2_shr_b 3863394116fSPeter MaydellVSHRI_S 111 0 1111 1 . ... ... ... 0 0000 0 1 . 1 ... 0 @2_shr_h 3873394116fSPeter MaydellVSHRI_S 111 0 1111 1 . ... ... ... 0 0000 0 1 . 1 ... 0 @2_shr_w 3883394116fSPeter Maydell 3893394116fSPeter MaydellVSHRI_U 111 1 1111 1 . ... ... ... 0 0000 0 1 . 1 ... 0 @2_shr_b 3903394116fSPeter MaydellVSHRI_U 111 1 1111 1 . ... ... ... 0 0000 0 1 . 1 ... 0 @2_shr_h 3913394116fSPeter MaydellVSHRI_U 111 1 1111 1 . ... ... ... 0 0000 0 1 . 1 ... 0 @2_shr_w 3923394116fSPeter Maydell 3933394116fSPeter MaydellVRSHRI_S 111 0 1111 1 . ... ... ... 0 0010 0 1 . 1 ... 0 @2_shr_b 3943394116fSPeter MaydellVRSHRI_S 111 0 1111 1 . ... ... ... 0 0010 0 1 . 1 ... 0 @2_shr_h 3953394116fSPeter MaydellVRSHRI_S 111 0 1111 1 . ... ... ... 0 0010 0 1 . 1 ... 0 @2_shr_w 3963394116fSPeter Maydell 3973394116fSPeter MaydellVRSHRI_U 111 1 1111 1 . ... ... ... 0 0010 0 1 . 1 ... 0 @2_shr_b 3983394116fSPeter MaydellVRSHRI_U 111 1 1111 1 . ... ... ... 0 0010 0 1 . 1 ... 0 @2_shr_h 3993394116fSPeter MaydellVRSHRI_U 111 1 1111 1 . ... ... ... 0 0010 0 1 . 1 ... 0 @2_shr_w 400c2262707SPeter Maydell 401c2262707SPeter Maydell# VSHLL T1 encoding; the T2 VSHLL encoding is elsewhere in this file 4029dacf076SPeter Maydell# Note that VMOVL is encoded as "VSHLL with a zero shift count"; we 4039dacf076SPeter Maydell# implement it that way rather than special-casing it in the decode. 404c2262707SPeter MaydellVSHLL_BS 111 0 1110 1 . 1 .. ... ... 0 1111 0 1 . 0 ... 0 @2_shll_b 405c2262707SPeter MaydellVSHLL_BS 111 0 1110 1 . 1 .. ... ... 0 1111 0 1 . 0 ... 0 @2_shll_h 406c2262707SPeter Maydell 407c2262707SPeter MaydellVSHLL_BU 111 1 1110 1 . 1 .. ... ... 0 1111 0 1 . 0 ... 0 @2_shll_b 408c2262707SPeter MaydellVSHLL_BU 111 1 1110 1 . 1 .. ... ... 0 1111 0 1 . 0 ... 0 @2_shll_h 409c2262707SPeter Maydell 410c2262707SPeter MaydellVSHLL_TS 111 0 1110 1 . 1 .. ... ... 1 1111 0 1 . 0 ... 0 @2_shll_b 411c2262707SPeter MaydellVSHLL_TS 111 0 1110 1 . 1 .. ... ... 1 1111 0 1 . 0 ... 0 @2_shll_h 412c2262707SPeter Maydell 413c2262707SPeter MaydellVSHLL_TU 111 1 1110 1 . 1 .. ... ... 1 1111 0 1 . 0 ... 0 @2_shll_b 414c2262707SPeter MaydellVSHLL_TU 111 1 1110 1 . 1 .. ... ... 1 1111 0 1 . 0 ... 0 @2_shll_h 415a78b25faSPeter Maydell 416a78b25faSPeter Maydell# Shift-and-insert 417a78b25faSPeter MaydellVSRI 111 1 1111 1 . ... ... ... 0 0100 0 1 . 1 ... 0 @2_shr_b 418a78b25faSPeter MaydellVSRI 111 1 1111 1 . ... ... ... 0 0100 0 1 . 1 ... 0 @2_shr_h 419a78b25faSPeter MaydellVSRI 111 1 1111 1 . ... ... ... 0 0100 0 1 . 1 ... 0 @2_shr_w 420a78b25faSPeter Maydell 421a78b25faSPeter MaydellVSLI 111 1 1111 1 . ... ... ... 0 0101 0 1 . 1 ... 0 @2_shl_b 422a78b25faSPeter MaydellVSLI 111 1 1111 1 . ... ... ... 0 0101 0 1 . 1 ... 0 @2_shl_h 423a78b25faSPeter MaydellVSLI 111 1 1111 1 . ... ... ... 0 0101 0 1 . 1 ... 0 @2_shl_w 424162e2655SPeter Maydell 425162e2655SPeter Maydell# Narrowing shifts (which only support b and h sizes) 426162e2655SPeter MaydellVSHRNB 111 0 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 1 @2_shr_b 427162e2655SPeter MaydellVSHRNB 111 0 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 1 @2_shr_h 428162e2655SPeter MaydellVSHRNT 111 0 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 1 @2_shr_b 429162e2655SPeter MaydellVSHRNT 111 0 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 1 @2_shr_h 430162e2655SPeter Maydell 431162e2655SPeter MaydellVRSHRNB 111 1 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 1 @2_shr_b 432162e2655SPeter MaydellVRSHRNB 111 1 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 1 @2_shr_h 433162e2655SPeter MaydellVRSHRNT 111 1 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 1 @2_shr_b 434162e2655SPeter MaydellVRSHRNT 111 1 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 1 @2_shr_h 435d6f9e011SPeter Maydell 436d6f9e011SPeter MaydellVQSHRNB_S 111 0 1110 1 . ... ... ... 0 1111 0 1 . 0 ... 0 @2_shr_b 437d6f9e011SPeter MaydellVQSHRNB_S 111 0 1110 1 . ... ... ... 0 1111 0 1 . 0 ... 0 @2_shr_h 438d6f9e011SPeter MaydellVQSHRNT_S 111 0 1110 1 . ... ... ... 1 1111 0 1 . 0 ... 0 @2_shr_b 439d6f9e011SPeter MaydellVQSHRNT_S 111 0 1110 1 . ... ... ... 1 1111 0 1 . 0 ... 0 @2_shr_h 440d6f9e011SPeter MaydellVQSHRNB_U 111 1 1110 1 . ... ... ... 0 1111 0 1 . 0 ... 0 @2_shr_b 441d6f9e011SPeter MaydellVQSHRNB_U 111 1 1110 1 . ... ... ... 0 1111 0 1 . 0 ... 0 @2_shr_h 442d6f9e011SPeter MaydellVQSHRNT_U 111 1 1110 1 . ... ... ... 1 1111 0 1 . 0 ... 0 @2_shr_b 443d6f9e011SPeter MaydellVQSHRNT_U 111 1 1110 1 . ... ... ... 1 1111 0 1 . 0 ... 0 @2_shr_h 444d6f9e011SPeter Maydell 445d6f9e011SPeter MaydellVQSHRUNB 111 0 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 0 @2_shr_b 446d6f9e011SPeter MaydellVQSHRUNB 111 0 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 0 @2_shr_h 447d6f9e011SPeter MaydellVQSHRUNT 111 0 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 0 @2_shr_b 448d6f9e011SPeter MaydellVQSHRUNT 111 0 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 0 @2_shr_h 449d6f9e011SPeter Maydell 450d6f9e011SPeter MaydellVQRSHRNB_S 111 0 1110 1 . ... ... ... 0 1111 0 1 . 0 ... 1 @2_shr_b 451d6f9e011SPeter MaydellVQRSHRNB_S 111 0 1110 1 . ... ... ... 0 1111 0 1 . 0 ... 1 @2_shr_h 452d6f9e011SPeter MaydellVQRSHRNT_S 111 0 1110 1 . ... ... ... 1 1111 0 1 . 0 ... 1 @2_shr_b 453d6f9e011SPeter MaydellVQRSHRNT_S 111 0 1110 1 . ... ... ... 1 1111 0 1 . 0 ... 1 @2_shr_h 454d6f9e011SPeter MaydellVQRSHRNB_U 111 1 1110 1 . ... ... ... 0 1111 0 1 . 0 ... 1 @2_shr_b 455d6f9e011SPeter MaydellVQRSHRNB_U 111 1 1110 1 . ... ... ... 0 1111 0 1 . 0 ... 1 @2_shr_h 456d6f9e011SPeter MaydellVQRSHRNT_U 111 1 1110 1 . ... ... ... 1 1111 0 1 . 0 ... 1 @2_shr_b 457d6f9e011SPeter MaydellVQRSHRNT_U 111 1 1110 1 . ... ... ... 1 1111 0 1 . 0 ... 1 @2_shr_h 458d6f9e011SPeter Maydell 459d6f9e011SPeter MaydellVQRSHRUNB 111 1 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 0 @2_shr_b 460d6f9e011SPeter MaydellVQRSHRUNB 111 1 1110 1 . ... ... ... 0 1111 1 1 . 0 ... 0 @2_shr_h 461d6f9e011SPeter MaydellVQRSHRUNT 111 1 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 0 @2_shr_b 462d6f9e011SPeter MaydellVQRSHRUNT 111 1 1110 1 . ... ... ... 1 1111 1 1 . 0 ... 0 @2_shr_h 4632e6a4ce0SPeter Maydell 4642e6a4ce0SPeter MaydellVSHLC 111 0 1110 1 . 1 imm:5 ... 0 1111 1100 rdm:4 qd=%qd 465*eff5d9a9SPeter Maydell 466*eff5d9a9SPeter Maydell# Comparisons. We expand out the conditions which are split across 467*eff5d9a9SPeter Maydell# encodings T1, T2, T3 and the fc bits. These include VPT, which is 468*eff5d9a9SPeter Maydell# effectively "VCMP then VPST". A plain "VCMP" has a mask field of zero. 469*eff5d9a9SPeter MaydellVCMPEQ 1111 1110 0 . .. ... 1 ... 0 1111 0 0 . 0 ... 0 @vcmp 470*eff5d9a9SPeter MaydellVCMPNE 1111 1110 0 . .. ... 1 ... 0 1111 1 0 . 0 ... 0 @vcmp 471*eff5d9a9SPeter MaydellVCMPCS 1111 1110 0 . .. ... 1 ... 0 1111 0 0 . 0 ... 1 @vcmp 472*eff5d9a9SPeter MaydellVCMPHI 1111 1110 0 . .. ... 1 ... 0 1111 1 0 . 0 ... 1 @vcmp 473*eff5d9a9SPeter MaydellVCMPGE 1111 1110 0 . .. ... 1 ... 1 1111 0 0 . 0 ... 0 @vcmp 474*eff5d9a9SPeter MaydellVCMPLT 1111 1110 0 . .. ... 1 ... 1 1111 1 0 . 0 ... 0 @vcmp 475*eff5d9a9SPeter MaydellVCMPGT 1111 1110 0 . .. ... 1 ... 1 1111 0 0 . 0 ... 1 @vcmp 476*eff5d9a9SPeter MaydellVCMPLE 1111 1110 0 . .. ... 1 ... 1 1111 1 0 . 0 ... 1 @vcmp 477