xref: /qemu/target/arm/cpu-param.h (revision 42fa9665e598c268a7ccfab5b92636618d9574ec)
1 /*
2  * ARM cpu parameters for qemu.
3  *
4  * Copyright (c) 2003 Fabrice Bellard
5  * SPDX-License-Identifier: LGPL-2.0-or-later
6  */
7 
8 #ifndef ARM_CPU_PARAM_H
9 #define ARM_CPU_PARAM_H
10 
11 #ifdef TARGET_AARCH64
12 # define TARGET_PHYS_ADDR_SPACE_BITS  52
13 # define TARGET_VIRT_ADDR_SPACE_BITS  52
14 #else
15 # define TARGET_PHYS_ADDR_SPACE_BITS  40
16 # define TARGET_VIRT_ADDR_SPACE_BITS  32
17 #endif
18 
19 #ifdef CONFIG_USER_ONLY
20 # ifdef TARGET_AARCH64
21 #  define TARGET_TAGGED_ADDRESSES
22 # ifdef __FreeBSD__
23 #  define TARGET_PAGE_BITS 12
24 # else
25 /* Allow user-only to vary page size from 4k */
26 #  define TARGET_PAGE_BITS_VARY
27 # endif
28 # else
29 #  define TARGET_PAGE_BITS 12
30 # endif
31 #else /* !CONFIG_USER_ONLY */
32 /*
33  * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6
34  * have to support 1K tiny pages.
35  */
36 # define TARGET_PAGE_BITS_VARY
37 # define TARGET_PAGE_BITS_LEGACY 10
38 #endif /* !CONFIG_USER_ONLY */
39 
40 /*
41  * ARM-specific extra insn start words:
42  * 1: Conditional execution bits
43  * 2: Partial exception syndrome for data aborts
44  */
45 #define TARGET_INSN_START_EXTRA_WORDS 2
46 
47 /* ARM processors have a weak memory model */
48 #define TCG_GUEST_DEFAULT_MO      (0)
49 
50 #endif
51