xref: /qemu/target/arm/cpu-param.h (revision 7cef6d686309e2792186504ae17cf4f3eb57ef68)
174433bf0SRichard Henderson /*
274433bf0SRichard Henderson  * ARM cpu parameters for qemu.
374433bf0SRichard Henderson  *
474433bf0SRichard Henderson  * Copyright (c) 2003 Fabrice Bellard
5b14d0649SPhilippe Mathieu-Daudé  * SPDX-License-Identifier: LGPL-2.0-or-later
674433bf0SRichard Henderson  */
774433bf0SRichard Henderson 
874433bf0SRichard Henderson #ifndef ARM_CPU_PARAM_H
94f31b54bSMarkus Armbruster #define ARM_CPU_PARAM_H
1074433bf0SRichard Henderson 
1174433bf0SRichard Henderson #ifdef TARGET_AARCH64
127a928f43SRichard Henderson # define TARGET_PHYS_ADDR_SPACE_BITS  52
130af312b6SRichard Henderson # define TARGET_VIRT_ADDR_SPACE_BITS  52
1474433bf0SRichard Henderson #else
1574433bf0SRichard Henderson # define TARGET_PHYS_ADDR_SPACE_BITS  40
1674433bf0SRichard Henderson # define TARGET_VIRT_ADDR_SPACE_BITS  32
1774433bf0SRichard Henderson #endif
1874433bf0SRichard Henderson 
1974433bf0SRichard Henderson #ifdef CONFIG_USER_ONLY
20*2c0b261fSRichard Henderson # if defined(TARGET_AARCH64) && defined(CONFIG_LINUX)
21a575230fSRichard Henderson /* Allow user-only to vary page size from 4k */
22a575230fSRichard Henderson #  define TARGET_PAGE_BITS_VARY
23a575230fSRichard Henderson # else
24a575230fSRichard Henderson #  define TARGET_PAGE_BITS 12
250e0c030cSRichard Henderson # endif
26e92dd332SPhilippe Mathieu-Daudé #else /* !CONFIG_USER_ONLY */
2774433bf0SRichard Henderson /*
2874433bf0SRichard Henderson  * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6
2974433bf0SRichard Henderson  * have to support 1K tiny pages.
3074433bf0SRichard Henderson  */
3174433bf0SRichard Henderson # define TARGET_PAGE_BITS_VARY
32d11bf649SRichard Henderson # define TARGET_PAGE_BITS_LEGACY 10
33e92dd332SPhilippe Mathieu-Daudé #endif /* !CONFIG_USER_ONLY */
3424d18d5dSRichard Henderson 
3521d41c56SPhilippe Mathieu-Daudé /*
3621d41c56SPhilippe Mathieu-Daudé  * ARM-specific extra insn start words:
3721d41c56SPhilippe Mathieu-Daudé  * 1: Conditional execution bits
3821d41c56SPhilippe Mathieu-Daudé  * 2: Partial exception syndrome for data aborts
3921d41c56SPhilippe Mathieu-Daudé  */
4021d41c56SPhilippe Mathieu-Daudé #define TARGET_INSN_START_EXTRA_WORDS 2
4121d41c56SPhilippe Mathieu-Daudé 
4274433bf0SRichard Henderson #endif
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