1 /* Support for writing ELF notes for ARM architectures 2 * 3 * Copyright (C) 2015 Red Hat Inc. 4 * 5 * Author: Andrew Jones <drjones@redhat.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "qemu/osdep.h" 22 #include "cpu.h" 23 #include "elf.h" 24 #include "system/dump.h" 25 #include "cpu-features.h" 26 #include "internals.h" 27 28 /* struct user_pt_regs from arch/arm64/include/uapi/asm/ptrace.h */ 29 struct aarch64_user_regs { 30 uint64_t regs[31]; 31 uint64_t sp; 32 uint64_t pc; 33 uint64_t pstate; 34 } QEMU_PACKED; 35 36 QEMU_BUILD_BUG_ON(sizeof(struct aarch64_user_regs) != 272); 37 38 /* struct elf_prstatus from include/uapi/linux/elfcore.h */ 39 struct aarch64_elf_prstatus { 40 char pad1[32]; /* 32 == offsetof(struct elf_prstatus, pr_pid) */ 41 uint32_t pr_pid; 42 char pad2[76]; /* 76 == offsetof(struct elf_prstatus, pr_reg) - 43 offsetof(struct elf_prstatus, pr_ppid) */ 44 struct aarch64_user_regs pr_reg; 45 uint32_t pr_fpvalid; 46 char pad3[4]; 47 } QEMU_PACKED; 48 49 QEMU_BUILD_BUG_ON(sizeof(struct aarch64_elf_prstatus) != 392); 50 51 /* struct user_fpsimd_state from arch/arm64/include/uapi/asm/ptrace.h 52 * 53 * While the vregs member of user_fpsimd_state is of type __uint128_t, 54 * QEMU uses an array of uint64_t, where the high half of the 128-bit 55 * value is always in the 2n+1'th index. Thus we also break the 128- 56 * bit values into two halves in this reproduction of user_fpsimd_state. 57 */ 58 struct aarch64_user_vfp_state { 59 uint64_t vregs[64]; 60 uint32_t fpsr; 61 uint32_t fpcr; 62 char pad[8]; 63 } QEMU_PACKED; 64 65 QEMU_BUILD_BUG_ON(sizeof(struct aarch64_user_vfp_state) != 528); 66 67 /* struct user_sve_header from arch/arm64/include/uapi/asm/ptrace.h */ 68 struct aarch64_user_sve_header { 69 uint32_t size; 70 uint32_t max_size; 71 uint16_t vl; 72 uint16_t max_vl; 73 uint16_t flags; 74 uint16_t reserved; 75 } QEMU_PACKED; 76 77 struct aarch64_note { 78 Elf64_Nhdr hdr; 79 char name[8]; /* align_up(sizeof("CORE"), 4) */ 80 union { 81 struct aarch64_elf_prstatus prstatus; 82 struct aarch64_user_vfp_state vfp; 83 struct aarch64_user_sve_header sve; 84 }; 85 } QEMU_PACKED; 86 87 #define AARCH64_NOTE_HEADER_SIZE offsetof(struct aarch64_note, prstatus) 88 #define AARCH64_PRSTATUS_NOTE_SIZE \ 89 (AARCH64_NOTE_HEADER_SIZE + sizeof(struct aarch64_elf_prstatus)) 90 #define AARCH64_PRFPREG_NOTE_SIZE \ 91 (AARCH64_NOTE_HEADER_SIZE + sizeof(struct aarch64_user_vfp_state)) 92 #define AARCH64_SVE_NOTE_SIZE(env) \ 93 (AARCH64_NOTE_HEADER_SIZE + sve_size(env)) 94 95 static void aarch64_note_init(struct aarch64_note *note, DumpState *s, 96 const char *name, Elf64_Word namesz, 97 Elf64_Word type, Elf64_Word descsz) 98 { 99 memset(note, 0, sizeof(*note)); 100 101 note->hdr.n_namesz = cpu_to_dump32(s, namesz); 102 note->hdr.n_descsz = cpu_to_dump32(s, descsz); 103 note->hdr.n_type = cpu_to_dump32(s, type); 104 105 memcpy(note->name, name, namesz); 106 } 107 108 static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f, 109 CPUARMState *env, int cpuid, 110 DumpState *s) 111 { 112 struct aarch64_note note; 113 int ret, i; 114 115 aarch64_note_init(¬e, s, "CORE", 5, NT_PRFPREG, sizeof(note.vfp)); 116 117 for (i = 0; i < 32; ++i) { 118 uint64_t *q = aa64_vfp_qreg(env, i); 119 note.vfp.vregs[2 * i + 0] = cpu_to_dump64(s, q[0]); 120 note.vfp.vregs[2 * i + 1] = cpu_to_dump64(s, q[1]); 121 } 122 123 if (s->dump_info.d_endian == ELFDATA2MSB) { 124 /* For AArch64 we must always swap the vfp.regs's 2n and 2n+1 125 * entries when generating BE notes, because even big endian 126 * hosts use 2n+1 for the high half. 127 */ 128 for (i = 0; i < 32; ++i) { 129 uint64_t tmp = note.vfp.vregs[2*i]; 130 note.vfp.vregs[2 * i] = note.vfp.vregs[2 * i + 1]; 131 note.vfp.vregs[2 * i + 1] = tmp; 132 } 133 } 134 135 note.vfp.fpsr = cpu_to_dump32(s, vfp_get_fpsr(env)); 136 note.vfp.fpcr = cpu_to_dump32(s, vfp_get_fpcr(env)); 137 138 ret = f(¬e, AARCH64_PRFPREG_NOTE_SIZE, s); 139 if (ret < 0) { 140 return -1; 141 } 142 143 return 0; 144 } 145 146 #ifdef TARGET_AARCH64 147 static off_t sve_zreg_offset(uint32_t vq, int n) 148 { 149 off_t off = sizeof(struct aarch64_user_sve_header); 150 return ROUND_UP(off, 16) + vq * 16 * n; 151 } 152 153 static off_t sve_preg_offset(uint32_t vq, int n) 154 { 155 return sve_zreg_offset(vq, 32) + vq * 16 / 8 * n; 156 } 157 158 static off_t sve_fpsr_offset(uint32_t vq) 159 { 160 off_t off = sve_preg_offset(vq, 17); 161 return ROUND_UP(off, 16); 162 } 163 164 static off_t sve_fpcr_offset(uint32_t vq) 165 { 166 return sve_fpsr_offset(vq) + sizeof(uint32_t); 167 } 168 169 static uint32_t sve_current_vq(CPUARMState *env) 170 { 171 return sve_vqm1_for_el(env, arm_current_el(env)) + 1; 172 } 173 174 static size_t sve_size_vq(uint32_t vq) 175 { 176 off_t off = sve_fpcr_offset(vq) + sizeof(uint32_t); 177 return ROUND_UP(off, 16); 178 } 179 180 static size_t sve_size(CPUARMState *env) 181 { 182 return sve_size_vq(sve_current_vq(env)); 183 } 184 185 static int aarch64_write_elf64_sve(WriteCoreDumpFunction f, 186 CPUARMState *env, int cpuid, 187 DumpState *s) 188 { 189 struct aarch64_note *note; 190 ARMCPU *cpu = env_archcpu(env); 191 uint32_t vq = sve_current_vq(env); 192 uint64_t tmp[ARM_MAX_VQ * 2], *r; 193 uint32_t fpr; 194 uint8_t *buf; 195 int ret, i; 196 197 note = g_malloc0(AARCH64_SVE_NOTE_SIZE(env)); 198 buf = (uint8_t *)¬e->sve; 199 200 aarch64_note_init(note, s, "LINUX", 6, NT_ARM_SVE, sve_size_vq(vq)); 201 202 note->sve.size = cpu_to_dump32(s, sve_size_vq(vq)); 203 note->sve.max_size = cpu_to_dump32(s, sve_size_vq(cpu->sve_max_vq)); 204 note->sve.vl = cpu_to_dump16(s, vq * 16); 205 note->sve.max_vl = cpu_to_dump16(s, cpu->sve_max_vq * 16); 206 note->sve.flags = cpu_to_dump16(s, 1); 207 208 for (i = 0; i < 32; ++i) { 209 r = sve_bswap64(tmp, &env->vfp.zregs[i].d[0], vq * 2); 210 memcpy(&buf[sve_zreg_offset(vq, i)], r, vq * 16); 211 } 212 213 for (i = 0; i < 17; ++i) { 214 r = sve_bswap64(tmp, r = &env->vfp.pregs[i].p[0], 215 DIV_ROUND_UP(vq * 2, 8)); 216 memcpy(&buf[sve_preg_offset(vq, i)], r, vq * 16 / 8); 217 } 218 219 fpr = cpu_to_dump32(s, vfp_get_fpsr(env)); 220 memcpy(&buf[sve_fpsr_offset(vq)], &fpr, sizeof(uint32_t)); 221 222 fpr = cpu_to_dump32(s, vfp_get_fpcr(env)); 223 memcpy(&buf[sve_fpcr_offset(vq)], &fpr, sizeof(uint32_t)); 224 225 ret = f(note, AARCH64_SVE_NOTE_SIZE(env), s); 226 g_free(note); 227 228 if (ret < 0) { 229 return -1; 230 } 231 232 return 0; 233 } 234 #endif 235 236 int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, 237 int cpuid, DumpState *s) 238 { 239 struct aarch64_note note; 240 ARMCPU *cpu = ARM_CPU(cs); 241 CPUARMState *env = &cpu->env; 242 uint64_t pstate, sp; 243 int ret, i; 244 245 aarch64_note_init(¬e, s, "CORE", 5, NT_PRSTATUS, sizeof(note.prstatus)); 246 247 note.prstatus.pr_pid = cpu_to_dump32(s, cpuid); 248 note.prstatus.pr_fpvalid = cpu_to_dump32(s, 1); 249 250 if (!is_a64(env)) { 251 aarch64_sync_32_to_64(env); 252 pstate = cpsr_read(env); 253 sp = 0; 254 } else { 255 pstate = pstate_read(env); 256 sp = env->xregs[31]; 257 } 258 259 for (i = 0; i < 31; ++i) { 260 note.prstatus.pr_reg.regs[i] = cpu_to_dump64(s, env->xregs[i]); 261 } 262 note.prstatus.pr_reg.sp = cpu_to_dump64(s, sp); 263 note.prstatus.pr_reg.pc = cpu_to_dump64(s, env->pc); 264 note.prstatus.pr_reg.pstate = cpu_to_dump64(s, pstate); 265 266 ret = f(¬e, AARCH64_PRSTATUS_NOTE_SIZE, s); 267 if (ret < 0) { 268 return -1; 269 } 270 271 ret = aarch64_write_elf64_prfpreg(f, env, cpuid, s); 272 if (ret) { 273 return ret; 274 } 275 276 #ifdef TARGET_AARCH64 277 if (cpu_isar_feature(aa64_sve, cpu)) { 278 ret = aarch64_write_elf64_sve(f, env, cpuid, s); 279 } 280 #endif 281 282 return ret; 283 } 284 285 /* struct pt_regs from arch/arm/include/asm/ptrace.h */ 286 struct arm_user_regs { 287 uint32_t regs[17]; 288 char pad[4]; 289 } QEMU_PACKED; 290 291 QEMU_BUILD_BUG_ON(sizeof(struct arm_user_regs) != 72); 292 293 /* struct elf_prstatus from include/uapi/linux/elfcore.h */ 294 struct arm_elf_prstatus { 295 char pad1[24]; /* 24 == offsetof(struct elf_prstatus, pr_pid) */ 296 uint32_t pr_pid; 297 char pad2[44]; /* 44 == offsetof(struct elf_prstatus, pr_reg) - 298 offsetof(struct elf_prstatus, pr_ppid) */ 299 struct arm_user_regs pr_reg; 300 uint32_t pr_fpvalid; 301 } QEMU_PACKED arm_elf_prstatus; 302 303 QEMU_BUILD_BUG_ON(sizeof(struct arm_elf_prstatus) != 148); 304 305 /* struct user_vfp from arch/arm/include/asm/user.h */ 306 struct arm_user_vfp_state { 307 uint64_t vregs[32]; 308 uint32_t fpscr; 309 } QEMU_PACKED; 310 311 QEMU_BUILD_BUG_ON(sizeof(struct arm_user_vfp_state) != 260); 312 313 struct arm_note { 314 Elf32_Nhdr hdr; 315 char name[8]; /* align_up(sizeof("LINUX"), 4) */ 316 union { 317 struct arm_elf_prstatus prstatus; 318 struct arm_user_vfp_state vfp; 319 }; 320 } QEMU_PACKED; 321 322 #define ARM_NOTE_HEADER_SIZE offsetof(struct arm_note, prstatus) 323 #define ARM_PRSTATUS_NOTE_SIZE \ 324 (ARM_NOTE_HEADER_SIZE + sizeof(struct arm_elf_prstatus)) 325 #define ARM_VFP_NOTE_SIZE \ 326 (ARM_NOTE_HEADER_SIZE + sizeof(struct arm_user_vfp_state)) 327 328 static void arm_note_init(struct arm_note *note, DumpState *s, 329 const char *name, Elf32_Word namesz, 330 Elf32_Word type, Elf32_Word descsz) 331 { 332 memset(note, 0, sizeof(*note)); 333 334 note->hdr.n_namesz = cpu_to_dump32(s, namesz); 335 note->hdr.n_descsz = cpu_to_dump32(s, descsz); 336 note->hdr.n_type = cpu_to_dump32(s, type); 337 338 memcpy(note->name, name, namesz); 339 } 340 341 static int arm_write_elf32_vfp(WriteCoreDumpFunction f, CPUARMState *env, 342 int cpuid, DumpState *s) 343 { 344 struct arm_note note; 345 int ret, i; 346 347 arm_note_init(¬e, s, "LINUX", 6, NT_ARM_VFP, sizeof(note.vfp)); 348 349 for (i = 0; i < 32; ++i) { 350 note.vfp.vregs[i] = cpu_to_dump64(s, *aa32_vfp_dreg(env, i)); 351 } 352 353 note.vfp.fpscr = cpu_to_dump32(s, vfp_get_fpscr(env)); 354 355 ret = f(¬e, ARM_VFP_NOTE_SIZE, s); 356 if (ret < 0) { 357 return -1; 358 } 359 360 return 0; 361 } 362 363 int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, 364 int cpuid, DumpState *s) 365 { 366 struct arm_note note; 367 ARMCPU *cpu = ARM_CPU(cs); 368 CPUARMState *env = &cpu->env; 369 int ret, i; 370 bool fpvalid = cpu_isar_feature(aa32_vfp_simd, cpu); 371 372 arm_note_init(¬e, s, "CORE", 5, NT_PRSTATUS, sizeof(note.prstatus)); 373 374 note.prstatus.pr_pid = cpu_to_dump32(s, cpuid); 375 note.prstatus.pr_fpvalid = cpu_to_dump32(s, fpvalid); 376 377 for (i = 0; i < 16; ++i) { 378 note.prstatus.pr_reg.regs[i] = cpu_to_dump32(s, env->regs[i]); 379 } 380 note.prstatus.pr_reg.regs[16] = cpu_to_dump32(s, cpsr_read(env)); 381 382 ret = f(¬e, ARM_PRSTATUS_NOTE_SIZE, s); 383 if (ret < 0) { 384 return -1; 385 } else if (fpvalid) { 386 return arm_write_elf32_vfp(f, env, cpuid, s); 387 } 388 389 return 0; 390 } 391 392 int cpu_get_dump_info(ArchDumpInfo *info, 393 const GuestPhysBlockList *guest_phys_blocks) 394 { 395 ARMCPU *cpu; 396 CPUARMState *env; 397 GuestPhysBlock *block; 398 hwaddr lowest_addr = ULLONG_MAX; 399 400 if (first_cpu == NULL) { 401 return -1; 402 } 403 404 cpu = ARM_CPU(first_cpu); 405 env = &cpu->env; 406 407 /* Take a best guess at the phys_base. If we get it wrong then crash 408 * will need '--machdep phys_offset=<phys-offset>' added to its command 409 * line, which isn't any worse than assuming we can use zero, but being 410 * wrong. This is the same algorithm the crash utility uses when 411 * attempting to guess as it loads non-dumpfile formatted files. 412 */ 413 QTAILQ_FOREACH(block, &guest_phys_blocks->head, next) { 414 if (block->target_start < lowest_addr) { 415 lowest_addr = block->target_start; 416 } 417 } 418 419 if (arm_feature(env, ARM_FEATURE_AARCH64)) { 420 info->d_machine = EM_AARCH64; 421 info->d_class = ELFCLASS64; 422 info->page_size = (1 << 16); /* aarch64 max pagesize */ 423 if (lowest_addr != ULLONG_MAX) { 424 info->phys_base = lowest_addr; 425 } 426 } else { 427 info->d_machine = EM_ARM; 428 info->d_class = ELFCLASS32; 429 info->page_size = (1 << 12); 430 if (lowest_addr < UINT_MAX) { 431 info->phys_base = lowest_addr; 432 } 433 } 434 435 /* We assume the relevant endianness is that of EL1; this is right 436 * for kernels, but might give the wrong answer if you're trying to 437 * dump a hypervisor that happens to be running an opposite-endian 438 * kernel. 439 */ 440 info->d_endian = (env->cp15.sctlr_el[1] & SCTLR_EE) != 0 441 ? ELFDATA2MSB : ELFDATA2LSB; 442 443 return 0; 444 } 445 446 ssize_t cpu_get_note_size(int class, int machine, int nr_cpus) 447 { 448 ARMCPU *cpu = ARM_CPU(first_cpu); 449 size_t note_size; 450 451 if (class == ELFCLASS64) { 452 note_size = AARCH64_PRSTATUS_NOTE_SIZE; 453 note_size += AARCH64_PRFPREG_NOTE_SIZE; 454 #ifdef TARGET_AARCH64 455 if (cpu_isar_feature(aa64_sve, cpu)) { 456 note_size += AARCH64_SVE_NOTE_SIZE(&cpu->env); 457 } 458 #endif 459 } else { 460 note_size = ARM_PRSTATUS_NOTE_SIZE; 461 if (cpu_isar_feature(aa32_vfp_simd, cpu)) { 462 note_size += ARM_VFP_NOTE_SIZE; 463 } 464 } 465 466 return note_size * nr_cpus; 467 } 468