1 /* Support for writing ELF notes for ARM architectures 2 * 3 * Copyright (C) 2015 Red Hat Inc. 4 * 5 * Author: Andrew Jones <drjones@redhat.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "qemu/osdep.h" 22 #include "cpu.h" 23 #include "elf.h" 24 #include "system/dump.h" 25 #include "cpu-features.h" 26 #include "internals.h" 27 28 /* struct user_pt_regs from arch/arm64/include/uapi/asm/ptrace.h */ 29 struct aarch64_user_regs { 30 uint64_t regs[31]; 31 uint64_t sp; 32 uint64_t pc; 33 uint64_t pstate; 34 } QEMU_PACKED; 35 36 QEMU_BUILD_BUG_ON(sizeof(struct aarch64_user_regs) != 272); 37 38 /* struct elf_prstatus from include/uapi/linux/elfcore.h */ 39 struct aarch64_elf_prstatus { 40 char pad1[32]; /* 32 == offsetof(struct elf_prstatus, pr_pid) */ 41 uint32_t pr_pid; 42 char pad2[76]; /* 76 == offsetof(struct elf_prstatus, pr_reg) - 43 offsetof(struct elf_prstatus, pr_ppid) */ 44 struct aarch64_user_regs pr_reg; 45 uint32_t pr_fpvalid; 46 char pad3[4]; 47 } QEMU_PACKED; 48 49 QEMU_BUILD_BUG_ON(sizeof(struct aarch64_elf_prstatus) != 392); 50 51 /* struct user_fpsimd_state from arch/arm64/include/uapi/asm/ptrace.h 52 * 53 * While the vregs member of user_fpsimd_state is of type __uint128_t, 54 * QEMU uses an array of uint64_t, where the high half of the 128-bit 55 * value is always in the 2n+1'th index. Thus we also break the 128- 56 * bit values into two halves in this reproduction of user_fpsimd_state. 57 */ 58 struct aarch64_user_vfp_state { 59 uint64_t vregs[64]; 60 uint32_t fpsr; 61 uint32_t fpcr; 62 char pad[8]; 63 } QEMU_PACKED; 64 65 QEMU_BUILD_BUG_ON(sizeof(struct aarch64_user_vfp_state) != 528); 66 67 /* struct user_sve_header from arch/arm64/include/uapi/asm/ptrace.h */ 68 struct aarch64_user_sve_header { 69 uint32_t size; 70 uint32_t max_size; 71 uint16_t vl; 72 uint16_t max_vl; 73 uint16_t flags; 74 uint16_t reserved; 75 } QEMU_PACKED; 76 77 struct aarch64_note { 78 Elf64_Nhdr hdr; 79 char name[8]; /* align_up(sizeof("CORE"), 4) */ 80 union { 81 struct aarch64_elf_prstatus prstatus; 82 struct aarch64_user_vfp_state vfp; 83 struct aarch64_user_sve_header sve; 84 }; 85 } QEMU_PACKED; 86 87 #define AARCH64_NOTE_HEADER_SIZE offsetof(struct aarch64_note, prstatus) 88 #define AARCH64_PRSTATUS_NOTE_SIZE \ 89 (AARCH64_NOTE_HEADER_SIZE + sizeof(struct aarch64_elf_prstatus)) 90 #define AARCH64_PRFPREG_NOTE_SIZE \ 91 (AARCH64_NOTE_HEADER_SIZE + sizeof(struct aarch64_user_vfp_state)) 92 #define AARCH64_SVE_NOTE_SIZE(env) \ 93 (AARCH64_NOTE_HEADER_SIZE + sve_size(env)) 94 95 static void aarch64_note_init(struct aarch64_note *note, DumpState *s, 96 const char *name, Elf64_Word namesz, 97 Elf64_Word type, Elf64_Word descsz) 98 { 99 memset(note, 0, sizeof(*note)); 100 101 note->hdr.n_namesz = cpu_to_dump32(s, namesz); 102 note->hdr.n_descsz = cpu_to_dump32(s, descsz); 103 note->hdr.n_type = cpu_to_dump32(s, type); 104 105 memcpy(note->name, name, namesz); 106 } 107 108 static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f, 109 CPUARMState *env, int cpuid, 110 DumpState *s) 111 { 112 struct aarch64_note note; 113 int ret, i; 114 115 aarch64_note_init(¬e, s, "CORE", 5, NT_PRFPREG, sizeof(note.vfp)); 116 117 for (i = 0; i < 32; ++i) { 118 uint64_t *q = aa64_vfp_qreg(env, i); 119 note.vfp.vregs[2 * i + 0] = cpu_to_dump64(s, q[0]); 120 note.vfp.vregs[2 * i + 1] = cpu_to_dump64(s, q[1]); 121 } 122 123 if (s->dump_info.d_endian == ELFDATA2MSB) { 124 /* For AArch64 we must always swap the vfp.regs's 2n and 2n+1 125 * entries when generating BE notes, because even big endian 126 * hosts use 2n+1 for the high half. 127 */ 128 for (i = 0; i < 32; ++i) { 129 uint64_t tmp = note.vfp.vregs[2*i]; 130 note.vfp.vregs[2 * i] = note.vfp.vregs[2 * i + 1]; 131 note.vfp.vregs[2 * i + 1] = tmp; 132 } 133 } 134 135 note.vfp.fpsr = cpu_to_dump32(s, vfp_get_fpsr(env)); 136 note.vfp.fpcr = cpu_to_dump32(s, vfp_get_fpcr(env)); 137 138 ret = f(¬e, AARCH64_PRFPREG_NOTE_SIZE, s); 139 if (ret < 0) { 140 return -1; 141 } 142 143 return 0; 144 } 145 146 static off_t sve_zreg_offset(uint32_t vq, int n) 147 { 148 off_t off = sizeof(struct aarch64_user_sve_header); 149 return ROUND_UP(off, 16) + vq * 16 * n; 150 } 151 152 static off_t sve_preg_offset(uint32_t vq, int n) 153 { 154 return sve_zreg_offset(vq, 32) + vq * 16 / 8 * n; 155 } 156 157 static off_t sve_fpsr_offset(uint32_t vq) 158 { 159 off_t off = sve_preg_offset(vq, 17); 160 return ROUND_UP(off, 16); 161 } 162 163 static off_t sve_fpcr_offset(uint32_t vq) 164 { 165 return sve_fpsr_offset(vq) + sizeof(uint32_t); 166 } 167 168 static uint32_t sve_current_vq(CPUARMState *env) 169 { 170 return sve_vqm1_for_el(env, arm_current_el(env)) + 1; 171 } 172 173 static size_t sve_size_vq(uint32_t vq) 174 { 175 off_t off = sve_fpcr_offset(vq) + sizeof(uint32_t); 176 return ROUND_UP(off, 16); 177 } 178 179 static size_t sve_size(CPUARMState *env) 180 { 181 return sve_size_vq(sve_current_vq(env)); 182 } 183 184 static int aarch64_write_elf64_sve(WriteCoreDumpFunction f, 185 CPUARMState *env, int cpuid, 186 DumpState *s) 187 { 188 struct aarch64_note *note; 189 ARMCPU *cpu = env_archcpu(env); 190 uint32_t vq = sve_current_vq(env); 191 uint64_t tmp[ARM_MAX_VQ * 2], *r; 192 uint32_t fpr; 193 uint8_t *buf; 194 int ret, i; 195 196 note = g_malloc0(AARCH64_SVE_NOTE_SIZE(env)); 197 buf = (uint8_t *)¬e->sve; 198 199 aarch64_note_init(note, s, "LINUX", 6, NT_ARM_SVE, sve_size_vq(vq)); 200 201 note->sve.size = cpu_to_dump32(s, sve_size_vq(vq)); 202 note->sve.max_size = cpu_to_dump32(s, sve_size_vq(cpu->sve_max_vq)); 203 note->sve.vl = cpu_to_dump16(s, vq * 16); 204 note->sve.max_vl = cpu_to_dump16(s, cpu->sve_max_vq * 16); 205 note->sve.flags = cpu_to_dump16(s, 1); 206 207 for (i = 0; i < 32; ++i) { 208 r = sve_bswap64(tmp, &env->vfp.zregs[i].d[0], vq * 2); 209 memcpy(&buf[sve_zreg_offset(vq, i)], r, vq * 16); 210 } 211 212 for (i = 0; i < 17; ++i) { 213 r = sve_bswap64(tmp, r = &env->vfp.pregs[i].p[0], 214 DIV_ROUND_UP(vq * 2, 8)); 215 memcpy(&buf[sve_preg_offset(vq, i)], r, vq * 16 / 8); 216 } 217 218 fpr = cpu_to_dump32(s, vfp_get_fpsr(env)); 219 memcpy(&buf[sve_fpsr_offset(vq)], &fpr, sizeof(uint32_t)); 220 221 fpr = cpu_to_dump32(s, vfp_get_fpcr(env)); 222 memcpy(&buf[sve_fpcr_offset(vq)], &fpr, sizeof(uint32_t)); 223 224 ret = f(note, AARCH64_SVE_NOTE_SIZE(env), s); 225 g_free(note); 226 227 if (ret < 0) { 228 return -1; 229 } 230 231 return 0; 232 } 233 234 int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, 235 int cpuid, DumpState *s) 236 { 237 struct aarch64_note note; 238 ARMCPU *cpu = ARM_CPU(cs); 239 CPUARMState *env = &cpu->env; 240 uint64_t pstate, sp; 241 int ret, i; 242 243 aarch64_note_init(¬e, s, "CORE", 5, NT_PRSTATUS, sizeof(note.prstatus)); 244 245 note.prstatus.pr_pid = cpu_to_dump32(s, cpuid); 246 note.prstatus.pr_fpvalid = cpu_to_dump32(s, 1); 247 248 if (!is_a64(env)) { 249 aarch64_sync_32_to_64(env); 250 pstate = cpsr_read(env); 251 sp = 0; 252 } else { 253 pstate = pstate_read(env); 254 sp = env->xregs[31]; 255 } 256 257 for (i = 0; i < 31; ++i) { 258 note.prstatus.pr_reg.regs[i] = cpu_to_dump64(s, env->xregs[i]); 259 } 260 note.prstatus.pr_reg.sp = cpu_to_dump64(s, sp); 261 note.prstatus.pr_reg.pc = cpu_to_dump64(s, env->pc); 262 note.prstatus.pr_reg.pstate = cpu_to_dump64(s, pstate); 263 264 ret = f(¬e, AARCH64_PRSTATUS_NOTE_SIZE, s); 265 if (ret < 0) { 266 return -1; 267 } 268 269 ret = aarch64_write_elf64_prfpreg(f, env, cpuid, s); 270 if (ret) { 271 return ret; 272 } 273 274 if (cpu_isar_feature(aa64_sve, cpu)) { 275 ret = aarch64_write_elf64_sve(f, env, cpuid, s); 276 } 277 278 return ret; 279 } 280 281 /* struct pt_regs from arch/arm/include/asm/ptrace.h */ 282 struct arm_user_regs { 283 uint32_t regs[17]; 284 char pad[4]; 285 } QEMU_PACKED; 286 287 QEMU_BUILD_BUG_ON(sizeof(struct arm_user_regs) != 72); 288 289 /* struct elf_prstatus from include/uapi/linux/elfcore.h */ 290 struct arm_elf_prstatus { 291 char pad1[24]; /* 24 == offsetof(struct elf_prstatus, pr_pid) */ 292 uint32_t pr_pid; 293 char pad2[44]; /* 44 == offsetof(struct elf_prstatus, pr_reg) - 294 offsetof(struct elf_prstatus, pr_ppid) */ 295 struct arm_user_regs pr_reg; 296 uint32_t pr_fpvalid; 297 } QEMU_PACKED arm_elf_prstatus; 298 299 QEMU_BUILD_BUG_ON(sizeof(struct arm_elf_prstatus) != 148); 300 301 /* struct user_vfp from arch/arm/include/asm/user.h */ 302 struct arm_user_vfp_state { 303 uint64_t vregs[32]; 304 uint32_t fpscr; 305 } QEMU_PACKED; 306 307 QEMU_BUILD_BUG_ON(sizeof(struct arm_user_vfp_state) != 260); 308 309 struct arm_note { 310 Elf32_Nhdr hdr; 311 char name[8]; /* align_up(sizeof("LINUX"), 4) */ 312 union { 313 struct arm_elf_prstatus prstatus; 314 struct arm_user_vfp_state vfp; 315 }; 316 } QEMU_PACKED; 317 318 #define ARM_NOTE_HEADER_SIZE offsetof(struct arm_note, prstatus) 319 #define ARM_PRSTATUS_NOTE_SIZE \ 320 (ARM_NOTE_HEADER_SIZE + sizeof(struct arm_elf_prstatus)) 321 #define ARM_VFP_NOTE_SIZE \ 322 (ARM_NOTE_HEADER_SIZE + sizeof(struct arm_user_vfp_state)) 323 324 static void arm_note_init(struct arm_note *note, DumpState *s, 325 const char *name, Elf32_Word namesz, 326 Elf32_Word type, Elf32_Word descsz) 327 { 328 memset(note, 0, sizeof(*note)); 329 330 note->hdr.n_namesz = cpu_to_dump32(s, namesz); 331 note->hdr.n_descsz = cpu_to_dump32(s, descsz); 332 note->hdr.n_type = cpu_to_dump32(s, type); 333 334 memcpy(note->name, name, namesz); 335 } 336 337 static int arm_write_elf32_vfp(WriteCoreDumpFunction f, CPUARMState *env, 338 int cpuid, DumpState *s) 339 { 340 struct arm_note note; 341 int ret, i; 342 343 arm_note_init(¬e, s, "LINUX", 6, NT_ARM_VFP, sizeof(note.vfp)); 344 345 for (i = 0; i < 32; ++i) { 346 note.vfp.vregs[i] = cpu_to_dump64(s, *aa32_vfp_dreg(env, i)); 347 } 348 349 note.vfp.fpscr = cpu_to_dump32(s, vfp_get_fpscr(env)); 350 351 ret = f(¬e, ARM_VFP_NOTE_SIZE, s); 352 if (ret < 0) { 353 return -1; 354 } 355 356 return 0; 357 } 358 359 int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, 360 int cpuid, DumpState *s) 361 { 362 struct arm_note note; 363 ARMCPU *cpu = ARM_CPU(cs); 364 CPUARMState *env = &cpu->env; 365 int ret, i; 366 bool fpvalid = cpu_isar_feature(aa32_vfp_simd, cpu); 367 368 arm_note_init(¬e, s, "CORE", 5, NT_PRSTATUS, sizeof(note.prstatus)); 369 370 note.prstatus.pr_pid = cpu_to_dump32(s, cpuid); 371 note.prstatus.pr_fpvalid = cpu_to_dump32(s, fpvalid); 372 373 for (i = 0; i < 16; ++i) { 374 note.prstatus.pr_reg.regs[i] = cpu_to_dump32(s, env->regs[i]); 375 } 376 note.prstatus.pr_reg.regs[16] = cpu_to_dump32(s, cpsr_read(env)); 377 378 ret = f(¬e, ARM_PRSTATUS_NOTE_SIZE, s); 379 if (ret < 0) { 380 return -1; 381 } else if (fpvalid) { 382 return arm_write_elf32_vfp(f, env, cpuid, s); 383 } 384 385 return 0; 386 } 387 388 int cpu_get_dump_info(ArchDumpInfo *info, 389 const GuestPhysBlockList *guest_phys_blocks) 390 { 391 ARMCPU *cpu; 392 CPUARMState *env; 393 GuestPhysBlock *block; 394 hwaddr lowest_addr = ULLONG_MAX; 395 396 if (first_cpu == NULL) { 397 return -1; 398 } 399 400 cpu = ARM_CPU(first_cpu); 401 env = &cpu->env; 402 403 /* Take a best guess at the phys_base. If we get it wrong then crash 404 * will need '--machdep phys_offset=<phys-offset>' added to its command 405 * line, which isn't any worse than assuming we can use zero, but being 406 * wrong. This is the same algorithm the crash utility uses when 407 * attempting to guess as it loads non-dumpfile formatted files. 408 */ 409 QTAILQ_FOREACH(block, &guest_phys_blocks->head, next) { 410 if (block->target_start < lowest_addr) { 411 lowest_addr = block->target_start; 412 } 413 } 414 415 if (arm_feature(env, ARM_FEATURE_AARCH64)) { 416 info->d_machine = EM_AARCH64; 417 info->d_class = ELFCLASS64; 418 info->page_size = (1 << 16); /* aarch64 max pagesize */ 419 if (lowest_addr != ULLONG_MAX) { 420 info->phys_base = lowest_addr; 421 } 422 } else { 423 info->d_machine = EM_ARM; 424 info->d_class = ELFCLASS32; 425 info->page_size = (1 << 12); 426 if (lowest_addr < UINT_MAX) { 427 info->phys_base = lowest_addr; 428 } 429 } 430 431 /* We assume the relevant endianness is that of EL1; this is right 432 * for kernels, but might give the wrong answer if you're trying to 433 * dump a hypervisor that happens to be running an opposite-endian 434 * kernel. 435 */ 436 info->d_endian = (env->cp15.sctlr_el[1] & SCTLR_EE) != 0 437 ? ELFDATA2MSB : ELFDATA2LSB; 438 439 return 0; 440 } 441 442 ssize_t cpu_get_note_size(int class, int machine, int nr_cpus) 443 { 444 ARMCPU *cpu = ARM_CPU(first_cpu); 445 size_t note_size; 446 447 if (class == ELFCLASS64) { 448 note_size = AARCH64_PRSTATUS_NOTE_SIZE; 449 note_size += AARCH64_PRFPREG_NOTE_SIZE; 450 if (cpu_isar_feature(aa64_sve, cpu)) { 451 note_size += AARCH64_SVE_NOTE_SIZE(&cpu->env); 452 } 453 } else { 454 note_size = ARM_PRSTATUS_NOTE_SIZE; 455 if (cpu_isar_feature(aa32_vfp_simd, cpu)) { 456 note_size += ARM_VFP_NOTE_SIZE; 457 } 458 } 459 460 return note_size * nr_cpus; 461 } 462