1 /* 2 * Test Server 3 * 4 * Copyright IBM, Corp. 2011 5 * 6 * Authors: 7 * Anthony Liguori <aliguori@us.ibm.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 * 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qapi/error.h" 16 #include "system/qtest.h" 17 #include "system/runstate.h" 18 #include "chardev/char-fe.h" 19 #include "exec/ioport.h" 20 #include "exec/memory.h" 21 #include "exec/tswap.h" 22 #include "hw/qdev-core.h" 23 #include "hw/irq.h" 24 #include "hw/core/cpu.h" 25 #include "qemu/accel.h" 26 #include "system/cpu-timers.h" 27 #include "qemu/config-file.h" 28 #include "qemu/option.h" 29 #include "qemu/error-report.h" 30 #include "qemu/module.h" 31 #include "qemu/cutils.h" 32 #include "qom/object_interfaces.h" 33 34 #define MAX_IRQ 256 35 36 #define TYPE_QTEST "qtest" 37 38 OBJECT_DECLARE_SIMPLE_TYPE(QTest, QTEST) 39 40 struct QTest { 41 Object parent; 42 43 bool has_machine_link; 44 char *chr_name; 45 Chardev *chr; 46 CharBackend qtest_chr; 47 char *log; 48 }; 49 50 bool qtest_allowed; 51 52 static DeviceState *irq_intercept_dev; 53 static FILE *qtest_log_fp; 54 static QTest *qtest; 55 static GString *inbuf; 56 static int irq_levels[MAX_IRQ]; 57 static GTimer *timer; 58 static bool qtest_opened; 59 static void (*qtest_server_send)(void*, const char*); 60 static void *qtest_server_send_opaque; 61 62 #define FMT_timeval "%.06f" 63 64 /** 65 * DOC: QTest Protocol 66 * 67 * Line based protocol, request/response based. Server can send async messages 68 * so clients should always handle many async messages before the response 69 * comes in. 70 * 71 * Valid requests 72 * ^^^^^^^^^^^^^^ 73 * 74 * Clock management: 75 * """"""""""""""""" 76 * 77 * The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands 78 * let you adjust the value of the clock (monotonically). All the commands 79 * return the current value of the clock in nanoseconds. 80 * 81 * If the commands FAIL then time wasn't advanced which is likely 82 * because the machine was in a paused state or no timer events exist 83 * in the future. This will cause qtest to abort and the test will 84 * need to check its assumptions. 85 * 86 * .. code-block:: none 87 * 88 * > clock_step 89 * < OK VALUE 90 * 91 * Advance the clock to the next deadline. Useful when waiting for 92 * asynchronous events. 93 * 94 * .. code-block:: none 95 * 96 * > clock_step NS 97 * < OK VALUE 98 * 99 * Advance the clock by NS nanoseconds. 100 * 101 * .. code-block:: none 102 * 103 * > clock_set NS 104 * < OK VALUE 105 * 106 * Advance the clock to NS nanoseconds (do nothing if it's already past). 107 * 108 * PIO and memory access: 109 * """""""""""""""""""""" 110 * 111 * .. code-block:: none 112 * 113 * > outb ADDR VALUE 114 * < OK 115 * 116 * .. code-block:: none 117 * 118 * > outw ADDR VALUE 119 * < OK 120 * 121 * .. code-block:: none 122 * 123 * > outl ADDR VALUE 124 * < OK 125 * 126 * .. code-block:: none 127 * 128 * > inb ADDR 129 * < OK VALUE 130 * 131 * .. code-block:: none 132 * 133 * > inw ADDR 134 * < OK VALUE 135 * 136 * .. code-block:: none 137 * 138 * > inl ADDR 139 * < OK VALUE 140 * 141 * .. code-block:: none 142 * 143 * > writeb ADDR VALUE 144 * < OK 145 * 146 * .. code-block:: none 147 * 148 * > writew ADDR VALUE 149 * < OK 150 * 151 * .. code-block:: none 152 * 153 * > writel ADDR VALUE 154 * < OK 155 * 156 * .. code-block:: none 157 * 158 * > writeq ADDR VALUE 159 * < OK 160 * 161 * .. code-block:: none 162 * 163 * > readb ADDR 164 * < OK VALUE 165 * 166 * .. code-block:: none 167 * 168 * > readw ADDR 169 * < OK VALUE 170 * 171 * .. code-block:: none 172 * 173 * > readl ADDR 174 * < OK VALUE 175 * 176 * .. code-block:: none 177 * 178 * > readq ADDR 179 * < OK VALUE 180 * 181 * .. code-block:: none 182 * 183 * > read ADDR SIZE 184 * < OK DATA 185 * 186 * .. code-block:: none 187 * 188 * > write ADDR SIZE DATA 189 * < OK 190 * 191 * .. code-block:: none 192 * 193 * > b64read ADDR SIZE 194 * < OK B64_DATA 195 * 196 * .. code-block:: none 197 * 198 * > b64write ADDR SIZE B64_DATA 199 * < OK 200 * 201 * .. code-block:: none 202 * 203 * > memset ADDR SIZE VALUE 204 * < OK 205 * 206 * ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0. 207 * For 'memset' a zero size is permitted and does nothing. 208 * 209 * DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller 210 * than the expected size, the value will be zero filled at the end of the data 211 * sequence. 212 * 213 * B64_DATA is an arbitrarily long base64 encoded string. 214 * If the sizes do not match, the data will be truncated. 215 * 216 * IRQ management: 217 * """"""""""""""" 218 * 219 * .. code-block:: none 220 * 221 * > irq_intercept_in QOM-PATH 222 * < OK 223 * 224 * .. code-block:: none 225 * 226 * > irq_intercept_out QOM-PATH 227 * < OK 228 * 229 * Attach to the gpio-in (resp. gpio-out) pins exported by the device at 230 * QOM-PATH. When the pin is triggered, one of the following async messages 231 * will be printed to the qtest stream:: 232 * 233 * IRQ raise NUM 234 * IRQ lower NUM 235 * 236 * where NUM is an IRQ number. For the PC, interrupts can be intercepted 237 * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with 238 * NUM=0 even though it is remapped to GSI 2). 239 * 240 * Setting interrupt level: 241 * """""""""""""""""""""""" 242 * 243 * .. code-block:: none 244 * 245 * > set_irq_in QOM-PATH NAME NUM LEVEL 246 * < OK 247 * 248 * where NAME is the name of the irq/gpio list, NUM is an IRQ number and 249 * LEVEL is an signed integer IRQ level. 250 * 251 * Forcibly set the given interrupt pin to the given level. 252 * 253 */ 254 255 static int hex2nib(char ch) 256 { 257 if (ch >= '0' && ch <= '9') { 258 return ch - '0'; 259 } else if (ch >= 'a' && ch <= 'f') { 260 return 10 + (ch - 'a'); 261 } else if (ch >= 'A' && ch <= 'F') { 262 return 10 + (ch - 'A'); 263 } else { 264 return -1; 265 } 266 } 267 268 void qtest_send_prefix(CharBackend *chr) 269 { 270 if (!qtest_log_fp || !qtest_opened) { 271 return; 272 } 273 274 fprintf(qtest_log_fp, "[S +" FMT_timeval "] ", g_timer_elapsed(timer, NULL)); 275 } 276 277 static void G_GNUC_PRINTF(1, 2) qtest_log_send(const char *fmt, ...) 278 { 279 va_list ap; 280 281 if (!qtest_log_fp || !qtest_opened) { 282 return; 283 } 284 285 qtest_send_prefix(NULL); 286 287 va_start(ap, fmt); 288 vfprintf(qtest_log_fp, fmt, ap); 289 va_end(ap); 290 } 291 292 static void qtest_server_char_be_send(void *opaque, const char *str) 293 { 294 size_t len = strlen(str); 295 CharBackend* chr = (CharBackend *)opaque; 296 qemu_chr_fe_write_all(chr, (uint8_t *)str, len); 297 if (qtest_log_fp && qtest_opened) { 298 fprintf(qtest_log_fp, "%s", str); 299 } 300 } 301 302 static void qtest_send(CharBackend *chr, const char *str) 303 { 304 qtest_server_send(qtest_server_send_opaque, str); 305 } 306 307 void qtest_sendf(CharBackend *chr, const char *fmt, ...) 308 { 309 va_list ap; 310 gchar *buffer; 311 312 va_start(ap, fmt); 313 buffer = g_strdup_vprintf(fmt, ap); 314 qtest_send(chr, buffer); 315 g_free(buffer); 316 va_end(ap); 317 } 318 319 static void qtest_irq_handler(void *opaque, int n, int level) 320 { 321 qemu_irq old_irq = *(qemu_irq *)opaque; 322 qemu_set_irq(old_irq, level); 323 324 if (irq_levels[n] != level) { 325 CharBackend *chr = &qtest->qtest_chr; 326 irq_levels[n] = level; 327 qtest_send_prefix(chr); 328 qtest_sendf(chr, "IRQ %s %d\n", 329 level ? "raise" : "lower", n); 330 } 331 } 332 333 static bool (*process_command_cb)(CharBackend *chr, gchar **words); 334 335 void qtest_set_command_cb(bool (*pc_cb)(CharBackend *chr, gchar **words)) 336 { 337 assert(!process_command_cb); /* Switch to a list if we need more than one */ 338 339 process_command_cb = pc_cb; 340 } 341 342 static void qtest_install_gpio_out_intercept(DeviceState *dev, const char *name, int n) 343 { 344 qemu_irq *disconnected = g_new0(qemu_irq, 1); 345 qemu_irq icpt = qemu_allocate_irq(qtest_irq_handler, 346 disconnected, n); 347 348 *disconnected = qdev_intercept_gpio_out(dev, icpt, name, n); 349 } 350 351 static void qtest_process_command(CharBackend *chr, gchar **words) 352 { 353 const gchar *command; 354 355 g_assert(words); 356 357 command = words[0]; 358 359 if (qtest_log_fp) { 360 int i; 361 362 fprintf(qtest_log_fp, "[R +" FMT_timeval "]", g_timer_elapsed(timer, NULL)); 363 for (i = 0; words[i]; i++) { 364 fprintf(qtest_log_fp, " %s", words[i]); 365 } 366 fprintf(qtest_log_fp, "\n"); 367 } 368 369 g_assert(command); 370 if (strcmp(words[0], "irq_intercept_out") == 0 371 || strcmp(words[0], "irq_intercept_in") == 0) { 372 DeviceState *dev; 373 NamedGPIOList *ngl; 374 bool is_named; 375 bool is_outbound; 376 bool interception_succeeded = false; 377 378 g_assert(words[1]); 379 is_named = words[2] != NULL; 380 is_outbound = words[0][14] == 'o'; 381 dev = DEVICE(object_resolve_path(words[1], NULL)); 382 if (!dev) { 383 qtest_send_prefix(chr); 384 qtest_send(chr, "FAIL Unknown device\n"); 385 return; 386 } 387 388 if (is_named && !is_outbound) { 389 qtest_send_prefix(chr); 390 qtest_send(chr, "FAIL Interception of named in-GPIOs not yet supported\n"); 391 return; 392 } 393 394 if (irq_intercept_dev) { 395 qtest_send_prefix(chr); 396 if (irq_intercept_dev != dev) { 397 qtest_send(chr, "FAIL IRQ intercept already enabled\n"); 398 } else { 399 qtest_send(chr, "OK\n"); 400 } 401 return; 402 } 403 404 QLIST_FOREACH(ngl, &dev->gpios, node) { 405 /* We don't support inbound interception of named GPIOs yet */ 406 if (is_outbound) { 407 /* NULL is valid and matchable, for "unnamed GPIO" */ 408 if (g_strcmp0(ngl->name, words[2]) == 0) { 409 int i; 410 for (i = 0; i < ngl->num_out; ++i) { 411 qtest_install_gpio_out_intercept(dev, ngl->name, i); 412 } 413 interception_succeeded = true; 414 } 415 } else { 416 qemu_irq_intercept_in(ngl->in, qtest_irq_handler, 417 ngl->num_in); 418 interception_succeeded = true; 419 } 420 } 421 422 qtest_send_prefix(chr); 423 if (interception_succeeded) { 424 irq_intercept_dev = dev; 425 qtest_send(chr, "OK\n"); 426 } else { 427 qtest_send(chr, "FAIL No intercepts installed\n"); 428 } 429 } else if (strcmp(words[0], "set_irq_in") == 0) { 430 DeviceState *dev; 431 qemu_irq irq; 432 char *name; 433 int ret; 434 int num; 435 int level; 436 437 g_assert(words[1] && words[2] && words[3] && words[4]); 438 439 dev = DEVICE(object_resolve_path(words[1], NULL)); 440 if (!dev) { 441 qtest_send_prefix(chr); 442 qtest_send(chr, "FAIL Unknown device\n"); 443 return; 444 } 445 446 if (strcmp(words[2], "unnamed-gpio-in") == 0) { 447 name = NULL; 448 } else { 449 name = words[2]; 450 } 451 452 ret = qemu_strtoi(words[3], NULL, 0, &num); 453 g_assert(!ret); 454 ret = qemu_strtoi(words[4], NULL, 0, &level); 455 g_assert(!ret); 456 457 irq = qdev_get_gpio_in_named(dev, name, num); 458 459 qemu_set_irq(irq, level); 460 qtest_send_prefix(chr); 461 qtest_send(chr, "OK\n"); 462 } else if (strcmp(words[0], "outb") == 0 || 463 strcmp(words[0], "outw") == 0 || 464 strcmp(words[0], "outl") == 0) { 465 unsigned long addr; 466 unsigned long value; 467 int ret; 468 469 g_assert(words[1] && words[2]); 470 ret = qemu_strtoul(words[1], NULL, 0, &addr); 471 g_assert(ret == 0); 472 ret = qemu_strtoul(words[2], NULL, 0, &value); 473 g_assert(ret == 0); 474 g_assert(addr <= 0xffff); 475 476 if (words[0][3] == 'b') { 477 cpu_outb(addr, value); 478 } else if (words[0][3] == 'w') { 479 cpu_outw(addr, value); 480 } else if (words[0][3] == 'l') { 481 cpu_outl(addr, value); 482 } 483 qtest_send_prefix(chr); 484 qtest_send(chr, "OK\n"); 485 } else if (strcmp(words[0], "inb") == 0 || 486 strcmp(words[0], "inw") == 0 || 487 strcmp(words[0], "inl") == 0) { 488 unsigned long addr; 489 uint32_t value = -1U; 490 int ret; 491 492 g_assert(words[1]); 493 ret = qemu_strtoul(words[1], NULL, 0, &addr); 494 g_assert(ret == 0); 495 g_assert(addr <= 0xffff); 496 497 if (words[0][2] == 'b') { 498 value = cpu_inb(addr); 499 } else if (words[0][2] == 'w') { 500 value = cpu_inw(addr); 501 } else if (words[0][2] == 'l') { 502 value = cpu_inl(addr); 503 } 504 qtest_send_prefix(chr); 505 qtest_sendf(chr, "OK 0x%04x\n", value); 506 } else if (strcmp(words[0], "writeb") == 0 || 507 strcmp(words[0], "writew") == 0 || 508 strcmp(words[0], "writel") == 0 || 509 strcmp(words[0], "writeq") == 0) { 510 uint64_t addr; 511 uint64_t value; 512 int ret; 513 514 g_assert(words[1] && words[2]); 515 ret = qemu_strtou64(words[1], NULL, 0, &addr); 516 g_assert(ret == 0); 517 ret = qemu_strtou64(words[2], NULL, 0, &value); 518 g_assert(ret == 0); 519 520 if (words[0][5] == 'b') { 521 uint8_t data = value; 522 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, 523 &data, 1); 524 } else if (words[0][5] == 'w') { 525 uint16_t data = value; 526 tswap16s(&data); 527 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, 528 &data, 2); 529 } else if (words[0][5] == 'l') { 530 uint32_t data = value; 531 tswap32s(&data); 532 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, 533 &data, 4); 534 } else if (words[0][5] == 'q') { 535 uint64_t data = value; 536 tswap64s(&data); 537 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, 538 &data, 8); 539 } 540 qtest_send_prefix(chr); 541 qtest_send(chr, "OK\n"); 542 } else if (strcmp(words[0], "readb") == 0 || 543 strcmp(words[0], "readw") == 0 || 544 strcmp(words[0], "readl") == 0 || 545 strcmp(words[0], "readq") == 0) { 546 uint64_t addr; 547 uint64_t value = UINT64_C(-1); 548 int ret; 549 550 g_assert(words[1]); 551 ret = qemu_strtou64(words[1], NULL, 0, &addr); 552 g_assert(ret == 0); 553 554 if (words[0][4] == 'b') { 555 uint8_t data; 556 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, 557 &data, 1); 558 value = data; 559 } else if (words[0][4] == 'w') { 560 uint16_t data; 561 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, 562 &data, 2); 563 value = tswap16(data); 564 } else if (words[0][4] == 'l') { 565 uint32_t data; 566 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, 567 &data, 4); 568 value = tswap32(data); 569 } else if (words[0][4] == 'q') { 570 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, 571 &value, 8); 572 tswap64s(&value); 573 } 574 qtest_send_prefix(chr); 575 qtest_sendf(chr, "OK 0x%016" PRIx64 "\n", value); 576 } else if (strcmp(words[0], "read") == 0) { 577 g_autoptr(GString) enc = NULL; 578 uint64_t addr, len; 579 uint8_t *data; 580 int ret; 581 582 g_assert(words[1] && words[2]); 583 ret = qemu_strtou64(words[1], NULL, 0, &addr); 584 g_assert(ret == 0); 585 ret = qemu_strtou64(words[2], NULL, 0, &len); 586 g_assert(ret == 0); 587 /* We'd send garbage to libqtest if len is 0 */ 588 g_assert(len); 589 590 data = g_malloc(len); 591 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, 592 len); 593 594 enc = qemu_hexdump_line(NULL, data, len, 0, 0); 595 596 qtest_send_prefix(chr); 597 qtest_sendf(chr, "OK 0x%s\n", enc->str); 598 599 g_free(data); 600 } else if (strcmp(words[0], "b64read") == 0) { 601 uint64_t addr, len; 602 uint8_t *data; 603 gchar *b64_data; 604 int ret; 605 606 g_assert(words[1] && words[2]); 607 ret = qemu_strtou64(words[1], NULL, 0, &addr); 608 g_assert(ret == 0); 609 ret = qemu_strtou64(words[2], NULL, 0, &len); 610 g_assert(ret == 0); 611 612 data = g_malloc(len); 613 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, 614 len); 615 b64_data = g_base64_encode(data, len); 616 qtest_send_prefix(chr); 617 qtest_sendf(chr, "OK %s\n", b64_data); 618 619 g_free(data); 620 g_free(b64_data); 621 } else if (strcmp(words[0], "write") == 0) { 622 uint64_t addr, len, i; 623 uint8_t *data; 624 size_t data_len; 625 int ret; 626 627 g_assert(words[1] && words[2] && words[3]); 628 ret = qemu_strtou64(words[1], NULL, 0, &addr); 629 g_assert(ret == 0); 630 ret = qemu_strtou64(words[2], NULL, 0, &len); 631 g_assert(ret == 0); 632 633 data_len = strlen(words[3]); 634 if (data_len < 3) { 635 qtest_send(chr, "ERR invalid argument size\n"); 636 return; 637 } 638 639 data = g_malloc(len); 640 for (i = 0; i < len; i++) { 641 if ((i * 2 + 4) <= data_len) { 642 data[i] = hex2nib(words[3][i * 2 + 2]) << 4; 643 data[i] |= hex2nib(words[3][i * 2 + 3]); 644 } else { 645 data[i] = 0; 646 } 647 } 648 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, 649 len); 650 g_free(data); 651 652 qtest_send_prefix(chr); 653 qtest_send(chr, "OK\n"); 654 } else if (strcmp(words[0], "memset") == 0) { 655 uint64_t addr, len; 656 uint8_t *data; 657 unsigned long pattern; 658 int ret; 659 660 g_assert(words[1] && words[2] && words[3]); 661 ret = qemu_strtou64(words[1], NULL, 0, &addr); 662 g_assert(ret == 0); 663 ret = qemu_strtou64(words[2], NULL, 0, &len); 664 g_assert(ret == 0); 665 ret = qemu_strtoul(words[3], NULL, 0, &pattern); 666 g_assert(ret == 0); 667 668 if (len) { 669 data = g_malloc(len); 670 memset(data, pattern, len); 671 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, 672 data, len); 673 g_free(data); 674 } 675 676 qtest_send_prefix(chr); 677 qtest_send(chr, "OK\n"); 678 } else if (strcmp(words[0], "b64write") == 0) { 679 uint64_t addr, len; 680 uint8_t *data; 681 size_t data_len; 682 gsize out_len; 683 int ret; 684 685 g_assert(words[1] && words[2] && words[3]); 686 ret = qemu_strtou64(words[1], NULL, 0, &addr); 687 g_assert(ret == 0); 688 ret = qemu_strtou64(words[2], NULL, 0, &len); 689 g_assert(ret == 0); 690 691 data_len = strlen(words[3]); 692 if (data_len < 3) { 693 qtest_send(chr, "ERR invalid argument size\n"); 694 return; 695 } 696 697 data = g_base64_decode_inplace(words[3], &out_len); 698 if (out_len != len) { 699 qtest_log_send("b64write: data length mismatch (told %"PRIu64", " 700 "found %zu)\n", 701 len, out_len); 702 out_len = MIN(out_len, len); 703 } 704 705 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, 706 len); 707 708 qtest_send_prefix(chr); 709 qtest_send(chr, "OK\n"); 710 } else if (strcmp(words[0], "endianness") == 0) { 711 qtest_send_prefix(chr); 712 if (target_words_bigendian()) { 713 qtest_sendf(chr, "OK big\n"); 714 } else { 715 qtest_sendf(chr, "OK little\n"); 716 } 717 } else if (qtest_enabled() && strcmp(words[0], "clock_step") == 0) { 718 int64_t old_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 719 int64_t ns, new_ns; 720 721 if (words[1]) { 722 int ret = qemu_strtoi64(words[1], NULL, 0, &ns); 723 g_assert(ret == 0); 724 } else { 725 ns = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL, 726 QEMU_TIMER_ATTR_ALL); 727 } 728 new_ns = qemu_clock_advance_virtual_time(old_ns + ns); 729 qtest_send_prefix(chr); 730 qtest_sendf(chr, "%s %"PRIi64"\n", 731 new_ns > old_ns ? "OK" : "FAIL", new_ns); 732 } else if (strcmp(words[0], "module_load") == 0) { 733 Error *local_err = NULL; 734 int rv; 735 g_assert(words[1] && words[2]); 736 737 qtest_send_prefix(chr); 738 rv = module_load(words[1], words[2], &local_err); 739 if (rv > 0) { 740 qtest_sendf(chr, "OK\n"); 741 } else { 742 if (rv < 0) { 743 error_report_err(local_err); 744 } 745 qtest_sendf(chr, "FAIL\n"); 746 } 747 } else if (qtest_enabled() && strcmp(words[0], "clock_set") == 0) { 748 int64_t ns, new_ns; 749 int ret; 750 751 g_assert(words[1]); 752 ret = qemu_strtoi64(words[1], NULL, 0, &ns); 753 g_assert(ret == 0); 754 new_ns = qemu_clock_advance_virtual_time(ns); 755 qtest_send_prefix(chr); 756 qtest_sendf(chr, "%s %"PRIi64"\n", 757 new_ns == ns ? "OK" : "FAIL", new_ns); 758 } else if (process_command_cb && process_command_cb(chr, words)) { 759 /* Command got consumed by the callback handler */ 760 } else { 761 qtest_send_prefix(chr); 762 qtest_sendf(chr, "FAIL Unknown command '%s'\n", words[0]); 763 } 764 } 765 766 static void qtest_process_inbuf(CharBackend *chr, GString *inbuf) 767 { 768 char *end; 769 770 while ((end = strchr(inbuf->str, '\n')) != NULL) { 771 size_t offset; 772 GString *cmd; 773 gchar **words; 774 775 offset = end - inbuf->str; 776 777 cmd = g_string_new_len(inbuf->str, offset); 778 g_string_erase(inbuf, 0, offset + 1); 779 780 words = g_strsplit(cmd->str, " ", 0); 781 qtest_process_command(chr, words); 782 g_strfreev(words); 783 784 g_string_free(cmd, TRUE); 785 } 786 } 787 788 static void qtest_read(void *opaque, const uint8_t *buf, int size) 789 { 790 CharBackend *chr = opaque; 791 792 g_string_append_len(inbuf, (const gchar *)buf, size); 793 qtest_process_inbuf(chr, inbuf); 794 } 795 796 static int qtest_can_read(void *opaque) 797 { 798 return 1024; 799 } 800 801 static void qtest_event(void *opaque, QEMUChrEvent event) 802 { 803 int i; 804 805 switch (event) { 806 case CHR_EVENT_OPENED: 807 /* 808 * We used to call qemu_system_reset() here, hoping we could 809 * use the same process for multiple tests that way. Never 810 * used. Injects an extra reset even when it's not used, and 811 * that can mess up tests, e.g. -boot once. 812 */ 813 for (i = 0; i < ARRAY_SIZE(irq_levels); i++) { 814 irq_levels[i] = 0; 815 } 816 817 g_clear_pointer(&timer, g_timer_destroy); 818 timer = g_timer_new(); 819 qtest_opened = true; 820 if (qtest_log_fp) { 821 fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n", g_timer_elapsed(timer, NULL)); 822 } 823 break; 824 case CHR_EVENT_CLOSED: 825 qtest_opened = false; 826 if (qtest_log_fp) { 827 fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n", g_timer_elapsed(timer, NULL)); 828 } 829 g_clear_pointer(&timer, g_timer_destroy); 830 break; 831 default: 832 break; 833 } 834 } 835 836 void qtest_server_init(const char *qtest_chrdev, const char *qtest_log, Error **errp) 837 { 838 ERRP_GUARD(); 839 Chardev *chr; 840 Object *qobj; 841 842 chr = qemu_chr_new("qtest", qtest_chrdev, NULL); 843 if (chr == NULL) { 844 error_setg(errp, "Failed to initialize device for qtest: \"%s\"", 845 qtest_chrdev); 846 return; 847 } 848 849 qobj = object_new(TYPE_QTEST); 850 object_property_set_str(qobj, "chardev", chr->label, &error_abort); 851 if (qtest_log) { 852 object_property_set_str(qobj, "log", qtest_log, &error_abort); 853 } 854 object_property_add_child(qdev_get_machine(), "qtest", qobj); 855 user_creatable_complete(USER_CREATABLE(qobj), errp); 856 if (*errp) { 857 object_unparent(qobj); 858 } 859 object_unref(OBJECT(chr)); 860 object_unref(qobj); 861 } 862 863 static bool qtest_server_start(QTest *q, Error **errp) 864 { 865 Chardev *chr = q->chr; 866 const char *qtest_log = q->log; 867 868 if (qtest_log) { 869 if (strcmp(qtest_log, "none") != 0) { 870 qtest_log_fp = fopen(qtest_log, "w+"); 871 } 872 } else { 873 qtest_log_fp = stderr; 874 } 875 876 if (!qemu_chr_fe_init(&q->qtest_chr, chr, errp)) { 877 return false; 878 } 879 qemu_chr_fe_set_handlers(&q->qtest_chr, qtest_can_read, qtest_read, 880 qtest_event, NULL, &q->qtest_chr, NULL, true); 881 qemu_chr_fe_set_echo(&q->qtest_chr, true); 882 883 inbuf = g_string_new(""); 884 885 if (!qtest_server_send) { 886 qtest_server_set_send_handler(qtest_server_char_be_send, &q->qtest_chr); 887 } 888 qtest = q; 889 return true; 890 } 891 892 void qtest_server_set_send_handler(void (*send)(void*, const char*), 893 void *opaque) 894 { 895 qtest_server_send = send; 896 qtest_server_send_opaque = opaque; 897 } 898 899 bool qtest_driver(void) 900 { 901 return qtest && qtest->qtest_chr.chr != NULL; 902 } 903 904 void qtest_server_inproc_recv(void *dummy, const char *buf) 905 { 906 static GString *gstr; 907 if (!gstr) { 908 gstr = g_string_new(NULL); 909 } 910 g_string_append(gstr, buf); 911 if (gstr->str[gstr->len - 1] == '\n') { 912 qtest_process_inbuf(NULL, gstr); 913 g_string_truncate(gstr, 0); 914 } 915 } 916 917 static void qtest_complete(UserCreatable *uc, Error **errp) 918 { 919 QTest *q = QTEST(uc); 920 if (qtest) { 921 error_setg(errp, "Only one instance of qtest can be created"); 922 return; 923 } 924 if (!q->chr_name) { 925 error_setg(errp, "No backend specified"); 926 return; 927 } 928 929 if (OBJECT(uc)->parent != qdev_get_machine()) { 930 q->has_machine_link = true; 931 object_property_add_const_link(qdev_get_machine(), "qtest", OBJECT(uc)); 932 } else { 933 /* -qtest was used. */ 934 } 935 936 qtest_server_start(q, errp); 937 } 938 939 static void qtest_unparent(Object *obj) 940 { 941 QTest *q = QTEST(obj); 942 943 if (qtest == q) { 944 qemu_chr_fe_disconnect(&q->qtest_chr); 945 assert(!qtest_opened); 946 qemu_chr_fe_deinit(&q->qtest_chr, false); 947 if (qtest_log_fp) { 948 fclose(qtest_log_fp); 949 qtest_log_fp = NULL; 950 } 951 qtest = NULL; 952 } 953 954 if (q->has_machine_link) { 955 object_property_del(qdev_get_machine(), "qtest"); 956 q->has_machine_link = false; 957 } 958 } 959 960 static void qtest_set_log(Object *obj, const char *value, Error **errp) 961 { 962 QTest *q = QTEST(obj); 963 964 if (qtest == q) { 965 error_setg(errp, "Property 'log' can not be set now"); 966 } else { 967 g_free(q->log); 968 q->log = g_strdup(value); 969 } 970 } 971 972 static char *qtest_get_log(Object *obj, Error **errp) 973 { 974 QTest *q = QTEST(obj); 975 976 return g_strdup(q->log); 977 } 978 979 static void qtest_set_chardev(Object *obj, const char *value, Error **errp) 980 { 981 QTest *q = QTEST(obj); 982 Chardev *chr; 983 984 if (qtest == q) { 985 error_setg(errp, "Property 'chardev' can not be set now"); 986 return; 987 } 988 989 chr = qemu_chr_find(value); 990 if (!chr) { 991 error_setg(errp, "Cannot find character device '%s'", value); 992 return; 993 } 994 995 g_free(q->chr_name); 996 q->chr_name = g_strdup(value); 997 998 if (q->chr) { 999 object_unref(q->chr); 1000 } 1001 q->chr = chr; 1002 object_ref(chr); 1003 } 1004 1005 static char *qtest_get_chardev(Object *obj, Error **errp) 1006 { 1007 QTest *q = QTEST(obj); 1008 1009 return g_strdup(q->chr_name); 1010 } 1011 1012 static void qtest_class_init(ObjectClass *oc, void *data) 1013 { 1014 UserCreatableClass *ucc = USER_CREATABLE_CLASS(oc); 1015 1016 oc->unparent = qtest_unparent; 1017 ucc->complete = qtest_complete; 1018 1019 object_class_property_add_str(oc, "chardev", 1020 qtest_get_chardev, qtest_set_chardev); 1021 object_class_property_add_str(oc, "log", 1022 qtest_get_log, qtest_set_log); 1023 } 1024 1025 static const TypeInfo qtest_info = { 1026 .name = TYPE_QTEST, 1027 .parent = TYPE_OBJECT, 1028 .class_init = qtest_class_init, 1029 .instance_size = sizeof(QTest), 1030 .interfaces = (InterfaceInfo[]) { 1031 { TYPE_USER_CREATABLE }, 1032 { } 1033 } 1034 }; 1035 1036 static void register_types(void) 1037 { 1038 type_register_static(&qtest_info); 1039 } 1040 1041 type_init(register_types); 1042