1b061808dSAlexander Graf /* 2b061808dSAlexander Graf * ARM Power State and Coordination Interface (PSCI) header 3b061808dSAlexander Graf * 4b061808dSAlexander Graf * This header holds common PSCI defines and macros shared 5b061808dSAlexander Graf * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space. 6b061808dSAlexander Graf * 7b061808dSAlexander Graf * Copyright (C) 2014 Linaro Ltd. 8b061808dSAlexander Graf * Author: Anup Patel <anup.patel@linaro.org> 9b061808dSAlexander Graf */ 10b061808dSAlexander Graf 11b061808dSAlexander Graf #ifndef _LINUX_PSCI_H 12b061808dSAlexander Graf #define _LINUX_PSCI_H 13b061808dSAlexander Graf 14b061808dSAlexander Graf /* 15b061808dSAlexander Graf * PSCI v0.1 interface 16b061808dSAlexander Graf * 17b061808dSAlexander Graf * The PSCI v0.1 function numbers are implementation defined. 18b061808dSAlexander Graf * 19b061808dSAlexander Graf * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED, 20b061808dSAlexander Graf * INVALID_PARAMS, and DENIED defined below are applicable 21b061808dSAlexander Graf * to PSCI v0.1. 22b061808dSAlexander Graf */ 23b061808dSAlexander Graf 24b061808dSAlexander Graf /* PSCI v0.2 interface */ 25b061808dSAlexander Graf #define PSCI_0_2_FN_BASE 0x84000000 26b061808dSAlexander Graf #define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) 27b061808dSAlexander Graf #define PSCI_0_2_64BIT 0x40000000 28b061808dSAlexander Graf #define PSCI_0_2_FN64_BASE \ 29b061808dSAlexander Graf (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) 30b061808dSAlexander Graf #define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) 31b061808dSAlexander Graf 32b061808dSAlexander Graf #define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) 33b061808dSAlexander Graf #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1) 34b061808dSAlexander Graf #define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2) 35b061808dSAlexander Graf #define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) 36b061808dSAlexander Graf #define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) 37b061808dSAlexander Graf #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5) 38b061808dSAlexander Graf #define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) 39b061808dSAlexander Graf #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7) 40b061808dSAlexander Graf #define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) 41b061808dSAlexander Graf #define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) 42b061808dSAlexander Graf 43b061808dSAlexander Graf #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) 44b061808dSAlexander Graf #define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) 45b061808dSAlexander Graf #define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) 46b061808dSAlexander Graf #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) 47b061808dSAlexander Graf #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) 48b061808dSAlexander Graf 49*fff02bc0SPaolo Bonzini #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) 50*fff02bc0SPaolo Bonzini #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) 51*fff02bc0SPaolo Bonzini 52*fff02bc0SPaolo Bonzini #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) 53*fff02bc0SPaolo Bonzini 54b061808dSAlexander Graf /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ 55b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff 56b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_ID_SHIFT 0 57b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 58b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_TYPE_MASK \ 59b061808dSAlexander Graf (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) 60b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 61b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_AFFL_MASK \ 62b061808dSAlexander Graf (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) 63b061808dSAlexander Graf 64*fff02bc0SPaolo Bonzini /* PSCI extended power state encoding for CPU_SUSPEND function */ 65*fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_ID_MASK 0xfffffff 66*fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 0 67*fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30 68*fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK \ 69*fff02bc0SPaolo Bonzini (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT) 70*fff02bc0SPaolo Bonzini 71b061808dSAlexander Graf /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */ 72b061808dSAlexander Graf #define PSCI_0_2_AFFINITY_LEVEL_ON 0 73b061808dSAlexander Graf #define PSCI_0_2_AFFINITY_LEVEL_OFF 1 74b061808dSAlexander Graf #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2 75b061808dSAlexander Graf 76b061808dSAlexander Graf /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */ 77b061808dSAlexander Graf #define PSCI_0_2_TOS_UP_MIGRATE 0 78b061808dSAlexander Graf #define PSCI_0_2_TOS_UP_NO_MIGRATE 1 79b061808dSAlexander Graf #define PSCI_0_2_TOS_MP 2 80b061808dSAlexander Graf 81b061808dSAlexander Graf /* PSCI version decoding (independent of PSCI version) */ 82b061808dSAlexander Graf #define PSCI_VERSION_MAJOR_SHIFT 16 83b061808dSAlexander Graf #define PSCI_VERSION_MINOR_MASK \ 84b061808dSAlexander Graf ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1) 85b061808dSAlexander Graf #define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK 86b061808dSAlexander Graf #define PSCI_VERSION_MAJOR(ver) \ 87b061808dSAlexander Graf (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) 88b061808dSAlexander Graf #define PSCI_VERSION_MINOR(ver) \ 89b061808dSAlexander Graf ((ver) & PSCI_VERSION_MINOR_MASK) 90b061808dSAlexander Graf 91*fff02bc0SPaolo Bonzini /* PSCI features decoding (>=1.0) */ 92*fff02bc0SPaolo Bonzini #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 1 93*fff02bc0SPaolo Bonzini #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK \ 94*fff02bc0SPaolo Bonzini (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT) 95*fff02bc0SPaolo Bonzini 96b061808dSAlexander Graf /* PSCI return values (inclusive of all PSCI versions) */ 97b061808dSAlexander Graf #define PSCI_RET_SUCCESS 0 98b061808dSAlexander Graf #define PSCI_RET_NOT_SUPPORTED -1 99b061808dSAlexander Graf #define PSCI_RET_INVALID_PARAMS -2 100b061808dSAlexander Graf #define PSCI_RET_DENIED -3 101b061808dSAlexander Graf #define PSCI_RET_ALREADY_ON -4 102b061808dSAlexander Graf #define PSCI_RET_ON_PENDING -5 103b061808dSAlexander Graf #define PSCI_RET_INTERNAL_FAILURE -6 104b061808dSAlexander Graf #define PSCI_RET_NOT_PRESENT -7 105b061808dSAlexander Graf #define PSCI_RET_DISABLED -8 106*fff02bc0SPaolo Bonzini #define PSCI_RET_INVALID_ADDRESS -9 107b061808dSAlexander Graf 108b061808dSAlexander Graf #endif /* _LINUX_PSCI_H */ 109