xref: /qemu/subprojects/libvduse/linux-headers/linux/iommufd.h (revision 7be29f2f1a3f5b037d27eedbd5df9f441e8c8c16)
1f7cbfa71SZhenzhong Duan /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2f7cbfa71SZhenzhong Duan /* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES.
3f7cbfa71SZhenzhong Duan  */
4f7cbfa71SZhenzhong Duan #ifndef _IOMMUFD_H
5f7cbfa71SZhenzhong Duan #define _IOMMUFD_H
6f7cbfa71SZhenzhong Duan 
7f7cbfa71SZhenzhong Duan #include <linux/ioctl.h>
80d2eeef7SBibo Mao #include <linux/types.h>
9f7cbfa71SZhenzhong Duan 
10f7cbfa71SZhenzhong Duan #define IOMMUFD_TYPE (';')
11f7cbfa71SZhenzhong Duan 
12f7cbfa71SZhenzhong Duan /**
13f7cbfa71SZhenzhong Duan  * DOC: General ioctl format
14f7cbfa71SZhenzhong Duan  *
15f7cbfa71SZhenzhong Duan  * The ioctl interface follows a general format to allow for extensibility. Each
16f7cbfa71SZhenzhong Duan  * ioctl is passed in a structure pointer as the argument providing the size of
17f7cbfa71SZhenzhong Duan  * the structure in the first u32. The kernel checks that any structure space
18f7cbfa71SZhenzhong Duan  * beyond what it understands is 0. This allows userspace to use the backward
19f7cbfa71SZhenzhong Duan  * compatible portion while consistently using the newer, larger, structures.
20f7cbfa71SZhenzhong Duan  *
21f7cbfa71SZhenzhong Duan  * ioctls use a standard meaning for common errnos:
22f7cbfa71SZhenzhong Duan  *
23f7cbfa71SZhenzhong Duan  *  - ENOTTY: The IOCTL number itself is not supported at all
24f7cbfa71SZhenzhong Duan  *  - E2BIG: The IOCTL number is supported, but the provided structure has
25f7cbfa71SZhenzhong Duan  *    non-zero in a part the kernel does not understand.
26f7cbfa71SZhenzhong Duan  *  - EOPNOTSUPP: The IOCTL number is supported, and the structure is
27f7cbfa71SZhenzhong Duan  *    understood, however a known field has a value the kernel does not
28f7cbfa71SZhenzhong Duan  *    understand or support.
29f7cbfa71SZhenzhong Duan  *  - EINVAL: Everything about the IOCTL was understood, but a field is not
30f7cbfa71SZhenzhong Duan  *    correct.
31f7cbfa71SZhenzhong Duan  *  - ENOENT: An ID or IOVA provided does not exist.
32f7cbfa71SZhenzhong Duan  *  - ENOMEM: Out of memory.
33f7cbfa71SZhenzhong Duan  *  - EOVERFLOW: Mathematics overflowed.
34f7cbfa71SZhenzhong Duan  *
35f7cbfa71SZhenzhong Duan  * As well as additional errnos, within specific ioctls.
36f7cbfa71SZhenzhong Duan  */
37f7cbfa71SZhenzhong Duan enum {
38f7cbfa71SZhenzhong Duan 	IOMMUFD_CMD_BASE = 0x80,
39f7cbfa71SZhenzhong Duan 	IOMMUFD_CMD_DESTROY = IOMMUFD_CMD_BASE,
400d2eeef7SBibo Mao 	IOMMUFD_CMD_IOAS_ALLOC = 0x81,
410d2eeef7SBibo Mao 	IOMMUFD_CMD_IOAS_ALLOW_IOVAS = 0x82,
420d2eeef7SBibo Mao 	IOMMUFD_CMD_IOAS_COPY = 0x83,
430d2eeef7SBibo Mao 	IOMMUFD_CMD_IOAS_IOVA_RANGES = 0x84,
440d2eeef7SBibo Mao 	IOMMUFD_CMD_IOAS_MAP = 0x85,
450d2eeef7SBibo Mao 	IOMMUFD_CMD_IOAS_UNMAP = 0x86,
460d2eeef7SBibo Mao 	IOMMUFD_CMD_OPTION = 0x87,
470d2eeef7SBibo Mao 	IOMMUFD_CMD_VFIO_IOAS = 0x88,
480d2eeef7SBibo Mao 	IOMMUFD_CMD_HWPT_ALLOC = 0x89,
490d2eeef7SBibo Mao 	IOMMUFD_CMD_GET_HW_INFO = 0x8a,
500d2eeef7SBibo Mao 	IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING = 0x8b,
510d2eeef7SBibo Mao 	IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP = 0x8c,
520d2eeef7SBibo Mao 	IOMMUFD_CMD_HWPT_INVALIDATE = 0x8d,
530d2eeef7SBibo Mao 	IOMMUFD_CMD_FAULT_QUEUE_ALLOC = 0x8e,
5444fe383cSHendrik Brueckner 	IOMMUFD_CMD_IOAS_MAP_FILE = 0x8f,
5544fe383cSHendrik Brueckner 	IOMMUFD_CMD_VIOMMU_ALLOC = 0x90,
5644fe383cSHendrik Brueckner 	IOMMUFD_CMD_VDEVICE_ALLOC = 0x91,
5744fe383cSHendrik Brueckner 	IOMMUFD_CMD_IOAS_CHANGE_PROCESS = 0x92,
58*1cab5a02SRorie Reyes 	IOMMUFD_CMD_VEVENTQ_ALLOC = 0x93,
59f7cbfa71SZhenzhong Duan };
60f7cbfa71SZhenzhong Duan 
61f7cbfa71SZhenzhong Duan /**
62f7cbfa71SZhenzhong Duan  * struct iommu_destroy - ioctl(IOMMU_DESTROY)
63f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_destroy)
64f7cbfa71SZhenzhong Duan  * @id: iommufd object ID to destroy. Can be any destroyable object type.
65f7cbfa71SZhenzhong Duan  *
66f7cbfa71SZhenzhong Duan  * Destroy any object held within iommufd.
67f7cbfa71SZhenzhong Duan  */
68f7cbfa71SZhenzhong Duan struct iommu_destroy {
69f7cbfa71SZhenzhong Duan 	__u32 size;
70f7cbfa71SZhenzhong Duan 	__u32 id;
71f7cbfa71SZhenzhong Duan };
72f7cbfa71SZhenzhong Duan #define IOMMU_DESTROY _IO(IOMMUFD_TYPE, IOMMUFD_CMD_DESTROY)
73f7cbfa71SZhenzhong Duan 
74f7cbfa71SZhenzhong Duan /**
75f7cbfa71SZhenzhong Duan  * struct iommu_ioas_alloc - ioctl(IOMMU_IOAS_ALLOC)
76f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_ioas_alloc)
77f7cbfa71SZhenzhong Duan  * @flags: Must be 0
78f7cbfa71SZhenzhong Duan  * @out_ioas_id: Output IOAS ID for the allocated object
79f7cbfa71SZhenzhong Duan  *
80f7cbfa71SZhenzhong Duan  * Allocate an IO Address Space (IOAS) which holds an IO Virtual Address (IOVA)
81f7cbfa71SZhenzhong Duan  * to memory mapping.
82f7cbfa71SZhenzhong Duan  */
83f7cbfa71SZhenzhong Duan struct iommu_ioas_alloc {
84f7cbfa71SZhenzhong Duan 	__u32 size;
85f7cbfa71SZhenzhong Duan 	__u32 flags;
86f7cbfa71SZhenzhong Duan 	__u32 out_ioas_id;
87f7cbfa71SZhenzhong Duan };
88f7cbfa71SZhenzhong Duan #define IOMMU_IOAS_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_ALLOC)
89f7cbfa71SZhenzhong Duan 
90f7cbfa71SZhenzhong Duan /**
91f7cbfa71SZhenzhong Duan  * struct iommu_iova_range - ioctl(IOMMU_IOVA_RANGE)
92f7cbfa71SZhenzhong Duan  * @start: First IOVA
93f7cbfa71SZhenzhong Duan  * @last: Inclusive last IOVA
94f7cbfa71SZhenzhong Duan  *
95f7cbfa71SZhenzhong Duan  * An interval in IOVA space.
96f7cbfa71SZhenzhong Duan  */
97f7cbfa71SZhenzhong Duan struct iommu_iova_range {
98f7cbfa71SZhenzhong Duan 	__aligned_u64 start;
99f7cbfa71SZhenzhong Duan 	__aligned_u64 last;
100f7cbfa71SZhenzhong Duan };
101f7cbfa71SZhenzhong Duan 
102f7cbfa71SZhenzhong Duan /**
103f7cbfa71SZhenzhong Duan  * struct iommu_ioas_iova_ranges - ioctl(IOMMU_IOAS_IOVA_RANGES)
104f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_ioas_iova_ranges)
105f7cbfa71SZhenzhong Duan  * @ioas_id: IOAS ID to read ranges from
106f7cbfa71SZhenzhong Duan  * @num_iovas: Input/Output total number of ranges in the IOAS
107f7cbfa71SZhenzhong Duan  * @__reserved: Must be 0
108f7cbfa71SZhenzhong Duan  * @allowed_iovas: Pointer to the output array of struct iommu_iova_range
109f7cbfa71SZhenzhong Duan  * @out_iova_alignment: Minimum alignment required for mapping IOVA
110f7cbfa71SZhenzhong Duan  *
111f7cbfa71SZhenzhong Duan  * Query an IOAS for ranges of allowed IOVAs. Mapping IOVA outside these ranges
112f7cbfa71SZhenzhong Duan  * is not allowed. num_iovas will be set to the total number of iovas and
113f7cbfa71SZhenzhong Duan  * the allowed_iovas[] will be filled in as space permits.
114f7cbfa71SZhenzhong Duan  *
115f7cbfa71SZhenzhong Duan  * The allowed ranges are dependent on the HW path the DMA operation takes, and
116f7cbfa71SZhenzhong Duan  * can change during the lifetime of the IOAS. A fresh empty IOAS will have a
117f7cbfa71SZhenzhong Duan  * full range, and each attached device will narrow the ranges based on that
118f7cbfa71SZhenzhong Duan  * device's HW restrictions. Detaching a device can widen the ranges. Userspace
119f7cbfa71SZhenzhong Duan  * should query ranges after every attach/detach to know what IOVAs are valid
120f7cbfa71SZhenzhong Duan  * for mapping.
121f7cbfa71SZhenzhong Duan  *
122f7cbfa71SZhenzhong Duan  * On input num_iovas is the length of the allowed_iovas array. On output it is
123f7cbfa71SZhenzhong Duan  * the total number of iovas filled in. The ioctl will return -EMSGSIZE and set
124f7cbfa71SZhenzhong Duan  * num_iovas to the required value if num_iovas is too small. In this case the
125f7cbfa71SZhenzhong Duan  * caller should allocate a larger output array and re-issue the ioctl.
126f7cbfa71SZhenzhong Duan  *
127f7cbfa71SZhenzhong Duan  * out_iova_alignment returns the minimum IOVA alignment that can be given
128f7cbfa71SZhenzhong Duan  * to IOMMU_IOAS_MAP/COPY. IOVA's must satisfy::
129f7cbfa71SZhenzhong Duan  *
130f7cbfa71SZhenzhong Duan  *   starting_iova % out_iova_alignment == 0
131f7cbfa71SZhenzhong Duan  *   (starting_iova + length) % out_iova_alignment == 0
132f7cbfa71SZhenzhong Duan  *
133f7cbfa71SZhenzhong Duan  * out_iova_alignment can be 1 indicating any IOVA is allowed. It cannot
134f7cbfa71SZhenzhong Duan  * be higher than the system PAGE_SIZE.
135f7cbfa71SZhenzhong Duan  */
136f7cbfa71SZhenzhong Duan struct iommu_ioas_iova_ranges {
137f7cbfa71SZhenzhong Duan 	__u32 size;
138f7cbfa71SZhenzhong Duan 	__u32 ioas_id;
139f7cbfa71SZhenzhong Duan 	__u32 num_iovas;
140f7cbfa71SZhenzhong Duan 	__u32 __reserved;
141f7cbfa71SZhenzhong Duan 	__aligned_u64 allowed_iovas;
142f7cbfa71SZhenzhong Duan 	__aligned_u64 out_iova_alignment;
143f7cbfa71SZhenzhong Duan };
144f7cbfa71SZhenzhong Duan #define IOMMU_IOAS_IOVA_RANGES _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_IOVA_RANGES)
145f7cbfa71SZhenzhong Duan 
146f7cbfa71SZhenzhong Duan /**
147f7cbfa71SZhenzhong Duan  * struct iommu_ioas_allow_iovas - ioctl(IOMMU_IOAS_ALLOW_IOVAS)
148f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_ioas_allow_iovas)
149f7cbfa71SZhenzhong Duan  * @ioas_id: IOAS ID to allow IOVAs from
150f7cbfa71SZhenzhong Duan  * @num_iovas: Input/Output total number of ranges in the IOAS
151f7cbfa71SZhenzhong Duan  * @__reserved: Must be 0
152f7cbfa71SZhenzhong Duan  * @allowed_iovas: Pointer to array of struct iommu_iova_range
153f7cbfa71SZhenzhong Duan  *
154f7cbfa71SZhenzhong Duan  * Ensure a range of IOVAs are always available for allocation. If this call
155f7cbfa71SZhenzhong Duan  * succeeds then IOMMU_IOAS_IOVA_RANGES will never return a list of IOVA ranges
156f7cbfa71SZhenzhong Duan  * that are narrower than the ranges provided here. This call will fail if
157f7cbfa71SZhenzhong Duan  * IOMMU_IOAS_IOVA_RANGES is currently narrower than the given ranges.
158f7cbfa71SZhenzhong Duan  *
159f7cbfa71SZhenzhong Duan  * When an IOAS is first created the IOVA_RANGES will be maximally sized, and as
160f7cbfa71SZhenzhong Duan  * devices are attached the IOVA will narrow based on the device restrictions.
161f7cbfa71SZhenzhong Duan  * When an allowed range is specified any narrowing will be refused, ie device
162f7cbfa71SZhenzhong Duan  * attachment can fail if the device requires limiting within the allowed range.
163f7cbfa71SZhenzhong Duan  *
164f7cbfa71SZhenzhong Duan  * Automatic IOVA allocation is also impacted by this call. MAP will only
165f7cbfa71SZhenzhong Duan  * allocate within the allowed IOVAs if they are present.
166f7cbfa71SZhenzhong Duan  *
167f7cbfa71SZhenzhong Duan  * This call replaces the entire allowed list with the given list.
168f7cbfa71SZhenzhong Duan  */
169f7cbfa71SZhenzhong Duan struct iommu_ioas_allow_iovas {
170f7cbfa71SZhenzhong Duan 	__u32 size;
171f7cbfa71SZhenzhong Duan 	__u32 ioas_id;
172f7cbfa71SZhenzhong Duan 	__u32 num_iovas;
173f7cbfa71SZhenzhong Duan 	__u32 __reserved;
174f7cbfa71SZhenzhong Duan 	__aligned_u64 allowed_iovas;
175f7cbfa71SZhenzhong Duan };
176f7cbfa71SZhenzhong Duan #define IOMMU_IOAS_ALLOW_IOVAS _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_ALLOW_IOVAS)
177f7cbfa71SZhenzhong Duan 
178f7cbfa71SZhenzhong Duan /**
179f7cbfa71SZhenzhong Duan  * enum iommufd_ioas_map_flags - Flags for map and copy
180f7cbfa71SZhenzhong Duan  * @IOMMU_IOAS_MAP_FIXED_IOVA: If clear the kernel will compute an appropriate
181f7cbfa71SZhenzhong Duan  *                             IOVA to place the mapping at
182f7cbfa71SZhenzhong Duan  * @IOMMU_IOAS_MAP_WRITEABLE: DMA is allowed to write to this mapping
183f7cbfa71SZhenzhong Duan  * @IOMMU_IOAS_MAP_READABLE: DMA is allowed to read from this mapping
184f7cbfa71SZhenzhong Duan  */
185f7cbfa71SZhenzhong Duan enum iommufd_ioas_map_flags {
186f7cbfa71SZhenzhong Duan 	IOMMU_IOAS_MAP_FIXED_IOVA = 1 << 0,
187f7cbfa71SZhenzhong Duan 	IOMMU_IOAS_MAP_WRITEABLE = 1 << 1,
188f7cbfa71SZhenzhong Duan 	IOMMU_IOAS_MAP_READABLE = 1 << 2,
189f7cbfa71SZhenzhong Duan };
190f7cbfa71SZhenzhong Duan 
191f7cbfa71SZhenzhong Duan /**
192f7cbfa71SZhenzhong Duan  * struct iommu_ioas_map - ioctl(IOMMU_IOAS_MAP)
193f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_ioas_map)
194f7cbfa71SZhenzhong Duan  * @flags: Combination of enum iommufd_ioas_map_flags
195f7cbfa71SZhenzhong Duan  * @ioas_id: IOAS ID to change the mapping of
196f7cbfa71SZhenzhong Duan  * @__reserved: Must be 0
197f7cbfa71SZhenzhong Duan  * @user_va: Userspace pointer to start mapping from
198f7cbfa71SZhenzhong Duan  * @length: Number of bytes to map
199f7cbfa71SZhenzhong Duan  * @iova: IOVA the mapping was placed at. If IOMMU_IOAS_MAP_FIXED_IOVA is set
200f7cbfa71SZhenzhong Duan  *        then this must be provided as input.
201f7cbfa71SZhenzhong Duan  *
202f7cbfa71SZhenzhong Duan  * Set an IOVA mapping from a user pointer. If FIXED_IOVA is specified then the
203f7cbfa71SZhenzhong Duan  * mapping will be established at iova, otherwise a suitable location based on
204f7cbfa71SZhenzhong Duan  * the reserved and allowed lists will be automatically selected and returned in
205f7cbfa71SZhenzhong Duan  * iova.
206f7cbfa71SZhenzhong Duan  *
207f7cbfa71SZhenzhong Duan  * If IOMMU_IOAS_MAP_FIXED_IOVA is specified then the iova range must currently
208f7cbfa71SZhenzhong Duan  * be unused, existing IOVA cannot be replaced.
209f7cbfa71SZhenzhong Duan  */
210f7cbfa71SZhenzhong Duan struct iommu_ioas_map {
211f7cbfa71SZhenzhong Duan 	__u32 size;
212f7cbfa71SZhenzhong Duan 	__u32 flags;
213f7cbfa71SZhenzhong Duan 	__u32 ioas_id;
214f7cbfa71SZhenzhong Duan 	__u32 __reserved;
215f7cbfa71SZhenzhong Duan 	__aligned_u64 user_va;
216f7cbfa71SZhenzhong Duan 	__aligned_u64 length;
217f7cbfa71SZhenzhong Duan 	__aligned_u64 iova;
218f7cbfa71SZhenzhong Duan };
219f7cbfa71SZhenzhong Duan #define IOMMU_IOAS_MAP _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP)
220f7cbfa71SZhenzhong Duan 
221f7cbfa71SZhenzhong Duan /**
22244fe383cSHendrik Brueckner  * struct iommu_ioas_map_file - ioctl(IOMMU_IOAS_MAP_FILE)
22344fe383cSHendrik Brueckner  * @size: sizeof(struct iommu_ioas_map_file)
22444fe383cSHendrik Brueckner  * @flags: same as for iommu_ioas_map
22544fe383cSHendrik Brueckner  * @ioas_id: same as for iommu_ioas_map
22644fe383cSHendrik Brueckner  * @fd: the memfd to map
22744fe383cSHendrik Brueckner  * @start: byte offset from start of file to map from
22844fe383cSHendrik Brueckner  * @length: same as for iommu_ioas_map
22944fe383cSHendrik Brueckner  * @iova: same as for iommu_ioas_map
23044fe383cSHendrik Brueckner  *
23144fe383cSHendrik Brueckner  * Set an IOVA mapping from a memfd file.  All other arguments and semantics
23244fe383cSHendrik Brueckner  * match those of IOMMU_IOAS_MAP.
23344fe383cSHendrik Brueckner  */
23444fe383cSHendrik Brueckner struct iommu_ioas_map_file {
23544fe383cSHendrik Brueckner 	__u32 size;
23644fe383cSHendrik Brueckner 	__u32 flags;
23744fe383cSHendrik Brueckner 	__u32 ioas_id;
23844fe383cSHendrik Brueckner 	__s32 fd;
23944fe383cSHendrik Brueckner 	__aligned_u64 start;
24044fe383cSHendrik Brueckner 	__aligned_u64 length;
24144fe383cSHendrik Brueckner 	__aligned_u64 iova;
24244fe383cSHendrik Brueckner };
24344fe383cSHendrik Brueckner #define IOMMU_IOAS_MAP_FILE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP_FILE)
24444fe383cSHendrik Brueckner 
24544fe383cSHendrik Brueckner /**
246f7cbfa71SZhenzhong Duan  * struct iommu_ioas_copy - ioctl(IOMMU_IOAS_COPY)
247f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_ioas_copy)
248f7cbfa71SZhenzhong Duan  * @flags: Combination of enum iommufd_ioas_map_flags
249f7cbfa71SZhenzhong Duan  * @dst_ioas_id: IOAS ID to change the mapping of
250f7cbfa71SZhenzhong Duan  * @src_ioas_id: IOAS ID to copy from
251f7cbfa71SZhenzhong Duan  * @length: Number of bytes to copy and map
252f7cbfa71SZhenzhong Duan  * @dst_iova: IOVA the mapping was placed at. If IOMMU_IOAS_MAP_FIXED_IOVA is
253f7cbfa71SZhenzhong Duan  *            set then this must be provided as input.
254f7cbfa71SZhenzhong Duan  * @src_iova: IOVA to start the copy
255f7cbfa71SZhenzhong Duan  *
256f7cbfa71SZhenzhong Duan  * Copy an already existing mapping from src_ioas_id and establish it in
257f7cbfa71SZhenzhong Duan  * dst_ioas_id. The src iova/length must exactly match a range used with
258f7cbfa71SZhenzhong Duan  * IOMMU_IOAS_MAP.
259f7cbfa71SZhenzhong Duan  *
260f7cbfa71SZhenzhong Duan  * This may be used to efficiently clone a subset of an IOAS to another, or as a
261f7cbfa71SZhenzhong Duan  * kind of 'cache' to speed up mapping. Copy has an efficiency advantage over
262f7cbfa71SZhenzhong Duan  * establishing equivalent new mappings, as internal resources are shared, and
263f7cbfa71SZhenzhong Duan  * the kernel will pin the user memory only once.
264f7cbfa71SZhenzhong Duan  */
265f7cbfa71SZhenzhong Duan struct iommu_ioas_copy {
266f7cbfa71SZhenzhong Duan 	__u32 size;
267f7cbfa71SZhenzhong Duan 	__u32 flags;
268f7cbfa71SZhenzhong Duan 	__u32 dst_ioas_id;
269f7cbfa71SZhenzhong Duan 	__u32 src_ioas_id;
270f7cbfa71SZhenzhong Duan 	__aligned_u64 length;
271f7cbfa71SZhenzhong Duan 	__aligned_u64 dst_iova;
272f7cbfa71SZhenzhong Duan 	__aligned_u64 src_iova;
273f7cbfa71SZhenzhong Duan };
274f7cbfa71SZhenzhong Duan #define IOMMU_IOAS_COPY _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_COPY)
275f7cbfa71SZhenzhong Duan 
276f7cbfa71SZhenzhong Duan /**
277f7cbfa71SZhenzhong Duan  * struct iommu_ioas_unmap - ioctl(IOMMU_IOAS_UNMAP)
278f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_ioas_unmap)
279f7cbfa71SZhenzhong Duan  * @ioas_id: IOAS ID to change the mapping of
280f7cbfa71SZhenzhong Duan  * @iova: IOVA to start the unmapping at
281f7cbfa71SZhenzhong Duan  * @length: Number of bytes to unmap, and return back the bytes unmapped
282f7cbfa71SZhenzhong Duan  *
283f7cbfa71SZhenzhong Duan  * Unmap an IOVA range. The iova/length must be a superset of a previously
284f7cbfa71SZhenzhong Duan  * mapped range used with IOMMU_IOAS_MAP or IOMMU_IOAS_COPY. Splitting or
285f7cbfa71SZhenzhong Duan  * truncating ranges is not allowed. The values 0 to U64_MAX will unmap
286f7cbfa71SZhenzhong Duan  * everything.
287f7cbfa71SZhenzhong Duan  */
288f7cbfa71SZhenzhong Duan struct iommu_ioas_unmap {
289f7cbfa71SZhenzhong Duan 	__u32 size;
290f7cbfa71SZhenzhong Duan 	__u32 ioas_id;
291f7cbfa71SZhenzhong Duan 	__aligned_u64 iova;
292f7cbfa71SZhenzhong Duan 	__aligned_u64 length;
293f7cbfa71SZhenzhong Duan };
294f7cbfa71SZhenzhong Duan #define IOMMU_IOAS_UNMAP _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_UNMAP)
295f7cbfa71SZhenzhong Duan 
296f7cbfa71SZhenzhong Duan /**
297f7cbfa71SZhenzhong Duan  * enum iommufd_option - ioctl(IOMMU_OPTION_RLIMIT_MODE) and
298f7cbfa71SZhenzhong Duan  *                       ioctl(IOMMU_OPTION_HUGE_PAGES)
299f7cbfa71SZhenzhong Duan  * @IOMMU_OPTION_RLIMIT_MODE:
300f7cbfa71SZhenzhong Duan  *    Change how RLIMIT_MEMLOCK accounting works. The caller must have privilege
301421ee1ecSDaniel Henrique Barboza  *    to invoke this. Value 0 (default) is user based accounting, 1 uses process
302f7cbfa71SZhenzhong Duan  *    based accounting. Global option, object_id must be 0
303f7cbfa71SZhenzhong Duan  * @IOMMU_OPTION_HUGE_PAGES:
304f7cbfa71SZhenzhong Duan  *    Value 1 (default) allows contiguous pages to be combined when generating
305f7cbfa71SZhenzhong Duan  *    iommu mappings. Value 0 disables combining, everything is mapped to
306f7cbfa71SZhenzhong Duan  *    PAGE_SIZE. This can be useful for benchmarking.  This is a per-IOAS
307f7cbfa71SZhenzhong Duan  *    option, the object_id must be the IOAS ID.
308f7cbfa71SZhenzhong Duan  */
309f7cbfa71SZhenzhong Duan enum iommufd_option {
310f7cbfa71SZhenzhong Duan 	IOMMU_OPTION_RLIMIT_MODE = 0,
311f7cbfa71SZhenzhong Duan 	IOMMU_OPTION_HUGE_PAGES = 1,
312f7cbfa71SZhenzhong Duan };
313f7cbfa71SZhenzhong Duan 
314f7cbfa71SZhenzhong Duan /**
315f7cbfa71SZhenzhong Duan  * enum iommufd_option_ops - ioctl(IOMMU_OPTION_OP_SET) and
316f7cbfa71SZhenzhong Duan  *                           ioctl(IOMMU_OPTION_OP_GET)
317f7cbfa71SZhenzhong Duan  * @IOMMU_OPTION_OP_SET: Set the option's value
318f7cbfa71SZhenzhong Duan  * @IOMMU_OPTION_OP_GET: Get the option's value
319f7cbfa71SZhenzhong Duan  */
320f7cbfa71SZhenzhong Duan enum iommufd_option_ops {
321f7cbfa71SZhenzhong Duan 	IOMMU_OPTION_OP_SET = 0,
322f7cbfa71SZhenzhong Duan 	IOMMU_OPTION_OP_GET = 1,
323f7cbfa71SZhenzhong Duan };
324f7cbfa71SZhenzhong Duan 
325f7cbfa71SZhenzhong Duan /**
326f7cbfa71SZhenzhong Duan  * struct iommu_option - iommu option multiplexer
327f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_option)
328f7cbfa71SZhenzhong Duan  * @option_id: One of enum iommufd_option
329f7cbfa71SZhenzhong Duan  * @op: One of enum iommufd_option_ops
330f7cbfa71SZhenzhong Duan  * @__reserved: Must be 0
331f7cbfa71SZhenzhong Duan  * @object_id: ID of the object if required
332f7cbfa71SZhenzhong Duan  * @val64: Option value to set or value returned on get
333f7cbfa71SZhenzhong Duan  *
334f7cbfa71SZhenzhong Duan  * Change a simple option value. This multiplexor allows controlling options
335f7cbfa71SZhenzhong Duan  * on objects. IOMMU_OPTION_OP_SET will load an option and IOMMU_OPTION_OP_GET
336f7cbfa71SZhenzhong Duan  * will return the current value.
337f7cbfa71SZhenzhong Duan  */
338f7cbfa71SZhenzhong Duan struct iommu_option {
339f7cbfa71SZhenzhong Duan 	__u32 size;
340f7cbfa71SZhenzhong Duan 	__u32 option_id;
341f7cbfa71SZhenzhong Duan 	__u16 op;
342f7cbfa71SZhenzhong Duan 	__u16 __reserved;
343f7cbfa71SZhenzhong Duan 	__u32 object_id;
344f7cbfa71SZhenzhong Duan 	__aligned_u64 val64;
345f7cbfa71SZhenzhong Duan };
346f7cbfa71SZhenzhong Duan #define IOMMU_OPTION _IO(IOMMUFD_TYPE, IOMMUFD_CMD_OPTION)
347f7cbfa71SZhenzhong Duan 
348f7cbfa71SZhenzhong Duan /**
349f7cbfa71SZhenzhong Duan  * enum iommufd_vfio_ioas_op - IOMMU_VFIO_IOAS_* ioctls
350f7cbfa71SZhenzhong Duan  * @IOMMU_VFIO_IOAS_GET: Get the current compatibility IOAS
351f7cbfa71SZhenzhong Duan  * @IOMMU_VFIO_IOAS_SET: Change the current compatibility IOAS
352f7cbfa71SZhenzhong Duan  * @IOMMU_VFIO_IOAS_CLEAR: Disable VFIO compatibility
353f7cbfa71SZhenzhong Duan  */
354f7cbfa71SZhenzhong Duan enum iommufd_vfio_ioas_op {
355f7cbfa71SZhenzhong Duan 	IOMMU_VFIO_IOAS_GET = 0,
356f7cbfa71SZhenzhong Duan 	IOMMU_VFIO_IOAS_SET = 1,
357f7cbfa71SZhenzhong Duan 	IOMMU_VFIO_IOAS_CLEAR = 2,
358f7cbfa71SZhenzhong Duan };
359f7cbfa71SZhenzhong Duan 
360f7cbfa71SZhenzhong Duan /**
361f7cbfa71SZhenzhong Duan  * struct iommu_vfio_ioas - ioctl(IOMMU_VFIO_IOAS)
362f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_vfio_ioas)
363f7cbfa71SZhenzhong Duan  * @ioas_id: For IOMMU_VFIO_IOAS_SET the input IOAS ID to set
364f7cbfa71SZhenzhong Duan  *           For IOMMU_VFIO_IOAS_GET will output the IOAS ID
365f7cbfa71SZhenzhong Duan  * @op: One of enum iommufd_vfio_ioas_op
366f7cbfa71SZhenzhong Duan  * @__reserved: Must be 0
367f7cbfa71SZhenzhong Duan  *
368f7cbfa71SZhenzhong Duan  * The VFIO compatibility support uses a single ioas because VFIO APIs do not
369f7cbfa71SZhenzhong Duan  * support the ID field. Set or Get the IOAS that VFIO compatibility will use.
370f7cbfa71SZhenzhong Duan  * When VFIO_GROUP_SET_CONTAINER is used on an iommufd it will get the
371f7cbfa71SZhenzhong Duan  * compatibility ioas, either by taking what is already set, or auto creating
372f7cbfa71SZhenzhong Duan  * one. From then on VFIO will continue to use that ioas and is not effected by
373f7cbfa71SZhenzhong Duan  * this ioctl. SET or CLEAR does not destroy any auto-created IOAS.
374f7cbfa71SZhenzhong Duan  */
375f7cbfa71SZhenzhong Duan struct iommu_vfio_ioas {
376f7cbfa71SZhenzhong Duan 	__u32 size;
377f7cbfa71SZhenzhong Duan 	__u32 ioas_id;
378f7cbfa71SZhenzhong Duan 	__u16 op;
379f7cbfa71SZhenzhong Duan 	__u16 __reserved;
380f7cbfa71SZhenzhong Duan };
381f7cbfa71SZhenzhong Duan #define IOMMU_VFIO_IOAS _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VFIO_IOAS)
382f7cbfa71SZhenzhong Duan 
383f7cbfa71SZhenzhong Duan /**
384efb91426SDaniel Henrique Barboza  * enum iommufd_hwpt_alloc_flags - Flags for HWPT allocation
385efb91426SDaniel Henrique Barboza  * @IOMMU_HWPT_ALLOC_NEST_PARENT: If set, allocate a HWPT that can serve as
386efb91426SDaniel Henrique Barboza  *                                the parent HWPT in a nesting configuration.
387efb91426SDaniel Henrique Barboza  * @IOMMU_HWPT_ALLOC_DIRTY_TRACKING: Dirty tracking support for device IOMMU is
388efb91426SDaniel Henrique Barboza  *                                   enforced on device attachment
3890d2eeef7SBibo Mao  * @IOMMU_HWPT_FAULT_ID_VALID: The fault_id field of hwpt allocation data is
3900d2eeef7SBibo Mao  *                             valid.
39144fe383cSHendrik Brueckner  * @IOMMU_HWPT_ALLOC_PASID: Requests a domain that can be used with PASID. The
39244fe383cSHendrik Brueckner  *                          domain can be attached to any PASID on the device.
39344fe383cSHendrik Brueckner  *                          Any domain attached to the non-PASID part of the
394421ee1ecSDaniel Henrique Barboza  *                          device must also be flagged, otherwise attaching a
39544fe383cSHendrik Brueckner  *                          PASID will blocked.
396*1cab5a02SRorie Reyes  *                          For the user that wants to attach PASID, ioas is
397*1cab5a02SRorie Reyes  *                          not recommended for both the non-PASID part
398*1cab5a02SRorie Reyes  *                          and PASID part of the device.
39944fe383cSHendrik Brueckner  *                          If IOMMU does not support PASID it will return
40044fe383cSHendrik Brueckner  *                          error (-EOPNOTSUPP).
401efb91426SDaniel Henrique Barboza  */
402efb91426SDaniel Henrique Barboza enum iommufd_hwpt_alloc_flags {
403efb91426SDaniel Henrique Barboza 	IOMMU_HWPT_ALLOC_NEST_PARENT = 1 << 0,
404efb91426SDaniel Henrique Barboza 	IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1,
4050d2eeef7SBibo Mao 	IOMMU_HWPT_FAULT_ID_VALID = 1 << 2,
40644fe383cSHendrik Brueckner 	IOMMU_HWPT_ALLOC_PASID = 1 << 3,
407efb91426SDaniel Henrique Barboza };
408efb91426SDaniel Henrique Barboza 
409efb91426SDaniel Henrique Barboza /**
410efb91426SDaniel Henrique Barboza  * enum iommu_hwpt_vtd_s1_flags - Intel VT-d stage-1 page table
411efb91426SDaniel Henrique Barboza  *                                entry attributes
412efb91426SDaniel Henrique Barboza  * @IOMMU_VTD_S1_SRE: Supervisor request
413efb91426SDaniel Henrique Barboza  * @IOMMU_VTD_S1_EAFE: Extended access enable
414efb91426SDaniel Henrique Barboza  * @IOMMU_VTD_S1_WPE: Write protect enable
415efb91426SDaniel Henrique Barboza  */
416efb91426SDaniel Henrique Barboza enum iommu_hwpt_vtd_s1_flags {
417efb91426SDaniel Henrique Barboza 	IOMMU_VTD_S1_SRE = 1 << 0,
418efb91426SDaniel Henrique Barboza 	IOMMU_VTD_S1_EAFE = 1 << 1,
419efb91426SDaniel Henrique Barboza 	IOMMU_VTD_S1_WPE = 1 << 2,
420efb91426SDaniel Henrique Barboza };
421efb91426SDaniel Henrique Barboza 
422efb91426SDaniel Henrique Barboza /**
423efb91426SDaniel Henrique Barboza  * struct iommu_hwpt_vtd_s1 - Intel VT-d stage-1 page table
424efb91426SDaniel Henrique Barboza  *                            info (IOMMU_HWPT_DATA_VTD_S1)
425efb91426SDaniel Henrique Barboza  * @flags: Combination of enum iommu_hwpt_vtd_s1_flags
426efb91426SDaniel Henrique Barboza  * @pgtbl_addr: The base address of the stage-1 page table.
427efb91426SDaniel Henrique Barboza  * @addr_width: The address width of the stage-1 page table
428efb91426SDaniel Henrique Barboza  * @__reserved: Must be 0
429efb91426SDaniel Henrique Barboza  */
430efb91426SDaniel Henrique Barboza struct iommu_hwpt_vtd_s1 {
431efb91426SDaniel Henrique Barboza 	__aligned_u64 flags;
432efb91426SDaniel Henrique Barboza 	__aligned_u64 pgtbl_addr;
433efb91426SDaniel Henrique Barboza 	__u32 addr_width;
434efb91426SDaniel Henrique Barboza 	__u32 __reserved;
435efb91426SDaniel Henrique Barboza };
436efb91426SDaniel Henrique Barboza 
437efb91426SDaniel Henrique Barboza /**
43844fe383cSHendrik Brueckner  * struct iommu_hwpt_arm_smmuv3 - ARM SMMUv3 nested STE
43944fe383cSHendrik Brueckner  *                                (IOMMU_HWPT_DATA_ARM_SMMUV3)
44044fe383cSHendrik Brueckner  *
44144fe383cSHendrik Brueckner  * @ste: The first two double words of the user space Stream Table Entry for
44244fe383cSHendrik Brueckner  *       the translation. Must be little-endian.
44344fe383cSHendrik Brueckner  *       Allowed fields: (Refer to "5.2 Stream Table Entry" in SMMUv3 HW Spec)
44444fe383cSHendrik Brueckner  *       - word-0: V, Cfg, S1Fmt, S1ContextPtr, S1CDMax
44544fe383cSHendrik Brueckner  *       - word-1: EATS, S1DSS, S1CIR, S1COR, S1CSH, S1STALLD
44644fe383cSHendrik Brueckner  *
44744fe383cSHendrik Brueckner  * -EIO will be returned if @ste is not legal or contains any non-allowed field.
44844fe383cSHendrik Brueckner  * Cfg can be used to select a S1, Bypass or Abort configuration. A Bypass
44944fe383cSHendrik Brueckner  * nested domain will translate the same as the nesting parent. The S1 will
45044fe383cSHendrik Brueckner  * install a Context Descriptor Table pointing at userspace memory translated
45144fe383cSHendrik Brueckner  * by the nesting parent.
45244fe383cSHendrik Brueckner  */
45344fe383cSHendrik Brueckner struct iommu_hwpt_arm_smmuv3 {
45444fe383cSHendrik Brueckner 	__aligned_le64 ste[2];
45544fe383cSHendrik Brueckner };
45644fe383cSHendrik Brueckner 
45744fe383cSHendrik Brueckner /**
458efb91426SDaniel Henrique Barboza  * enum iommu_hwpt_data_type - IOMMU HWPT Data Type
459efb91426SDaniel Henrique Barboza  * @IOMMU_HWPT_DATA_NONE: no data
460efb91426SDaniel Henrique Barboza  * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
46144fe383cSHendrik Brueckner  * @IOMMU_HWPT_DATA_ARM_SMMUV3: ARM SMMUv3 Context Descriptor Table
462efb91426SDaniel Henrique Barboza  */
463efb91426SDaniel Henrique Barboza enum iommu_hwpt_data_type {
4640d2eeef7SBibo Mao 	IOMMU_HWPT_DATA_NONE = 0,
4650d2eeef7SBibo Mao 	IOMMU_HWPT_DATA_VTD_S1 = 1,
46644fe383cSHendrik Brueckner 	IOMMU_HWPT_DATA_ARM_SMMUV3 = 2,
467efb91426SDaniel Henrique Barboza };
468efb91426SDaniel Henrique Barboza 
469efb91426SDaniel Henrique Barboza /**
470f7cbfa71SZhenzhong Duan  * struct iommu_hwpt_alloc - ioctl(IOMMU_HWPT_ALLOC)
471f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_hwpt_alloc)
472efb91426SDaniel Henrique Barboza  * @flags: Combination of enum iommufd_hwpt_alloc_flags
473f7cbfa71SZhenzhong Duan  * @dev_id: The device to allocate this HWPT for
47444fe383cSHendrik Brueckner  * @pt_id: The IOAS or HWPT or vIOMMU to connect this HWPT to
475f7cbfa71SZhenzhong Duan  * @out_hwpt_id: The ID of the new HWPT
476f7cbfa71SZhenzhong Duan  * @__reserved: Must be 0
477efb91426SDaniel Henrique Barboza  * @data_type: One of enum iommu_hwpt_data_type
478efb91426SDaniel Henrique Barboza  * @data_len: Length of the type specific data
479efb91426SDaniel Henrique Barboza  * @data_uptr: User pointer to the type specific data
4800d2eeef7SBibo Mao  * @fault_id: The ID of IOMMUFD_FAULT object. Valid only if flags field of
4810d2eeef7SBibo Mao  *            IOMMU_HWPT_FAULT_ID_VALID is set.
4820d2eeef7SBibo Mao  * @__reserved2: Padding to 64-bit alignment. Must be 0.
483f7cbfa71SZhenzhong Duan  *
484f7cbfa71SZhenzhong Duan  * Explicitly allocate a hardware page table object. This is the same object
485f7cbfa71SZhenzhong Duan  * type that is returned by iommufd_device_attach() and represents the
486f7cbfa71SZhenzhong Duan  * underlying iommu driver's iommu_domain kernel object.
487f7cbfa71SZhenzhong Duan  *
488efb91426SDaniel Henrique Barboza  * A kernel-managed HWPT will be created with the mappings from the given
489efb91426SDaniel Henrique Barboza  * IOAS via the @pt_id. The @data_type for this allocation must be set to
490efb91426SDaniel Henrique Barboza  * IOMMU_HWPT_DATA_NONE. The HWPT can be allocated as a parent HWPT for a
491efb91426SDaniel Henrique Barboza  * nesting configuration by passing IOMMU_HWPT_ALLOC_NEST_PARENT via @flags.
492efb91426SDaniel Henrique Barboza  *
49344fe383cSHendrik Brueckner  * A user-managed nested HWPT will be created from a given vIOMMU (wrapping a
49444fe383cSHendrik Brueckner  * parent HWPT) or a parent HWPT via @pt_id, in which the parent HWPT must be
49544fe383cSHendrik Brueckner  * allocated previously via the same ioctl from a given IOAS (@pt_id). In this
49644fe383cSHendrik Brueckner  * case, the @data_type must be set to a pre-defined type corresponding to an
49744fe383cSHendrik Brueckner  * I/O page table type supported by the underlying IOMMU hardware. The device
49844fe383cSHendrik Brueckner  * via @dev_id and the vIOMMU via @pt_id must be associated to the same IOMMU
49944fe383cSHendrik Brueckner  * instance.
500efb91426SDaniel Henrique Barboza  *
501efb91426SDaniel Henrique Barboza  * If the @data_type is set to IOMMU_HWPT_DATA_NONE, @data_len and
502efb91426SDaniel Henrique Barboza  * @data_uptr should be zero. Otherwise, both @data_len and @data_uptr
503efb91426SDaniel Henrique Barboza  * must be given.
504f7cbfa71SZhenzhong Duan  */
505f7cbfa71SZhenzhong Duan struct iommu_hwpt_alloc {
506f7cbfa71SZhenzhong Duan 	__u32 size;
507f7cbfa71SZhenzhong Duan 	__u32 flags;
508f7cbfa71SZhenzhong Duan 	__u32 dev_id;
509f7cbfa71SZhenzhong Duan 	__u32 pt_id;
510f7cbfa71SZhenzhong Duan 	__u32 out_hwpt_id;
511f7cbfa71SZhenzhong Duan 	__u32 __reserved;
512efb91426SDaniel Henrique Barboza 	__u32 data_type;
513efb91426SDaniel Henrique Barboza 	__u32 data_len;
514efb91426SDaniel Henrique Barboza 	__aligned_u64 data_uptr;
5150d2eeef7SBibo Mao 	__u32 fault_id;
5160d2eeef7SBibo Mao 	__u32 __reserved2;
517f7cbfa71SZhenzhong Duan };
518f7cbfa71SZhenzhong Duan #define IOMMU_HWPT_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_ALLOC)
519f7cbfa71SZhenzhong Duan 
520f7cbfa71SZhenzhong Duan /**
521efb91426SDaniel Henrique Barboza  * enum iommu_hw_info_vtd_flags - Flags for VT-d hw_info
522efb91426SDaniel Henrique Barboza  * @IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17: If set, disallow read-only mappings
523efb91426SDaniel Henrique Barboza  *                                         on a nested_parent domain.
524efb91426SDaniel Henrique Barboza  *                                         https://www.intel.com/content/www/us/en/content-details/772415/content-details.html
525efb91426SDaniel Henrique Barboza  */
526efb91426SDaniel Henrique Barboza enum iommu_hw_info_vtd_flags {
527efb91426SDaniel Henrique Barboza 	IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17 = 1 << 0,
528efb91426SDaniel Henrique Barboza };
529efb91426SDaniel Henrique Barboza 
530efb91426SDaniel Henrique Barboza /**
531f7cbfa71SZhenzhong Duan  * struct iommu_hw_info_vtd - Intel VT-d hardware information
532f7cbfa71SZhenzhong Duan  *
533efb91426SDaniel Henrique Barboza  * @flags: Combination of enum iommu_hw_info_vtd_flags
534f7cbfa71SZhenzhong Duan  * @__reserved: Must be 0
535f7cbfa71SZhenzhong Duan  *
536f7cbfa71SZhenzhong Duan  * @cap_reg: Value of Intel VT-d capability register defined in VT-d spec
537f7cbfa71SZhenzhong Duan  *           section 11.4.2 Capability Register.
538f7cbfa71SZhenzhong Duan  * @ecap_reg: Value of Intel VT-d capability register defined in VT-d spec
539f7cbfa71SZhenzhong Duan  *            section 11.4.3 Extended Capability Register.
540f7cbfa71SZhenzhong Duan  *
541f7cbfa71SZhenzhong Duan  * User needs to understand the Intel VT-d specification to decode the
542f7cbfa71SZhenzhong Duan  * register value.
543f7cbfa71SZhenzhong Duan  */
544f7cbfa71SZhenzhong Duan struct iommu_hw_info_vtd {
545f7cbfa71SZhenzhong Duan 	__u32 flags;
546f7cbfa71SZhenzhong Duan 	__u32 __reserved;
547f7cbfa71SZhenzhong Duan 	__aligned_u64 cap_reg;
548f7cbfa71SZhenzhong Duan 	__aligned_u64 ecap_reg;
549f7cbfa71SZhenzhong Duan };
550f7cbfa71SZhenzhong Duan 
551f7cbfa71SZhenzhong Duan /**
55244fe383cSHendrik Brueckner  * struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware information
55344fe383cSHendrik Brueckner  *                                   (IOMMU_HW_INFO_TYPE_ARM_SMMUV3)
55444fe383cSHendrik Brueckner  *
55544fe383cSHendrik Brueckner  * @flags: Must be set to 0
55644fe383cSHendrik Brueckner  * @__reserved: Must be 0
55744fe383cSHendrik Brueckner  * @idr: Implemented features for ARM SMMU Non-secure programming interface
55844fe383cSHendrik Brueckner  * @iidr: Information about the implementation and implementer of ARM SMMU,
55944fe383cSHendrik Brueckner  *        and architecture version supported
56044fe383cSHendrik Brueckner  * @aidr: ARM SMMU architecture version
56144fe383cSHendrik Brueckner  *
56244fe383cSHendrik Brueckner  * For the details of @idr, @iidr and @aidr, please refer to the chapters
56344fe383cSHendrik Brueckner  * from 6.3.1 to 6.3.6 in the SMMUv3 Spec.
56444fe383cSHendrik Brueckner  *
565421ee1ecSDaniel Henrique Barboza  * This reports the raw HW capability, and not all bits are meaningful to be
566421ee1ecSDaniel Henrique Barboza  * read by userspace. Only the following fields should be used:
56744fe383cSHendrik Brueckner  *
568421ee1ecSDaniel Henrique Barboza  * idr[0]: ST_LEVEL, TERM_MODEL, STALL_MODEL, TTENDIAN , CD2L, ASID16, TTF
569421ee1ecSDaniel Henrique Barboza  * idr[1]: SIDSIZE, SSIDSIZE
570421ee1ecSDaniel Henrique Barboza  * idr[3]: BBML, RIL
571421ee1ecSDaniel Henrique Barboza  * idr[5]: VAX, GRAN64K, GRAN16K, GRAN4K
57244fe383cSHendrik Brueckner  *
573421ee1ecSDaniel Henrique Barboza  * - S1P should be assumed to be true if a NESTED HWPT can be created
574421ee1ecSDaniel Henrique Barboza  * - VFIO/iommufd only support platforms with COHACC, it should be assumed to be
575421ee1ecSDaniel Henrique Barboza  *   true.
576421ee1ecSDaniel Henrique Barboza  * - ATS is a per-device property. If the VMM describes any devices as ATS
577421ee1ecSDaniel Henrique Barboza  *   capable in ACPI/DT it should set the corresponding idr.
578421ee1ecSDaniel Henrique Barboza  *
579421ee1ecSDaniel Henrique Barboza  * This list may expand in future (eg E0PD, AIE, PBHA, D128, DS etc). It is
580421ee1ecSDaniel Henrique Barboza  * important that VMMs do not read bits outside the list to allow for
581421ee1ecSDaniel Henrique Barboza  * compatibility with future kernels. Several features in the SMMUv3
582421ee1ecSDaniel Henrique Barboza  * architecture are not currently supported by the kernel for nesting: HTTU,
583421ee1ecSDaniel Henrique Barboza  * BTM, MPAM and others.
58444fe383cSHendrik Brueckner  */
58544fe383cSHendrik Brueckner struct iommu_hw_info_arm_smmuv3 {
58644fe383cSHendrik Brueckner 	__u32 flags;
58744fe383cSHendrik Brueckner 	__u32 __reserved;
58844fe383cSHendrik Brueckner 	__u32 idr[6];
58944fe383cSHendrik Brueckner 	__u32 iidr;
59044fe383cSHendrik Brueckner 	__u32 aidr;
59144fe383cSHendrik Brueckner };
59244fe383cSHendrik Brueckner 
59344fe383cSHendrik Brueckner /**
594f7cbfa71SZhenzhong Duan  * enum iommu_hw_info_type - IOMMU Hardware Info Types
595f7cbfa71SZhenzhong Duan  * @IOMMU_HW_INFO_TYPE_NONE: Used by the drivers that do not report hardware
596f7cbfa71SZhenzhong Duan  *                           info
597f7cbfa71SZhenzhong Duan  * @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
59844fe383cSHendrik Brueckner  * @IOMMU_HW_INFO_TYPE_ARM_SMMUV3: ARM SMMUv3 iommu info type
599f7cbfa71SZhenzhong Duan  */
600f7cbfa71SZhenzhong Duan enum iommu_hw_info_type {
6010d2eeef7SBibo Mao 	IOMMU_HW_INFO_TYPE_NONE = 0,
6020d2eeef7SBibo Mao 	IOMMU_HW_INFO_TYPE_INTEL_VTD = 1,
60344fe383cSHendrik Brueckner 	IOMMU_HW_INFO_TYPE_ARM_SMMUV3 = 2,
604f7cbfa71SZhenzhong Duan };
605f7cbfa71SZhenzhong Duan 
606f7cbfa71SZhenzhong Duan /**
607efb91426SDaniel Henrique Barboza  * enum iommufd_hw_capabilities
608efb91426SDaniel Henrique Barboza  * @IOMMU_HW_CAP_DIRTY_TRACKING: IOMMU hardware support for dirty tracking
609efb91426SDaniel Henrique Barboza  *                               If available, it means the following APIs
610efb91426SDaniel Henrique Barboza  *                               are supported:
611efb91426SDaniel Henrique Barboza  *
612efb91426SDaniel Henrique Barboza  *                                   IOMMU_HWPT_GET_DIRTY_BITMAP
613efb91426SDaniel Henrique Barboza  *                                   IOMMU_HWPT_SET_DIRTY_TRACKING
614efb91426SDaniel Henrique Barboza  *
615*1cab5a02SRorie Reyes  * @IOMMU_HW_CAP_PCI_PASID_EXEC: Execute Permission Supported, user ignores it
616*1cab5a02SRorie Reyes  *                               when the struct
617*1cab5a02SRorie Reyes  *                               iommu_hw_info::out_max_pasid_log2 is zero.
618*1cab5a02SRorie Reyes  * @IOMMU_HW_CAP_PCI_PASID_PRIV: Privileged Mode Supported, user ignores it
619*1cab5a02SRorie Reyes  *                               when the struct
620*1cab5a02SRorie Reyes  *                               iommu_hw_info::out_max_pasid_log2 is zero.
621efb91426SDaniel Henrique Barboza  */
622efb91426SDaniel Henrique Barboza enum iommufd_hw_capabilities {
623efb91426SDaniel Henrique Barboza 	IOMMU_HW_CAP_DIRTY_TRACKING = 1 << 0,
624*1cab5a02SRorie Reyes 	IOMMU_HW_CAP_PCI_PASID_EXEC = 1 << 1,
625*1cab5a02SRorie Reyes 	IOMMU_HW_CAP_PCI_PASID_PRIV = 1 << 2,
626efb91426SDaniel Henrique Barboza };
627efb91426SDaniel Henrique Barboza 
628efb91426SDaniel Henrique Barboza /**
629f7cbfa71SZhenzhong Duan  * struct iommu_hw_info - ioctl(IOMMU_GET_HW_INFO)
630f7cbfa71SZhenzhong Duan  * @size: sizeof(struct iommu_hw_info)
631f7cbfa71SZhenzhong Duan  * @flags: Must be 0
632f7cbfa71SZhenzhong Duan  * @dev_id: The device bound to the iommufd
633f7cbfa71SZhenzhong Duan  * @data_len: Input the length of a user buffer in bytes. Output the length of
634f7cbfa71SZhenzhong Duan  *            data that kernel supports
635f7cbfa71SZhenzhong Duan  * @data_uptr: User pointer to a user-space buffer used by the kernel to fill
636f7cbfa71SZhenzhong Duan  *             the iommu type specific hardware information data
637f7cbfa71SZhenzhong Duan  * @out_data_type: Output the iommu hardware info type as defined in the enum
638f7cbfa71SZhenzhong Duan  *                 iommu_hw_info_type.
639efb91426SDaniel Henrique Barboza  * @out_capabilities: Output the generic iommu capability info type as defined
640efb91426SDaniel Henrique Barboza  *                    in the enum iommu_hw_capabilities.
641*1cab5a02SRorie Reyes  * @out_max_pasid_log2: Output the width of PASIDs. 0 means no PASID support.
642*1cab5a02SRorie Reyes  *                      PCI devices turn to out_capabilities to check if the
643*1cab5a02SRorie Reyes  *                      specific capabilities is supported or not.
644f7cbfa71SZhenzhong Duan  * @__reserved: Must be 0
645f7cbfa71SZhenzhong Duan  *
646f7cbfa71SZhenzhong Duan  * Query an iommu type specific hardware information data from an iommu behind
647f7cbfa71SZhenzhong Duan  * a given device that has been bound to iommufd. This hardware info data will
648f7cbfa71SZhenzhong Duan  * be used to sync capabilities between the virtual iommu and the physical
649f7cbfa71SZhenzhong Duan  * iommu, e.g. a nested translation setup needs to check the hardware info, so
650f7cbfa71SZhenzhong Duan  * a guest stage-1 page table can be compatible with the physical iommu.
651f7cbfa71SZhenzhong Duan  *
652f7cbfa71SZhenzhong Duan  * To capture an iommu type specific hardware information data, @data_uptr and
653f7cbfa71SZhenzhong Duan  * its length @data_len must be provided. Trailing bytes will be zeroed if the
654f7cbfa71SZhenzhong Duan  * user buffer is larger than the data that kernel has. Otherwise, kernel only
655f7cbfa71SZhenzhong Duan  * fills the buffer using the given length in @data_len. If the ioctl succeeds,
656f7cbfa71SZhenzhong Duan  * @data_len will be updated to the length that kernel actually supports,
657f7cbfa71SZhenzhong Duan  * @out_data_type will be filled to decode the data filled in the buffer
658f7cbfa71SZhenzhong Duan  * pointed by @data_uptr. Input @data_len == zero is allowed.
659f7cbfa71SZhenzhong Duan  */
660f7cbfa71SZhenzhong Duan struct iommu_hw_info {
661f7cbfa71SZhenzhong Duan 	__u32 size;
662f7cbfa71SZhenzhong Duan 	__u32 flags;
663f7cbfa71SZhenzhong Duan 	__u32 dev_id;
664f7cbfa71SZhenzhong Duan 	__u32 data_len;
665f7cbfa71SZhenzhong Duan 	__aligned_u64 data_uptr;
666f7cbfa71SZhenzhong Duan 	__u32 out_data_type;
667*1cab5a02SRorie Reyes 	__u8 out_max_pasid_log2;
668*1cab5a02SRorie Reyes 	__u8 __reserved[3];
669efb91426SDaniel Henrique Barboza 	__aligned_u64 out_capabilities;
670f7cbfa71SZhenzhong Duan };
671f7cbfa71SZhenzhong Duan #define IOMMU_GET_HW_INFO _IO(IOMMUFD_TYPE, IOMMUFD_CMD_GET_HW_INFO)
672efb91426SDaniel Henrique Barboza 
673efb91426SDaniel Henrique Barboza /*
674efb91426SDaniel Henrique Barboza  * enum iommufd_hwpt_set_dirty_tracking_flags - Flags for steering dirty
675efb91426SDaniel Henrique Barboza  *                                              tracking
676efb91426SDaniel Henrique Barboza  * @IOMMU_HWPT_DIRTY_TRACKING_ENABLE: Enable dirty tracking
677efb91426SDaniel Henrique Barboza  */
678efb91426SDaniel Henrique Barboza enum iommufd_hwpt_set_dirty_tracking_flags {
679efb91426SDaniel Henrique Barboza 	IOMMU_HWPT_DIRTY_TRACKING_ENABLE = 1,
680efb91426SDaniel Henrique Barboza };
681efb91426SDaniel Henrique Barboza 
682efb91426SDaniel Henrique Barboza /**
683efb91426SDaniel Henrique Barboza  * struct iommu_hwpt_set_dirty_tracking - ioctl(IOMMU_HWPT_SET_DIRTY_TRACKING)
684efb91426SDaniel Henrique Barboza  * @size: sizeof(struct iommu_hwpt_set_dirty_tracking)
685efb91426SDaniel Henrique Barboza  * @flags: Combination of enum iommufd_hwpt_set_dirty_tracking_flags
686efb91426SDaniel Henrique Barboza  * @hwpt_id: HW pagetable ID that represents the IOMMU domain
687efb91426SDaniel Henrique Barboza  * @__reserved: Must be 0
688efb91426SDaniel Henrique Barboza  *
689efb91426SDaniel Henrique Barboza  * Toggle dirty tracking on an HW pagetable.
690efb91426SDaniel Henrique Barboza  */
691efb91426SDaniel Henrique Barboza struct iommu_hwpt_set_dirty_tracking {
692efb91426SDaniel Henrique Barboza 	__u32 size;
693efb91426SDaniel Henrique Barboza 	__u32 flags;
694efb91426SDaniel Henrique Barboza 	__u32 hwpt_id;
695efb91426SDaniel Henrique Barboza 	__u32 __reserved;
696efb91426SDaniel Henrique Barboza };
697efb91426SDaniel Henrique Barboza #define IOMMU_HWPT_SET_DIRTY_TRACKING _IO(IOMMUFD_TYPE, \
698efb91426SDaniel Henrique Barboza 					  IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING)
699efb91426SDaniel Henrique Barboza 
700efb91426SDaniel Henrique Barboza /**
701efb91426SDaniel Henrique Barboza  * enum iommufd_hwpt_get_dirty_bitmap_flags - Flags for getting dirty bits
702efb91426SDaniel Henrique Barboza  * @IOMMU_HWPT_GET_DIRTY_BITMAP_NO_CLEAR: Just read the PTEs without clearing
703efb91426SDaniel Henrique Barboza  *                                        any dirty bits metadata. This flag
704efb91426SDaniel Henrique Barboza  *                                        can be passed in the expectation
705efb91426SDaniel Henrique Barboza  *                                        where the next operation is an unmap
706efb91426SDaniel Henrique Barboza  *                                        of the same IOVA range.
707efb91426SDaniel Henrique Barboza  *
708efb91426SDaniel Henrique Barboza  */
709efb91426SDaniel Henrique Barboza enum iommufd_hwpt_get_dirty_bitmap_flags {
710efb91426SDaniel Henrique Barboza 	IOMMU_HWPT_GET_DIRTY_BITMAP_NO_CLEAR = 1,
711efb91426SDaniel Henrique Barboza };
712efb91426SDaniel Henrique Barboza 
713efb91426SDaniel Henrique Barboza /**
714efb91426SDaniel Henrique Barboza  * struct iommu_hwpt_get_dirty_bitmap - ioctl(IOMMU_HWPT_GET_DIRTY_BITMAP)
715efb91426SDaniel Henrique Barboza  * @size: sizeof(struct iommu_hwpt_get_dirty_bitmap)
716efb91426SDaniel Henrique Barboza  * @hwpt_id: HW pagetable ID that represents the IOMMU domain
717efb91426SDaniel Henrique Barboza  * @flags: Combination of enum iommufd_hwpt_get_dirty_bitmap_flags
718efb91426SDaniel Henrique Barboza  * @__reserved: Must be 0
719efb91426SDaniel Henrique Barboza  * @iova: base IOVA of the bitmap first bit
720efb91426SDaniel Henrique Barboza  * @length: IOVA range size
721efb91426SDaniel Henrique Barboza  * @page_size: page size granularity of each bit in the bitmap
722efb91426SDaniel Henrique Barboza  * @data: bitmap where to set the dirty bits. The bitmap bits each
723efb91426SDaniel Henrique Barboza  *        represent a page_size which you deviate from an arbitrary iova.
724efb91426SDaniel Henrique Barboza  *
725efb91426SDaniel Henrique Barboza  * Checking a given IOVA is dirty:
726efb91426SDaniel Henrique Barboza  *
727efb91426SDaniel Henrique Barboza  *  data[(iova / page_size) / 64] & (1ULL << ((iova / page_size) % 64))
728efb91426SDaniel Henrique Barboza  *
729efb91426SDaniel Henrique Barboza  * Walk the IOMMU pagetables for a given IOVA range to return a bitmap
730efb91426SDaniel Henrique Barboza  * with the dirty IOVAs. In doing so it will also by default clear any
731efb91426SDaniel Henrique Barboza  * dirty bit metadata set in the IOPTE.
732efb91426SDaniel Henrique Barboza  */
733efb91426SDaniel Henrique Barboza struct iommu_hwpt_get_dirty_bitmap {
734efb91426SDaniel Henrique Barboza 	__u32 size;
735efb91426SDaniel Henrique Barboza 	__u32 hwpt_id;
736efb91426SDaniel Henrique Barboza 	__u32 flags;
737efb91426SDaniel Henrique Barboza 	__u32 __reserved;
738efb91426SDaniel Henrique Barboza 	__aligned_u64 iova;
739efb91426SDaniel Henrique Barboza 	__aligned_u64 length;
740efb91426SDaniel Henrique Barboza 	__aligned_u64 page_size;
741efb91426SDaniel Henrique Barboza 	__aligned_u64 data;
742efb91426SDaniel Henrique Barboza };
743efb91426SDaniel Henrique Barboza #define IOMMU_HWPT_GET_DIRTY_BITMAP _IO(IOMMUFD_TYPE, \
744efb91426SDaniel Henrique Barboza 					IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP)
745efb91426SDaniel Henrique Barboza 
7466a02465fSDaniel Henrique Barboza /**
7476a02465fSDaniel Henrique Barboza  * enum iommu_hwpt_invalidate_data_type - IOMMU HWPT Cache Invalidation
7486a02465fSDaniel Henrique Barboza  *                                        Data Type
7496a02465fSDaniel Henrique Barboza  * @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1
75044fe383cSHendrik Brueckner  * @IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3: Invalidation data for ARM SMMUv3
7516a02465fSDaniel Henrique Barboza  */
7526a02465fSDaniel Henrique Barboza enum iommu_hwpt_invalidate_data_type {
7530d2eeef7SBibo Mao 	IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 = 0,
75444fe383cSHendrik Brueckner 	IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3 = 1,
7556a02465fSDaniel Henrique Barboza };
7566a02465fSDaniel Henrique Barboza 
7576a02465fSDaniel Henrique Barboza /**
7586a02465fSDaniel Henrique Barboza  * enum iommu_hwpt_vtd_s1_invalidate_flags - Flags for Intel VT-d
7596a02465fSDaniel Henrique Barboza  *                                           stage-1 cache invalidation
7606a02465fSDaniel Henrique Barboza  * @IOMMU_VTD_INV_FLAGS_LEAF: Indicates whether the invalidation applies
7616a02465fSDaniel Henrique Barboza  *                            to all-levels page structure cache or just
7626a02465fSDaniel Henrique Barboza  *                            the leaf PTE cache.
7636a02465fSDaniel Henrique Barboza  */
7646a02465fSDaniel Henrique Barboza enum iommu_hwpt_vtd_s1_invalidate_flags {
7656a02465fSDaniel Henrique Barboza 	IOMMU_VTD_INV_FLAGS_LEAF = 1 << 0,
7666a02465fSDaniel Henrique Barboza };
7676a02465fSDaniel Henrique Barboza 
7686a02465fSDaniel Henrique Barboza /**
7696a02465fSDaniel Henrique Barboza  * struct iommu_hwpt_vtd_s1_invalidate - Intel VT-d cache invalidation
7706a02465fSDaniel Henrique Barboza  *                                       (IOMMU_HWPT_INVALIDATE_DATA_VTD_S1)
7716a02465fSDaniel Henrique Barboza  * @addr: The start address of the range to be invalidated. It needs to
7726a02465fSDaniel Henrique Barboza  *        be 4KB aligned.
7736a02465fSDaniel Henrique Barboza  * @npages: Number of contiguous 4K pages to be invalidated.
7746a02465fSDaniel Henrique Barboza  * @flags: Combination of enum iommu_hwpt_vtd_s1_invalidate_flags
7756a02465fSDaniel Henrique Barboza  * @__reserved: Must be 0
7766a02465fSDaniel Henrique Barboza  *
7776a02465fSDaniel Henrique Barboza  * The Intel VT-d specific invalidation data for user-managed stage-1 cache
7786a02465fSDaniel Henrique Barboza  * invalidation in nested translation. Userspace uses this structure to
7796a02465fSDaniel Henrique Barboza  * tell the impacted cache scope after modifying the stage-1 page table.
7806a02465fSDaniel Henrique Barboza  *
7816a02465fSDaniel Henrique Barboza  * Invalidating all the caches related to the page table by setting @addr
7826a02465fSDaniel Henrique Barboza  * to be 0 and @npages to be U64_MAX.
7836a02465fSDaniel Henrique Barboza  *
7846a02465fSDaniel Henrique Barboza  * The device TLB will be invalidated automatically if ATS is enabled.
7856a02465fSDaniel Henrique Barboza  */
7866a02465fSDaniel Henrique Barboza struct iommu_hwpt_vtd_s1_invalidate {
7876a02465fSDaniel Henrique Barboza 	__aligned_u64 addr;
7886a02465fSDaniel Henrique Barboza 	__aligned_u64 npages;
7896a02465fSDaniel Henrique Barboza 	__u32 flags;
7906a02465fSDaniel Henrique Barboza 	__u32 __reserved;
7916a02465fSDaniel Henrique Barboza };
7926a02465fSDaniel Henrique Barboza 
7936a02465fSDaniel Henrique Barboza /**
794421ee1ecSDaniel Henrique Barboza  * struct iommu_viommu_arm_smmuv3_invalidate - ARM SMMUv3 cache invalidation
79544fe383cSHendrik Brueckner  *         (IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3)
79644fe383cSHendrik Brueckner  * @cmd: 128-bit cache invalidation command that runs in SMMU CMDQ.
79744fe383cSHendrik Brueckner  *       Must be little-endian.
79844fe383cSHendrik Brueckner  *
79944fe383cSHendrik Brueckner  * Supported command list only when passing in a vIOMMU via @hwpt_id:
80044fe383cSHendrik Brueckner  *     CMDQ_OP_TLBI_NSNH_ALL
80144fe383cSHendrik Brueckner  *     CMDQ_OP_TLBI_NH_VA
80244fe383cSHendrik Brueckner  *     CMDQ_OP_TLBI_NH_VAA
80344fe383cSHendrik Brueckner  *     CMDQ_OP_TLBI_NH_ALL
80444fe383cSHendrik Brueckner  *     CMDQ_OP_TLBI_NH_ASID
80544fe383cSHendrik Brueckner  *     CMDQ_OP_ATC_INV
80644fe383cSHendrik Brueckner  *     CMDQ_OP_CFGI_CD
80744fe383cSHendrik Brueckner  *     CMDQ_OP_CFGI_CD_ALL
80844fe383cSHendrik Brueckner  *
80944fe383cSHendrik Brueckner  * -EIO will be returned if the command is not supported.
81044fe383cSHendrik Brueckner  */
81144fe383cSHendrik Brueckner struct iommu_viommu_arm_smmuv3_invalidate {
81244fe383cSHendrik Brueckner 	__aligned_le64 cmd[2];
81344fe383cSHendrik Brueckner };
81444fe383cSHendrik Brueckner 
81544fe383cSHendrik Brueckner /**
8166a02465fSDaniel Henrique Barboza  * struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE)
8176a02465fSDaniel Henrique Barboza  * @size: sizeof(struct iommu_hwpt_invalidate)
81844fe383cSHendrik Brueckner  * @hwpt_id: ID of a nested HWPT or a vIOMMU, for cache invalidation
8196a02465fSDaniel Henrique Barboza  * @data_uptr: User pointer to an array of driver-specific cache invalidation
8206a02465fSDaniel Henrique Barboza  *             data.
8216a02465fSDaniel Henrique Barboza  * @data_type: One of enum iommu_hwpt_invalidate_data_type, defining the data
8226a02465fSDaniel Henrique Barboza  *             type of all the entries in the invalidation request array. It
8236a02465fSDaniel Henrique Barboza  *             should be a type supported by the hwpt pointed by @hwpt_id.
8246a02465fSDaniel Henrique Barboza  * @entry_len: Length (in bytes) of a request entry in the request array
8256a02465fSDaniel Henrique Barboza  * @entry_num: Input the number of cache invalidation requests in the array.
8266a02465fSDaniel Henrique Barboza  *             Output the number of requests successfully handled by kernel.
8276a02465fSDaniel Henrique Barboza  * @__reserved: Must be 0.
8286a02465fSDaniel Henrique Barboza  *
82944fe383cSHendrik Brueckner  * Invalidate iommu cache for user-managed page table or vIOMMU. Modifications
83044fe383cSHendrik Brueckner  * on a user-managed page table should be followed by this operation, if a HWPT
83144fe383cSHendrik Brueckner  * is passed in via @hwpt_id. Other caches, such as device cache or descriptor
83244fe383cSHendrik Brueckner  * cache can be flushed if a vIOMMU is passed in via the @hwpt_id field.
83344fe383cSHendrik Brueckner  *
8346a02465fSDaniel Henrique Barboza  * Each ioctl can support one or more cache invalidation requests in the array
8356a02465fSDaniel Henrique Barboza  * that has a total size of @entry_len * @entry_num.
8366a02465fSDaniel Henrique Barboza  *
8376a02465fSDaniel Henrique Barboza  * An empty invalidation request array by setting @entry_num==0 is allowed, and
8386a02465fSDaniel Henrique Barboza  * @entry_len and @data_uptr would be ignored in this case. This can be used to
8396a02465fSDaniel Henrique Barboza  * check if the given @data_type is supported or not by kernel.
8406a02465fSDaniel Henrique Barboza  */
8416a02465fSDaniel Henrique Barboza struct iommu_hwpt_invalidate {
8426a02465fSDaniel Henrique Barboza 	__u32 size;
8436a02465fSDaniel Henrique Barboza 	__u32 hwpt_id;
8446a02465fSDaniel Henrique Barboza 	__aligned_u64 data_uptr;
8456a02465fSDaniel Henrique Barboza 	__u32 data_type;
8466a02465fSDaniel Henrique Barboza 	__u32 entry_len;
8476a02465fSDaniel Henrique Barboza 	__u32 entry_num;
8486a02465fSDaniel Henrique Barboza 	__u32 __reserved;
8496a02465fSDaniel Henrique Barboza };
8506a02465fSDaniel Henrique Barboza #define IOMMU_HWPT_INVALIDATE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_INVALIDATE)
8510d2eeef7SBibo Mao 
8520d2eeef7SBibo Mao /**
8530d2eeef7SBibo Mao  * enum iommu_hwpt_pgfault_flags - flags for struct iommu_hwpt_pgfault
8540d2eeef7SBibo Mao  * @IOMMU_PGFAULT_FLAGS_PASID_VALID: The pasid field of the fault data is
8550d2eeef7SBibo Mao  *                                   valid.
8560d2eeef7SBibo Mao  * @IOMMU_PGFAULT_FLAGS_LAST_PAGE: It's the last fault of a fault group.
8570d2eeef7SBibo Mao  */
8580d2eeef7SBibo Mao enum iommu_hwpt_pgfault_flags {
8590d2eeef7SBibo Mao 	IOMMU_PGFAULT_FLAGS_PASID_VALID		= (1 << 0),
8600d2eeef7SBibo Mao 	IOMMU_PGFAULT_FLAGS_LAST_PAGE		= (1 << 1),
8610d2eeef7SBibo Mao };
8620d2eeef7SBibo Mao 
8630d2eeef7SBibo Mao /**
8640d2eeef7SBibo Mao  * enum iommu_hwpt_pgfault_perm - perm bits for struct iommu_hwpt_pgfault
8650d2eeef7SBibo Mao  * @IOMMU_PGFAULT_PERM_READ: request for read permission
8660d2eeef7SBibo Mao  * @IOMMU_PGFAULT_PERM_WRITE: request for write permission
8670d2eeef7SBibo Mao  * @IOMMU_PGFAULT_PERM_EXEC: (PCIE 10.4.1) request with a PASID that has the
8680d2eeef7SBibo Mao  *                           Execute Requested bit set in PASID TLP Prefix.
8690d2eeef7SBibo Mao  * @IOMMU_PGFAULT_PERM_PRIV: (PCIE 10.4.1) request with a PASID that has the
8700d2eeef7SBibo Mao  *                           Privileged Mode Requested bit set in PASID TLP
8710d2eeef7SBibo Mao  *                           Prefix.
8720d2eeef7SBibo Mao  */
8730d2eeef7SBibo Mao enum iommu_hwpt_pgfault_perm {
8740d2eeef7SBibo Mao 	IOMMU_PGFAULT_PERM_READ			= (1 << 0),
8750d2eeef7SBibo Mao 	IOMMU_PGFAULT_PERM_WRITE		= (1 << 1),
8760d2eeef7SBibo Mao 	IOMMU_PGFAULT_PERM_EXEC			= (1 << 2),
8770d2eeef7SBibo Mao 	IOMMU_PGFAULT_PERM_PRIV			= (1 << 3),
8780d2eeef7SBibo Mao };
8790d2eeef7SBibo Mao 
8800d2eeef7SBibo Mao /**
8810d2eeef7SBibo Mao  * struct iommu_hwpt_pgfault - iommu page fault data
8820d2eeef7SBibo Mao  * @flags: Combination of enum iommu_hwpt_pgfault_flags
8830d2eeef7SBibo Mao  * @dev_id: id of the originated device
8840d2eeef7SBibo Mao  * @pasid: Process Address Space ID
8850d2eeef7SBibo Mao  * @grpid: Page Request Group Index
8860d2eeef7SBibo Mao  * @perm: Combination of enum iommu_hwpt_pgfault_perm
887421ee1ecSDaniel Henrique Barboza  * @__reserved: Must be 0.
8880d2eeef7SBibo Mao  * @addr: Fault address
8890d2eeef7SBibo Mao  * @length: a hint of how much data the requestor is expecting to fetch. For
8900d2eeef7SBibo Mao  *          example, if the PRI initiator knows it is going to do a 10MB
8910d2eeef7SBibo Mao  *          transfer, it could fill in 10MB and the OS could pre-fault in
8920d2eeef7SBibo Mao  *          10MB of IOVA. It's default to 0 if there's no such hint.
8930d2eeef7SBibo Mao  * @cookie: kernel-managed cookie identifying a group of fault messages. The
8940d2eeef7SBibo Mao  *          cookie number encoded in the last page fault of the group should
8950d2eeef7SBibo Mao  *          be echoed back in the response message.
8960d2eeef7SBibo Mao  */
8970d2eeef7SBibo Mao struct iommu_hwpt_pgfault {
8980d2eeef7SBibo Mao 	__u32 flags;
8990d2eeef7SBibo Mao 	__u32 dev_id;
9000d2eeef7SBibo Mao 	__u32 pasid;
9010d2eeef7SBibo Mao 	__u32 grpid;
9020d2eeef7SBibo Mao 	__u32 perm;
903421ee1ecSDaniel Henrique Barboza 	__u32 __reserved;
904421ee1ecSDaniel Henrique Barboza 	__aligned_u64 addr;
9050d2eeef7SBibo Mao 	__u32 length;
9060d2eeef7SBibo Mao 	__u32 cookie;
9070d2eeef7SBibo Mao };
9080d2eeef7SBibo Mao 
9090d2eeef7SBibo Mao /**
9100d2eeef7SBibo Mao  * enum iommufd_page_response_code - Return status of fault handlers
9110d2eeef7SBibo Mao  * @IOMMUFD_PAGE_RESP_SUCCESS: Fault has been handled and the page tables
9120d2eeef7SBibo Mao  *                             populated, retry the access. This is the
9130d2eeef7SBibo Mao  *                             "Success" defined in PCI 10.4.2.1.
9140d2eeef7SBibo Mao  * @IOMMUFD_PAGE_RESP_INVALID: Could not handle this fault, don't retry the
9150d2eeef7SBibo Mao  *                             access. This is the "Invalid Request" in PCI
9160d2eeef7SBibo Mao  *                             10.4.2.1.
9170d2eeef7SBibo Mao  */
9180d2eeef7SBibo Mao enum iommufd_page_response_code {
9190d2eeef7SBibo Mao 	IOMMUFD_PAGE_RESP_SUCCESS = 0,
9200d2eeef7SBibo Mao 	IOMMUFD_PAGE_RESP_INVALID = 1,
9210d2eeef7SBibo Mao };
9220d2eeef7SBibo Mao 
9230d2eeef7SBibo Mao /**
9240d2eeef7SBibo Mao  * struct iommu_hwpt_page_response - IOMMU page fault response
9250d2eeef7SBibo Mao  * @cookie: The kernel-managed cookie reported in the fault message.
9260d2eeef7SBibo Mao  * @code: One of response code in enum iommufd_page_response_code.
9270d2eeef7SBibo Mao  */
9280d2eeef7SBibo Mao struct iommu_hwpt_page_response {
9290d2eeef7SBibo Mao 	__u32 cookie;
9300d2eeef7SBibo Mao 	__u32 code;
9310d2eeef7SBibo Mao };
9320d2eeef7SBibo Mao 
9330d2eeef7SBibo Mao /**
9340d2eeef7SBibo Mao  * struct iommu_fault_alloc - ioctl(IOMMU_FAULT_QUEUE_ALLOC)
9350d2eeef7SBibo Mao  * @size: sizeof(struct iommu_fault_alloc)
9360d2eeef7SBibo Mao  * @flags: Must be 0
9370d2eeef7SBibo Mao  * @out_fault_id: The ID of the new FAULT
9380d2eeef7SBibo Mao  * @out_fault_fd: The fd of the new FAULT
9390d2eeef7SBibo Mao  *
9400d2eeef7SBibo Mao  * Explicitly allocate a fault handling object.
9410d2eeef7SBibo Mao  */
9420d2eeef7SBibo Mao struct iommu_fault_alloc {
9430d2eeef7SBibo Mao 	__u32 size;
9440d2eeef7SBibo Mao 	__u32 flags;
9450d2eeef7SBibo Mao 	__u32 out_fault_id;
9460d2eeef7SBibo Mao 	__u32 out_fault_fd;
9470d2eeef7SBibo Mao };
9480d2eeef7SBibo Mao #define IOMMU_FAULT_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_FAULT_QUEUE_ALLOC)
94944fe383cSHendrik Brueckner 
95044fe383cSHendrik Brueckner /**
95144fe383cSHendrik Brueckner  * enum iommu_viommu_type - Virtual IOMMU Type
95244fe383cSHendrik Brueckner  * @IOMMU_VIOMMU_TYPE_DEFAULT: Reserved for future use
95344fe383cSHendrik Brueckner  * @IOMMU_VIOMMU_TYPE_ARM_SMMUV3: ARM SMMUv3 driver specific type
95444fe383cSHendrik Brueckner  */
95544fe383cSHendrik Brueckner enum iommu_viommu_type {
95644fe383cSHendrik Brueckner 	IOMMU_VIOMMU_TYPE_DEFAULT = 0,
95744fe383cSHendrik Brueckner 	IOMMU_VIOMMU_TYPE_ARM_SMMUV3 = 1,
95844fe383cSHendrik Brueckner };
95944fe383cSHendrik Brueckner 
96044fe383cSHendrik Brueckner /**
96144fe383cSHendrik Brueckner  * struct iommu_viommu_alloc - ioctl(IOMMU_VIOMMU_ALLOC)
96244fe383cSHendrik Brueckner  * @size: sizeof(struct iommu_viommu_alloc)
96344fe383cSHendrik Brueckner  * @flags: Must be 0
96444fe383cSHendrik Brueckner  * @type: Type of the virtual IOMMU. Must be defined in enum iommu_viommu_type
96544fe383cSHendrik Brueckner  * @dev_id: The device's physical IOMMU will be used to back the virtual IOMMU
96644fe383cSHendrik Brueckner  * @hwpt_id: ID of a nesting parent HWPT to associate to
96744fe383cSHendrik Brueckner  * @out_viommu_id: Output virtual IOMMU ID for the allocated object
96844fe383cSHendrik Brueckner  *
96944fe383cSHendrik Brueckner  * Allocate a virtual IOMMU object, representing the underlying physical IOMMU's
97044fe383cSHendrik Brueckner  * virtualization support that is a security-isolated slice of the real IOMMU HW
97144fe383cSHendrik Brueckner  * that is unique to a specific VM. Operations global to the IOMMU are connected
97244fe383cSHendrik Brueckner  * to the vIOMMU, such as:
97344fe383cSHendrik Brueckner  * - Security namespace for guest owned ID, e.g. guest-controlled cache tags
97444fe383cSHendrik Brueckner  * - Non-device-affiliated event reporting, e.g. invalidation queue errors
97544fe383cSHendrik Brueckner  * - Access to a sharable nesting parent pagetable across physical IOMMUs
97644fe383cSHendrik Brueckner  * - Virtualization of various platforms IDs, e.g. RIDs and others
97744fe383cSHendrik Brueckner  * - Delivery of paravirtualized invalidation
97844fe383cSHendrik Brueckner  * - Direct assigned invalidation queues
97944fe383cSHendrik Brueckner  * - Direct assigned interrupts
98044fe383cSHendrik Brueckner  */
98144fe383cSHendrik Brueckner struct iommu_viommu_alloc {
98244fe383cSHendrik Brueckner 	__u32 size;
98344fe383cSHendrik Brueckner 	__u32 flags;
98444fe383cSHendrik Brueckner 	__u32 type;
98544fe383cSHendrik Brueckner 	__u32 dev_id;
98644fe383cSHendrik Brueckner 	__u32 hwpt_id;
98744fe383cSHendrik Brueckner 	__u32 out_viommu_id;
98844fe383cSHendrik Brueckner };
98944fe383cSHendrik Brueckner #define IOMMU_VIOMMU_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VIOMMU_ALLOC)
99044fe383cSHendrik Brueckner 
99144fe383cSHendrik Brueckner /**
99244fe383cSHendrik Brueckner  * struct iommu_vdevice_alloc - ioctl(IOMMU_VDEVICE_ALLOC)
99344fe383cSHendrik Brueckner  * @size: sizeof(struct iommu_vdevice_alloc)
99444fe383cSHendrik Brueckner  * @viommu_id: vIOMMU ID to associate with the virtual device
99544fe383cSHendrik Brueckner  * @dev_id: The physical device to allocate a virtual instance on the vIOMMU
99644fe383cSHendrik Brueckner  * @out_vdevice_id: Object handle for the vDevice. Pass to IOMMU_DESTORY
99744fe383cSHendrik Brueckner  * @virt_id: Virtual device ID per vIOMMU, e.g. vSID of ARM SMMUv3, vDeviceID
99844fe383cSHendrik Brueckner  *           of AMD IOMMU, and vRID of a nested Intel VT-d to a Context Table
99944fe383cSHendrik Brueckner  *
100044fe383cSHendrik Brueckner  * Allocate a virtual device instance (for a physical device) against a vIOMMU.
100144fe383cSHendrik Brueckner  * This instance holds the device's information (related to its vIOMMU) in a VM.
100244fe383cSHendrik Brueckner  */
100344fe383cSHendrik Brueckner struct iommu_vdevice_alloc {
100444fe383cSHendrik Brueckner 	__u32 size;
100544fe383cSHendrik Brueckner 	__u32 viommu_id;
100644fe383cSHendrik Brueckner 	__u32 dev_id;
100744fe383cSHendrik Brueckner 	__u32 out_vdevice_id;
100844fe383cSHendrik Brueckner 	__aligned_u64 virt_id;
100944fe383cSHendrik Brueckner };
101044fe383cSHendrik Brueckner #define IOMMU_VDEVICE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VDEVICE_ALLOC)
101144fe383cSHendrik Brueckner 
101244fe383cSHendrik Brueckner /**
101344fe383cSHendrik Brueckner  * struct iommu_ioas_change_process - ioctl(VFIO_IOAS_CHANGE_PROCESS)
101444fe383cSHendrik Brueckner  * @size: sizeof(struct iommu_ioas_change_process)
101544fe383cSHendrik Brueckner  * @__reserved: Must be 0
101644fe383cSHendrik Brueckner  *
101744fe383cSHendrik Brueckner  * This transfers pinned memory counts for every memory map in every IOAS
101844fe383cSHendrik Brueckner  * in the context to the current process.  This only supports maps created
101944fe383cSHendrik Brueckner  * with IOMMU_IOAS_MAP_FILE, and returns EINVAL if other maps are present.
102044fe383cSHendrik Brueckner  * If the ioctl returns a failure status, then nothing is changed.
102144fe383cSHendrik Brueckner  *
102244fe383cSHendrik Brueckner  * This API is useful for transferring operation of a device from one process
102344fe383cSHendrik Brueckner  * to another, such as during userland live update.
102444fe383cSHendrik Brueckner  */
102544fe383cSHendrik Brueckner struct iommu_ioas_change_process {
102644fe383cSHendrik Brueckner 	__u32 size;
102744fe383cSHendrik Brueckner 	__u32 __reserved;
102844fe383cSHendrik Brueckner };
102944fe383cSHendrik Brueckner 
103044fe383cSHendrik Brueckner #define IOMMU_IOAS_CHANGE_PROCESS \
103144fe383cSHendrik Brueckner 	_IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_CHANGE_PROCESS)
103244fe383cSHendrik Brueckner 
1033*1cab5a02SRorie Reyes /**
1034*1cab5a02SRorie Reyes  * enum iommu_veventq_flag - flag for struct iommufd_vevent_header
1035*1cab5a02SRorie Reyes  * @IOMMU_VEVENTQ_FLAG_LOST_EVENTS: vEVENTQ has lost vEVENTs
1036*1cab5a02SRorie Reyes  */
1037*1cab5a02SRorie Reyes enum iommu_veventq_flag {
1038*1cab5a02SRorie Reyes 	IOMMU_VEVENTQ_FLAG_LOST_EVENTS = (1U << 0),
1039*1cab5a02SRorie Reyes };
1040*1cab5a02SRorie Reyes 
1041*1cab5a02SRorie Reyes /**
1042*1cab5a02SRorie Reyes  * struct iommufd_vevent_header - Virtual Event Header for a vEVENTQ Status
1043*1cab5a02SRorie Reyes  * @flags: Combination of enum iommu_veventq_flag
1044*1cab5a02SRorie Reyes  * @sequence: The sequence index of a vEVENT in the vEVENTQ, with a range of
1045*1cab5a02SRorie Reyes  *            [0, INT_MAX] where the following index of INT_MAX is 0
1046*1cab5a02SRorie Reyes  *
1047*1cab5a02SRorie Reyes  * Each iommufd_vevent_header reports a sequence index of the following vEVENT:
1048*1cab5a02SRorie Reyes  *
1049*1cab5a02SRorie Reyes  * +----------------------+-------+----------------------+-------+---+-------+
1050*1cab5a02SRorie Reyes  * | header0 {sequence=0} | data0 | header1 {sequence=1} | data1 |...| dataN |
1051*1cab5a02SRorie Reyes  * +----------------------+-------+----------------------+-------+---+-------+
1052*1cab5a02SRorie Reyes  *
1053*1cab5a02SRorie Reyes  * And this sequence index is expected to be monotonic to the sequence index of
1054*1cab5a02SRorie Reyes  * the previous vEVENT. If two adjacent sequence indexes has a delta larger than
1055*1cab5a02SRorie Reyes  * 1, it means that delta - 1 number of vEVENTs has lost, e.g. two lost vEVENTs:
1056*1cab5a02SRorie Reyes  *
1057*1cab5a02SRorie Reyes  * +-----+----------------------+-------+----------------------+-------+-----+
1058*1cab5a02SRorie Reyes  * | ... | header3 {sequence=3} | data3 | header6 {sequence=6} | data6 | ... |
1059*1cab5a02SRorie Reyes  * +-----+----------------------+-------+----------------------+-------+-----+
1060*1cab5a02SRorie Reyes  *
1061*1cab5a02SRorie Reyes  * If a vEVENT lost at the tail of the vEVENTQ and there is no following vEVENT
1062*1cab5a02SRorie Reyes  * providing the next sequence index, an IOMMU_VEVENTQ_FLAG_LOST_EVENTS header
1063*1cab5a02SRorie Reyes  * would be added to the tail, and no data would follow this header:
1064*1cab5a02SRorie Reyes  *
1065*1cab5a02SRorie Reyes  * +--+----------------------+-------+-----------------------------------------+
1066*1cab5a02SRorie Reyes  * |..| header3 {sequence=3} | data3 | header4 {flags=LOST_EVENTS, sequence=4} |
1067*1cab5a02SRorie Reyes  * +--+----------------------+-------+-----------------------------------------+
1068*1cab5a02SRorie Reyes  */
1069*1cab5a02SRorie Reyes struct iommufd_vevent_header {
1070*1cab5a02SRorie Reyes 	__u32 flags;
1071*1cab5a02SRorie Reyes 	__u32 sequence;
1072*1cab5a02SRorie Reyes };
1073*1cab5a02SRorie Reyes 
1074*1cab5a02SRorie Reyes /**
1075*1cab5a02SRorie Reyes  * enum iommu_veventq_type - Virtual Event Queue Type
1076*1cab5a02SRorie Reyes  * @IOMMU_VEVENTQ_TYPE_DEFAULT: Reserved for future use
1077*1cab5a02SRorie Reyes  * @IOMMU_VEVENTQ_TYPE_ARM_SMMUV3: ARM SMMUv3 Virtual Event Queue
1078*1cab5a02SRorie Reyes  */
1079*1cab5a02SRorie Reyes enum iommu_veventq_type {
1080*1cab5a02SRorie Reyes 	IOMMU_VEVENTQ_TYPE_DEFAULT = 0,
1081*1cab5a02SRorie Reyes 	IOMMU_VEVENTQ_TYPE_ARM_SMMUV3 = 1,
1082*1cab5a02SRorie Reyes };
1083*1cab5a02SRorie Reyes 
1084*1cab5a02SRorie Reyes /**
1085*1cab5a02SRorie Reyes  * struct iommu_vevent_arm_smmuv3 - ARM SMMUv3 Virtual Event
1086*1cab5a02SRorie Reyes  *                                  (IOMMU_VEVENTQ_TYPE_ARM_SMMUV3)
1087*1cab5a02SRorie Reyes  * @evt: 256-bit ARM SMMUv3 Event record, little-endian.
1088*1cab5a02SRorie Reyes  *       Reported event records: (Refer to "7.3 Event records" in SMMUv3 HW Spec)
1089*1cab5a02SRorie Reyes  *       - 0x04 C_BAD_STE
1090*1cab5a02SRorie Reyes  *       - 0x06 F_STREAM_DISABLED
1091*1cab5a02SRorie Reyes  *       - 0x08 C_BAD_SUBSTREAMID
1092*1cab5a02SRorie Reyes  *       - 0x0a C_BAD_CD
1093*1cab5a02SRorie Reyes  *       - 0x10 F_TRANSLATION
1094*1cab5a02SRorie Reyes  *       - 0x11 F_ADDR_SIZE
1095*1cab5a02SRorie Reyes  *       - 0x12 F_ACCESS
1096*1cab5a02SRorie Reyes  *       - 0x13 F_PERMISSION
1097*1cab5a02SRorie Reyes  *
1098*1cab5a02SRorie Reyes  * StreamID field reports a virtual device ID. To receive a virtual event for a
1099*1cab5a02SRorie Reyes  * device, a vDEVICE must be allocated via IOMMU_VDEVICE_ALLOC.
1100*1cab5a02SRorie Reyes  */
1101*1cab5a02SRorie Reyes struct iommu_vevent_arm_smmuv3 {
1102*1cab5a02SRorie Reyes 	__aligned_le64 evt[4];
1103*1cab5a02SRorie Reyes };
1104*1cab5a02SRorie Reyes 
1105*1cab5a02SRorie Reyes /**
1106*1cab5a02SRorie Reyes  * struct iommu_veventq_alloc - ioctl(IOMMU_VEVENTQ_ALLOC)
1107*1cab5a02SRorie Reyes  * @size: sizeof(struct iommu_veventq_alloc)
1108*1cab5a02SRorie Reyes  * @flags: Must be 0
1109*1cab5a02SRorie Reyes  * @viommu_id: virtual IOMMU ID to associate the vEVENTQ with
1110*1cab5a02SRorie Reyes  * @type: Type of the vEVENTQ. Must be defined in enum iommu_veventq_type
1111*1cab5a02SRorie Reyes  * @veventq_depth: Maximum number of events in the vEVENTQ
1112*1cab5a02SRorie Reyes  * @out_veventq_id: The ID of the new vEVENTQ
1113*1cab5a02SRorie Reyes  * @out_veventq_fd: The fd of the new vEVENTQ. User space must close the
1114*1cab5a02SRorie Reyes  *                  successfully returned fd after using it
1115*1cab5a02SRorie Reyes  * @__reserved: Must be 0
1116*1cab5a02SRorie Reyes  *
1117*1cab5a02SRorie Reyes  * Explicitly allocate a virtual event queue interface for a vIOMMU. A vIOMMU
1118*1cab5a02SRorie Reyes  * can have multiple FDs for different types, but is confined to one per @type.
1119*1cab5a02SRorie Reyes  * User space should open the @out_veventq_fd to read vEVENTs out of a vEVENTQ,
1120*1cab5a02SRorie Reyes  * if there are vEVENTs available. A vEVENTQ will lose events due to overflow,
1121*1cab5a02SRorie Reyes  * if the number of the vEVENTs hits @veventq_depth.
1122*1cab5a02SRorie Reyes  *
1123*1cab5a02SRorie Reyes  * Each vEVENT in a vEVENTQ encloses a struct iommufd_vevent_header followed by
1124*1cab5a02SRorie Reyes  * a type-specific data structure, in a normal case:
1125*1cab5a02SRorie Reyes  *
1126*1cab5a02SRorie Reyes  * +-+---------+-------+---------+-------+-----+---------+-------+-+
1127*1cab5a02SRorie Reyes  * | | header0 | data0 | header1 | data1 | ... | headerN | dataN | |
1128*1cab5a02SRorie Reyes  * +-+---------+-------+---------+-------+-----+---------+-------+-+
1129*1cab5a02SRorie Reyes  *
1130*1cab5a02SRorie Reyes  * unless a tailing IOMMU_VEVENTQ_FLAG_LOST_EVENTS header is logged (refer to
1131*1cab5a02SRorie Reyes  * struct iommufd_vevent_header).
1132*1cab5a02SRorie Reyes  */
1133*1cab5a02SRorie Reyes struct iommu_veventq_alloc {
1134*1cab5a02SRorie Reyes 	__u32 size;
1135*1cab5a02SRorie Reyes 	__u32 flags;
1136*1cab5a02SRorie Reyes 	__u32 viommu_id;
1137*1cab5a02SRorie Reyes 	__u32 type;
1138*1cab5a02SRorie Reyes 	__u32 veventq_depth;
1139*1cab5a02SRorie Reyes 	__u32 out_veventq_id;
1140*1cab5a02SRorie Reyes 	__u32 out_veventq_fd;
1141*1cab5a02SRorie Reyes 	__u32 __reserved;
1142*1cab5a02SRorie Reyes };
1143*1cab5a02SRorie Reyes #define IOMMU_VEVENTQ_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VEVENTQ_ALLOC)
1144f7cbfa71SZhenzhong Duan #endif
1145