1 /* 2 * qemu user main 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 */ 20 #include <stdlib.h> 21 #include <stdio.h> 22 #include <stdarg.h> 23 #include <string.h> 24 #include <errno.h> 25 #include <unistd.h> 26 27 #include "qemu.h" 28 29 #define DEBUG_LOGFILE "/tmp/qemu.log" 30 31 static const char *interp_prefix = CONFIG_QEMU_PREFIX; 32 const char *qemu_uname_release = CONFIG_UNAME_RELEASE; 33 34 #if defined(__i386__) && !defined(CONFIG_STATIC) 35 /* Force usage of an ELF interpreter even if it is an ELF shared 36 object ! */ 37 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2"; 38 #endif 39 40 /* for recent libc, we add these dummy symbols which are not declared 41 when generating a linked object (bug in ld ?) */ 42 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC) 43 asm(".globl __preinit_array_start\n" 44 ".globl __preinit_array_end\n" 45 ".globl __init_array_start\n" 46 ".globl __init_array_end\n" 47 ".globl __fini_array_start\n" 48 ".globl __fini_array_end\n" 49 ".section \".rodata\"\n" 50 "__preinit_array_start:\n" 51 "__preinit_array_end:\n" 52 "__init_array_start:\n" 53 "__init_array_end:\n" 54 "__fini_array_start:\n" 55 "__fini_array_end:\n" 56 ".long 0\n"); 57 #endif 58 59 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so 60 we allocate a bigger stack. Need a better solution, for example 61 by remapping the process stack directly at the right place */ 62 unsigned long x86_stack_size = 512 * 1024; 63 64 void gemu_log(const char *fmt, ...) 65 { 66 va_list ap; 67 68 va_start(ap, fmt); 69 vfprintf(stderr, fmt, ap); 70 va_end(ap); 71 } 72 73 void cpu_outb(CPUState *env, int addr, int val) 74 { 75 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val); 76 } 77 78 void cpu_outw(CPUState *env, int addr, int val) 79 { 80 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val); 81 } 82 83 void cpu_outl(CPUState *env, int addr, int val) 84 { 85 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val); 86 } 87 88 int cpu_inb(CPUState *env, int addr) 89 { 90 fprintf(stderr, "inb: port=0x%04x\n", addr); 91 return 0; 92 } 93 94 int cpu_inw(CPUState *env, int addr) 95 { 96 fprintf(stderr, "inw: port=0x%04x\n", addr); 97 return 0; 98 } 99 100 int cpu_inl(CPUState *env, int addr) 101 { 102 fprintf(stderr, "inl: port=0x%04x\n", addr); 103 return 0; 104 } 105 106 int cpu_get_pic_interrupt(CPUState *env) 107 { 108 return -1; 109 } 110 111 /* timers for rdtsc */ 112 113 #if 0 114 115 static uint64_t emu_time; 116 117 int64_t cpu_get_real_ticks(void) 118 { 119 return emu_time++; 120 } 121 122 #endif 123 124 #ifdef TARGET_I386 125 /***********************************************************/ 126 /* CPUX86 core interface */ 127 128 void cpu_smm_update(CPUState *env) 129 { 130 } 131 132 uint64_t cpu_get_tsc(CPUX86State *env) 133 { 134 return cpu_get_real_ticks(); 135 } 136 137 static void write_dt(void *ptr, unsigned long addr, unsigned long limit, 138 int flags) 139 { 140 unsigned int e1, e2; 141 uint32_t *p; 142 e1 = (addr << 16) | (limit & 0xffff); 143 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); 144 e2 |= flags; 145 p = ptr; 146 p[0] = tswapl(e1); 147 p[1] = tswapl(e2); 148 } 149 150 #if TARGET_X86_64 151 uint64_t idt_table[512]; 152 153 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl, 154 uint64_t addr, unsigned int sel) 155 { 156 unsigned int e1, e2; 157 uint32_t *p; 158 e1 = (addr & 0xffff) | (sel << 16); 159 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); 160 p = ptr; 161 p[0] = tswapl(e1); 162 p[1] = tswapl(e2); 163 p[2] = addr >> 32; 164 } 165 /* only dpl matters as we do only user space emulation */ 166 static void set_idt(int n, unsigned int dpl) 167 { 168 set_gate64(idt_table + n * 2, 0, dpl, 0, 0); 169 } 170 #else 171 uint64_t idt_table[256]; 172 173 static void set_gate(void *ptr, unsigned int type, unsigned int dpl, 174 uint32_t addr, unsigned int sel) 175 { 176 unsigned int e1, e2; 177 uint32_t *p; 178 e1 = (addr & 0xffff) | (sel << 16); 179 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); 180 p = ptr; 181 p[0] = tswapl(e1); 182 p[1] = tswapl(e2); 183 } 184 185 /* only dpl matters as we do only user space emulation */ 186 static void set_idt(int n, unsigned int dpl) 187 { 188 set_gate(idt_table + n, 0, dpl, 0, 0); 189 } 190 #endif 191 192 void cpu_loop(CPUX86State *env) 193 { 194 int trapnr; 195 abi_ulong pc; 196 target_siginfo_t info; 197 198 for(;;) { 199 trapnr = cpu_x86_exec(env); 200 switch(trapnr) { 201 case 0x80: 202 /* linux syscall from int $0x80 */ 203 env->regs[R_EAX] = do_syscall(env, 204 env->regs[R_EAX], 205 env->regs[R_EBX], 206 env->regs[R_ECX], 207 env->regs[R_EDX], 208 env->regs[R_ESI], 209 env->regs[R_EDI], 210 env->regs[R_EBP]); 211 break; 212 #ifndef TARGET_ABI32 213 case EXCP_SYSCALL: 214 /* linux syscall from syscall intruction */ 215 env->regs[R_EAX] = do_syscall(env, 216 env->regs[R_EAX], 217 env->regs[R_EDI], 218 env->regs[R_ESI], 219 env->regs[R_EDX], 220 env->regs[10], 221 env->regs[8], 222 env->regs[9]); 223 env->eip = env->exception_next_eip; 224 break; 225 #endif 226 case EXCP0B_NOSEG: 227 case EXCP0C_STACK: 228 info.si_signo = SIGBUS; 229 info.si_errno = 0; 230 info.si_code = TARGET_SI_KERNEL; 231 info._sifields._sigfault._addr = 0; 232 queue_signal(info.si_signo, &info); 233 break; 234 case EXCP0D_GPF: 235 /* XXX: potential problem if ABI32 */ 236 #ifndef TARGET_X86_64 237 if (env->eflags & VM_MASK) { 238 handle_vm86_fault(env); 239 } else 240 #endif 241 { 242 info.si_signo = SIGSEGV; 243 info.si_errno = 0; 244 info.si_code = TARGET_SI_KERNEL; 245 info._sifields._sigfault._addr = 0; 246 queue_signal(info.si_signo, &info); 247 } 248 break; 249 case EXCP0E_PAGE: 250 info.si_signo = SIGSEGV; 251 info.si_errno = 0; 252 if (!(env->error_code & 1)) 253 info.si_code = TARGET_SEGV_MAPERR; 254 else 255 info.si_code = TARGET_SEGV_ACCERR; 256 info._sifields._sigfault._addr = env->cr[2]; 257 queue_signal(info.si_signo, &info); 258 break; 259 case EXCP00_DIVZ: 260 #ifndef TARGET_X86_64 261 if (env->eflags & VM_MASK) { 262 handle_vm86_trap(env, trapnr); 263 } else 264 #endif 265 { 266 /* division by zero */ 267 info.si_signo = SIGFPE; 268 info.si_errno = 0; 269 info.si_code = TARGET_FPE_INTDIV; 270 info._sifields._sigfault._addr = env->eip; 271 queue_signal(info.si_signo, &info); 272 } 273 break; 274 case EXCP01_SSTP: 275 case EXCP03_INT3: 276 #ifndef TARGET_X86_64 277 if (env->eflags & VM_MASK) { 278 handle_vm86_trap(env, trapnr); 279 } else 280 #endif 281 { 282 info.si_signo = SIGTRAP; 283 info.si_errno = 0; 284 if (trapnr == EXCP01_SSTP) { 285 info.si_code = TARGET_TRAP_BRKPT; 286 info._sifields._sigfault._addr = env->eip; 287 } else { 288 info.si_code = TARGET_SI_KERNEL; 289 info._sifields._sigfault._addr = 0; 290 } 291 queue_signal(info.si_signo, &info); 292 } 293 break; 294 case EXCP04_INTO: 295 case EXCP05_BOUND: 296 #ifndef TARGET_X86_64 297 if (env->eflags & VM_MASK) { 298 handle_vm86_trap(env, trapnr); 299 } else 300 #endif 301 { 302 info.si_signo = SIGSEGV; 303 info.si_errno = 0; 304 info.si_code = TARGET_SI_KERNEL; 305 info._sifields._sigfault._addr = 0; 306 queue_signal(info.si_signo, &info); 307 } 308 break; 309 case EXCP06_ILLOP: 310 info.si_signo = SIGILL; 311 info.si_errno = 0; 312 info.si_code = TARGET_ILL_ILLOPN; 313 info._sifields._sigfault._addr = env->eip; 314 queue_signal(info.si_signo, &info); 315 break; 316 case EXCP_INTERRUPT: 317 /* just indicate that signals should be handled asap */ 318 break; 319 case EXCP_DEBUG: 320 { 321 int sig; 322 323 sig = gdb_handlesig (env, TARGET_SIGTRAP); 324 if (sig) 325 { 326 info.si_signo = sig; 327 info.si_errno = 0; 328 info.si_code = TARGET_TRAP_BRKPT; 329 queue_signal(info.si_signo, &info); 330 } 331 } 332 break; 333 default: 334 pc = env->segs[R_CS].base + env->eip; 335 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n", 336 (long)pc, trapnr); 337 abort(); 338 } 339 process_pending_signals(env); 340 } 341 } 342 #endif 343 344 #ifdef TARGET_ARM 345 346 /* XXX: find a better solution */ 347 extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end); 348 349 static void arm_cache_flush(abi_ulong start, abi_ulong last) 350 { 351 abi_ulong addr, last1; 352 353 if (last < start) 354 return; 355 addr = start; 356 for(;;) { 357 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1; 358 if (last1 > last) 359 last1 = last; 360 tb_invalidate_page_range(addr, last1 + 1); 361 if (last1 == last) 362 break; 363 addr = last1 + 1; 364 } 365 } 366 367 void cpu_loop(CPUARMState *env) 368 { 369 int trapnr; 370 unsigned int n, insn; 371 target_siginfo_t info; 372 uint32_t addr; 373 374 for(;;) { 375 trapnr = cpu_arm_exec(env); 376 switch(trapnr) { 377 case EXCP_UDEF: 378 { 379 TaskState *ts = env->opaque; 380 uint32_t opcode; 381 382 /* we handle the FPU emulation here, as Linux */ 383 /* we get the opcode */ 384 opcode = tget32(env->regs[15]); 385 386 if (EmulateAll(opcode, &ts->fpa, env) == 0) { 387 info.si_signo = SIGILL; 388 info.si_errno = 0; 389 info.si_code = TARGET_ILL_ILLOPN; 390 info._sifields._sigfault._addr = env->regs[15]; 391 queue_signal(info.si_signo, &info); 392 } else { 393 /* increment PC */ 394 env->regs[15] += 4; 395 } 396 } 397 break; 398 case EXCP_SWI: 399 case EXCP_BKPT: 400 { 401 env->eabi = 1; 402 /* system call */ 403 if (trapnr == EXCP_BKPT) { 404 if (env->thumb) { 405 insn = tget16(env->regs[15]); 406 n = insn & 0xff; 407 env->regs[15] += 2; 408 } else { 409 insn = tget32(env->regs[15]); 410 n = (insn & 0xf) | ((insn >> 4) & 0xff0); 411 env->regs[15] += 4; 412 } 413 } else { 414 if (env->thumb) { 415 insn = tget16(env->regs[15] - 2); 416 n = insn & 0xff; 417 } else { 418 insn = tget32(env->regs[15] - 4); 419 n = insn & 0xffffff; 420 } 421 } 422 423 if (n == ARM_NR_cacheflush) { 424 arm_cache_flush(env->regs[0], env->regs[1]); 425 } else if (n == ARM_NR_semihosting 426 || n == ARM_NR_thumb_semihosting) { 427 env->regs[0] = do_arm_semihosting (env); 428 } else if (n == 0 || n >= ARM_SYSCALL_BASE 429 || (env->thumb && n == ARM_THUMB_SYSCALL)) { 430 /* linux syscall */ 431 if (env->thumb || n == 0) { 432 n = env->regs[7]; 433 } else { 434 n -= ARM_SYSCALL_BASE; 435 env->eabi = 0; 436 } 437 env->regs[0] = do_syscall(env, 438 n, 439 env->regs[0], 440 env->regs[1], 441 env->regs[2], 442 env->regs[3], 443 env->regs[4], 444 env->regs[5]); 445 } else { 446 goto error; 447 } 448 } 449 break; 450 case EXCP_INTERRUPT: 451 /* just indicate that signals should be handled asap */ 452 break; 453 case EXCP_PREFETCH_ABORT: 454 addr = env->cp15.c6_data; 455 goto do_segv; 456 case EXCP_DATA_ABORT: 457 addr = env->cp15.c6_insn; 458 goto do_segv; 459 do_segv: 460 { 461 info.si_signo = SIGSEGV; 462 info.si_errno = 0; 463 /* XXX: check env->error_code */ 464 info.si_code = TARGET_SEGV_MAPERR; 465 info._sifields._sigfault._addr = addr; 466 queue_signal(info.si_signo, &info); 467 } 468 break; 469 case EXCP_DEBUG: 470 { 471 int sig; 472 473 sig = gdb_handlesig (env, TARGET_SIGTRAP); 474 if (sig) 475 { 476 info.si_signo = sig; 477 info.si_errno = 0; 478 info.si_code = TARGET_TRAP_BRKPT; 479 queue_signal(info.si_signo, &info); 480 } 481 } 482 break; 483 default: 484 error: 485 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 486 trapnr); 487 cpu_dump_state(env, stderr, fprintf, 0); 488 abort(); 489 } 490 process_pending_signals(env); 491 } 492 } 493 494 #endif 495 496 #ifdef TARGET_SPARC 497 498 //#define DEBUG_WIN 499 500 /* WARNING: dealing with register windows _is_ complicated. More info 501 can be found at http://www.sics.se/~psm/sparcstack.html */ 502 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) 503 { 504 index = (index + cwp * 16) & (16 * NWINDOWS - 1); 505 /* wrap handling : if cwp is on the last window, then we use the 506 registers 'after' the end */ 507 if (index < 8 && env->cwp == (NWINDOWS - 1)) 508 index += (16 * NWINDOWS); 509 return index; 510 } 511 512 /* save the register window 'cwp1' */ 513 static inline void save_window_offset(CPUSPARCState *env, int cwp1) 514 { 515 unsigned int i; 516 abi_ulong sp_ptr; 517 518 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; 519 #if defined(DEBUG_WIN) 520 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n", 521 (int)sp_ptr, cwp1); 522 #endif 523 for(i = 0; i < 16; i++) { 524 tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]); 525 sp_ptr += sizeof(abi_ulong); 526 } 527 } 528 529 static void save_window(CPUSPARCState *env) 530 { 531 #ifndef TARGET_SPARC64 532 unsigned int new_wim; 533 new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) & 534 ((1LL << NWINDOWS) - 1); 535 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); 536 env->wim = new_wim; 537 #else 538 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); 539 env->cansave++; 540 env->canrestore--; 541 #endif 542 } 543 544 static void restore_window(CPUSPARCState *env) 545 { 546 unsigned int new_wim, i, cwp1; 547 abi_ulong sp_ptr; 548 549 new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) & 550 ((1LL << NWINDOWS) - 1); 551 552 /* restore the invalid window */ 553 cwp1 = (env->cwp + 1) & (NWINDOWS - 1); 554 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; 555 #if defined(DEBUG_WIN) 556 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n", 557 (int)sp_ptr, cwp1); 558 #endif 559 for(i = 0; i < 16; i++) { 560 env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr); 561 sp_ptr += sizeof(abi_ulong); 562 } 563 env->wim = new_wim; 564 #ifdef TARGET_SPARC64 565 env->canrestore++; 566 if (env->cleanwin < NWINDOWS - 1) 567 env->cleanwin++; 568 env->cansave--; 569 #endif 570 } 571 572 static void flush_windows(CPUSPARCState *env) 573 { 574 int offset, cwp1; 575 576 offset = 1; 577 for(;;) { 578 /* if restore would invoke restore_window(), then we can stop */ 579 cwp1 = (env->cwp + offset) & (NWINDOWS - 1); 580 if (env->wim & (1 << cwp1)) 581 break; 582 save_window_offset(env, cwp1); 583 offset++; 584 } 585 /* set wim so that restore will reload the registers */ 586 cwp1 = (env->cwp + 1) & (NWINDOWS - 1); 587 env->wim = 1 << cwp1; 588 #if defined(DEBUG_WIN) 589 printf("flush_windows: nb=%d\n", offset - 1); 590 #endif 591 } 592 593 void cpu_loop (CPUSPARCState *env) 594 { 595 int trapnr, ret; 596 target_siginfo_t info; 597 598 while (1) { 599 trapnr = cpu_sparc_exec (env); 600 601 switch (trapnr) { 602 #ifndef TARGET_SPARC64 603 case 0x88: 604 case 0x90: 605 #else 606 case 0x110: 607 case 0x16d: 608 #endif 609 ret = do_syscall (env, env->gregs[1], 610 env->regwptr[0], env->regwptr[1], 611 env->regwptr[2], env->regwptr[3], 612 env->regwptr[4], env->regwptr[5]); 613 if ((unsigned int)ret >= (unsigned int)(-515)) { 614 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) 615 env->xcc |= PSR_CARRY; 616 #else 617 env->psr |= PSR_CARRY; 618 #endif 619 ret = -ret; 620 } else { 621 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) 622 env->xcc &= ~PSR_CARRY; 623 #else 624 env->psr &= ~PSR_CARRY; 625 #endif 626 } 627 env->regwptr[0] = ret; 628 /* next instruction */ 629 env->pc = env->npc; 630 env->npc = env->npc + 4; 631 break; 632 case 0x83: /* flush windows */ 633 #ifdef TARGET_ABI32 634 case 0x103: 635 #endif 636 flush_windows(env); 637 /* next instruction */ 638 env->pc = env->npc; 639 env->npc = env->npc + 4; 640 break; 641 #ifndef TARGET_SPARC64 642 case TT_WIN_OVF: /* window overflow */ 643 save_window(env); 644 break; 645 case TT_WIN_UNF: /* window underflow */ 646 restore_window(env); 647 break; 648 case TT_TFAULT: 649 case TT_DFAULT: 650 { 651 info.si_signo = SIGSEGV; 652 info.si_errno = 0; 653 /* XXX: check env->error_code */ 654 info.si_code = TARGET_SEGV_MAPERR; 655 info._sifields._sigfault._addr = env->mmuregs[4]; 656 queue_signal(info.si_signo, &info); 657 } 658 break; 659 #else 660 case TT_SPILL: /* window overflow */ 661 save_window(env); 662 break; 663 case TT_FILL: /* window underflow */ 664 restore_window(env); 665 break; 666 case TT_TFAULT: 667 case TT_DFAULT: 668 { 669 info.si_signo = SIGSEGV; 670 info.si_errno = 0; 671 /* XXX: check env->error_code */ 672 info.si_code = TARGET_SEGV_MAPERR; 673 if (trapnr == TT_DFAULT) 674 info._sifields._sigfault._addr = env->dmmuregs[4]; 675 else 676 info._sifields._sigfault._addr = env->tpc[env->tl]; 677 queue_signal(info.si_signo, &info); 678 } 679 break; 680 #ifndef TARGET_ABI32 681 case 0x16e: 682 flush_windows(env); 683 sparc64_get_context(env); 684 break; 685 case 0x16f: 686 flush_windows(env); 687 sparc64_set_context(env); 688 break; 689 #endif 690 #endif 691 case EXCP_INTERRUPT: 692 /* just indicate that signals should be handled asap */ 693 break; 694 case EXCP_DEBUG: 695 { 696 int sig; 697 698 sig = gdb_handlesig (env, TARGET_SIGTRAP); 699 if (sig) 700 { 701 info.si_signo = sig; 702 info.si_errno = 0; 703 info.si_code = TARGET_TRAP_BRKPT; 704 queue_signal(info.si_signo, &info); 705 } 706 } 707 break; 708 default: 709 printf ("Unhandled trap: 0x%x\n", trapnr); 710 cpu_dump_state(env, stderr, fprintf, 0); 711 exit (1); 712 } 713 process_pending_signals (env); 714 } 715 } 716 717 #endif 718 719 #ifdef TARGET_PPC 720 static inline uint64_t cpu_ppc_get_tb (CPUState *env) 721 { 722 /* TO FIX */ 723 return 0; 724 } 725 726 uint32_t cpu_ppc_load_tbl (CPUState *env) 727 { 728 return cpu_ppc_get_tb(env) & 0xFFFFFFFF; 729 } 730 731 uint32_t cpu_ppc_load_tbu (CPUState *env) 732 { 733 return cpu_ppc_get_tb(env) >> 32; 734 } 735 736 uint32_t cpu_ppc_load_atbl (CPUState *env) 737 { 738 return cpu_ppc_get_tb(env) & 0xFFFFFFFF; 739 } 740 741 uint32_t cpu_ppc_load_atbu (CPUState *env) 742 { 743 return cpu_ppc_get_tb(env) >> 32; 744 } 745 746 uint32_t cpu_ppc601_load_rtcu (CPUState *env) 747 __attribute__ (( alias ("cpu_ppc_load_tbu") )); 748 749 uint32_t cpu_ppc601_load_rtcl (CPUState *env) 750 { 751 return cpu_ppc_load_tbl(env) & 0x3FFFFF80; 752 } 753 754 /* XXX: to be fixed */ 755 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp) 756 { 757 return -1; 758 } 759 760 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val) 761 { 762 return -1; 763 } 764 765 #define EXCP_DUMP(env, fmt, args...) \ 766 do { \ 767 fprintf(stderr, fmt , ##args); \ 768 cpu_dump_state(env, stderr, fprintf, 0); \ 769 if (loglevel != 0) { \ 770 fprintf(logfile, fmt , ##args); \ 771 cpu_dump_state(env, logfile, fprintf, 0); \ 772 } \ 773 } while (0) 774 775 void cpu_loop(CPUPPCState *env) 776 { 777 target_siginfo_t info; 778 int trapnr; 779 uint32_t ret; 780 781 for(;;) { 782 trapnr = cpu_ppc_exec(env); 783 switch(trapnr) { 784 case POWERPC_EXCP_NONE: 785 /* Just go on */ 786 break; 787 case POWERPC_EXCP_CRITICAL: /* Critical input */ 788 cpu_abort(env, "Critical interrupt while in user mode. " 789 "Aborting\n"); 790 break; 791 case POWERPC_EXCP_MCHECK: /* Machine check exception */ 792 cpu_abort(env, "Machine check exception while in user mode. " 793 "Aborting\n"); 794 break; 795 case POWERPC_EXCP_DSI: /* Data storage exception */ 796 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n", 797 env->spr[SPR_DAR]); 798 /* XXX: check this. Seems bugged */ 799 switch (env->error_code & 0xFF000000) { 800 case 0x40000000: 801 info.si_signo = TARGET_SIGSEGV; 802 info.si_errno = 0; 803 info.si_code = TARGET_SEGV_MAPERR; 804 break; 805 case 0x04000000: 806 info.si_signo = TARGET_SIGILL; 807 info.si_errno = 0; 808 info.si_code = TARGET_ILL_ILLADR; 809 break; 810 case 0x08000000: 811 info.si_signo = TARGET_SIGSEGV; 812 info.si_errno = 0; 813 info.si_code = TARGET_SEGV_ACCERR; 814 break; 815 default: 816 /* Let's send a regular segfault... */ 817 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n", 818 env->error_code); 819 info.si_signo = TARGET_SIGSEGV; 820 info.si_errno = 0; 821 info.si_code = TARGET_SEGV_MAPERR; 822 break; 823 } 824 info._sifields._sigfault._addr = env->nip; 825 queue_signal(info.si_signo, &info); 826 break; 827 case POWERPC_EXCP_ISI: /* Instruction storage exception */ 828 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n", 829 env->spr[SPR_SRR0]); 830 /* XXX: check this */ 831 switch (env->error_code & 0xFF000000) { 832 case 0x40000000: 833 info.si_signo = TARGET_SIGSEGV; 834 info.si_errno = 0; 835 info.si_code = TARGET_SEGV_MAPERR; 836 break; 837 case 0x10000000: 838 case 0x08000000: 839 info.si_signo = TARGET_SIGSEGV; 840 info.si_errno = 0; 841 info.si_code = TARGET_SEGV_ACCERR; 842 break; 843 default: 844 /* Let's send a regular segfault... */ 845 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n", 846 env->error_code); 847 info.si_signo = TARGET_SIGSEGV; 848 info.si_errno = 0; 849 info.si_code = TARGET_SEGV_MAPERR; 850 break; 851 } 852 info._sifields._sigfault._addr = env->nip - 4; 853 queue_signal(info.si_signo, &info); 854 break; 855 case POWERPC_EXCP_EXTERNAL: /* External input */ 856 cpu_abort(env, "External interrupt while in user mode. " 857 "Aborting\n"); 858 break; 859 case POWERPC_EXCP_ALIGN: /* Alignment exception */ 860 EXCP_DUMP(env, "Unaligned memory access\n"); 861 /* XXX: check this */ 862 info.si_signo = TARGET_SIGBUS; 863 info.si_errno = 0; 864 info.si_code = TARGET_BUS_ADRALN; 865 info._sifields._sigfault._addr = env->nip - 4; 866 queue_signal(info.si_signo, &info); 867 break; 868 case POWERPC_EXCP_PROGRAM: /* Program exception */ 869 /* XXX: check this */ 870 switch (env->error_code & ~0xF) { 871 case POWERPC_EXCP_FP: 872 EXCP_DUMP(env, "Floating point program exception\n"); 873 info.si_signo = TARGET_SIGFPE; 874 info.si_errno = 0; 875 switch (env->error_code & 0xF) { 876 case POWERPC_EXCP_FP_OX: 877 info.si_code = TARGET_FPE_FLTOVF; 878 break; 879 case POWERPC_EXCP_FP_UX: 880 info.si_code = TARGET_FPE_FLTUND; 881 break; 882 case POWERPC_EXCP_FP_ZX: 883 case POWERPC_EXCP_FP_VXZDZ: 884 info.si_code = TARGET_FPE_FLTDIV; 885 break; 886 case POWERPC_EXCP_FP_XX: 887 info.si_code = TARGET_FPE_FLTRES; 888 break; 889 case POWERPC_EXCP_FP_VXSOFT: 890 info.si_code = TARGET_FPE_FLTINV; 891 break; 892 case POWERPC_EXCP_FP_VXSNAN: 893 case POWERPC_EXCP_FP_VXISI: 894 case POWERPC_EXCP_FP_VXIDI: 895 case POWERPC_EXCP_FP_VXIMZ: 896 case POWERPC_EXCP_FP_VXVC: 897 case POWERPC_EXCP_FP_VXSQRT: 898 case POWERPC_EXCP_FP_VXCVI: 899 info.si_code = TARGET_FPE_FLTSUB; 900 break; 901 default: 902 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n", 903 env->error_code); 904 break; 905 } 906 break; 907 case POWERPC_EXCP_INVAL: 908 EXCP_DUMP(env, "Invalid instruction\n"); 909 info.si_signo = TARGET_SIGILL; 910 info.si_errno = 0; 911 switch (env->error_code & 0xF) { 912 case POWERPC_EXCP_INVAL_INVAL: 913 info.si_code = TARGET_ILL_ILLOPC; 914 break; 915 case POWERPC_EXCP_INVAL_LSWX: 916 info.si_code = TARGET_ILL_ILLOPN; 917 break; 918 case POWERPC_EXCP_INVAL_SPR: 919 info.si_code = TARGET_ILL_PRVREG; 920 break; 921 case POWERPC_EXCP_INVAL_FP: 922 info.si_code = TARGET_ILL_COPROC; 923 break; 924 default: 925 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n", 926 env->error_code & 0xF); 927 info.si_code = TARGET_ILL_ILLADR; 928 break; 929 } 930 break; 931 case POWERPC_EXCP_PRIV: 932 EXCP_DUMP(env, "Privilege violation\n"); 933 info.si_signo = TARGET_SIGILL; 934 info.si_errno = 0; 935 switch (env->error_code & 0xF) { 936 case POWERPC_EXCP_PRIV_OPC: 937 info.si_code = TARGET_ILL_PRVOPC; 938 break; 939 case POWERPC_EXCP_PRIV_REG: 940 info.si_code = TARGET_ILL_PRVREG; 941 break; 942 default: 943 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n", 944 env->error_code & 0xF); 945 info.si_code = TARGET_ILL_PRVOPC; 946 break; 947 } 948 break; 949 case POWERPC_EXCP_TRAP: 950 cpu_abort(env, "Tried to call a TRAP\n"); 951 break; 952 default: 953 /* Should not happen ! */ 954 cpu_abort(env, "Unknown program exception (%02x)\n", 955 env->error_code); 956 break; 957 } 958 info._sifields._sigfault._addr = env->nip - 4; 959 queue_signal(info.si_signo, &info); 960 break; 961 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ 962 EXCP_DUMP(env, "No floating point allowed\n"); 963 info.si_signo = TARGET_SIGILL; 964 info.si_errno = 0; 965 info.si_code = TARGET_ILL_COPROC; 966 info._sifields._sigfault._addr = env->nip - 4; 967 queue_signal(info.si_signo, &info); 968 break; 969 case POWERPC_EXCP_SYSCALL: /* System call exception */ 970 cpu_abort(env, "Syscall exception while in user mode. " 971 "Aborting\n"); 972 break; 973 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ 974 EXCP_DUMP(env, "No APU instruction allowed\n"); 975 info.si_signo = TARGET_SIGILL; 976 info.si_errno = 0; 977 info.si_code = TARGET_ILL_COPROC; 978 info._sifields._sigfault._addr = env->nip - 4; 979 queue_signal(info.si_signo, &info); 980 break; 981 case POWERPC_EXCP_DECR: /* Decrementer exception */ 982 cpu_abort(env, "Decrementer interrupt while in user mode. " 983 "Aborting\n"); 984 break; 985 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ 986 cpu_abort(env, "Fix interval timer interrupt while in user mode. " 987 "Aborting\n"); 988 break; 989 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ 990 cpu_abort(env, "Watchdog timer interrupt while in user mode. " 991 "Aborting\n"); 992 break; 993 case POWERPC_EXCP_DTLB: /* Data TLB error */ 994 cpu_abort(env, "Data TLB exception while in user mode. " 995 "Aborting\n"); 996 break; 997 case POWERPC_EXCP_ITLB: /* Instruction TLB error */ 998 cpu_abort(env, "Instruction TLB exception while in user mode. " 999 "Aborting\n"); 1000 break; 1001 case POWERPC_EXCP_DEBUG: /* Debug interrupt */ 1002 /* XXX: check this */ 1003 { 1004 int sig; 1005 1006 sig = gdb_handlesig(env, TARGET_SIGTRAP); 1007 if (sig) { 1008 info.si_signo = sig; 1009 info.si_errno = 0; 1010 info.si_code = TARGET_TRAP_BRKPT; 1011 queue_signal(info.si_signo, &info); 1012 } 1013 } 1014 break; 1015 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */ 1016 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n"); 1017 info.si_signo = TARGET_SIGILL; 1018 info.si_errno = 0; 1019 info.si_code = TARGET_ILL_COPROC; 1020 info._sifields._sigfault._addr = env->nip - 4; 1021 queue_signal(info.si_signo, &info); 1022 break; 1023 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */ 1024 cpu_abort(env, "Embedded floating-point data IRQ not handled\n"); 1025 break; 1026 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */ 1027 cpu_abort(env, "Embedded floating-point round IRQ not handled\n"); 1028 break; 1029 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */ 1030 cpu_abort(env, "Performance monitor exception not handled\n"); 1031 break; 1032 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ 1033 cpu_abort(env, "Doorbell interrupt while in user mode. " 1034 "Aborting\n"); 1035 break; 1036 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ 1037 cpu_abort(env, "Doorbell critical interrupt while in user mode. " 1038 "Aborting\n"); 1039 break; 1040 case POWERPC_EXCP_RESET: /* System reset exception */ 1041 cpu_abort(env, "Reset interrupt while in user mode. " 1042 "Aborting\n"); 1043 break; 1044 #if defined(TARGET_PPC64) && !defined(TARGET_ABI32) /* PowerPC 64 */ 1045 case POWERPC_EXCP_DSEG: /* Data segment exception */ 1046 cpu_abort(env, "Data segment exception while in user mode. " 1047 "Aborting\n"); 1048 break; 1049 case POWERPC_EXCP_ISEG: /* Instruction segment exception */ 1050 cpu_abort(env, "Instruction segment exception " 1051 "while in user mode. Aborting\n"); 1052 break; 1053 #endif /* defined(TARGET_PPC64) && !defined(TARGET_ABI32) */ 1054 #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32) 1055 /* PowerPC 64 with hypervisor mode support */ 1056 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ 1057 cpu_abort(env, "Hypervisor decrementer interrupt " 1058 "while in user mode. Aborting\n"); 1059 break; 1060 #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */ 1061 case POWERPC_EXCP_TRACE: /* Trace exception */ 1062 /* Nothing to do: 1063 * we use this exception to emulate step-by-step execution mode. 1064 */ 1065 break; 1066 #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32) 1067 /* PowerPC 64 with hypervisor mode support */ 1068 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ 1069 cpu_abort(env, "Hypervisor data storage exception " 1070 "while in user mode. Aborting\n"); 1071 break; 1072 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */ 1073 cpu_abort(env, "Hypervisor instruction storage exception " 1074 "while in user mode. Aborting\n"); 1075 break; 1076 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ 1077 cpu_abort(env, "Hypervisor data segment exception " 1078 "while in user mode. Aborting\n"); 1079 break; 1080 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */ 1081 cpu_abort(env, "Hypervisor instruction segment exception " 1082 "while in user mode. Aborting\n"); 1083 break; 1084 #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */ 1085 case POWERPC_EXCP_VPU: /* Vector unavailable exception */ 1086 EXCP_DUMP(env, "No Altivec instructions allowed\n"); 1087 info.si_signo = TARGET_SIGILL; 1088 info.si_errno = 0; 1089 info.si_code = TARGET_ILL_COPROC; 1090 info._sifields._sigfault._addr = env->nip - 4; 1091 queue_signal(info.si_signo, &info); 1092 break; 1093 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */ 1094 cpu_abort(env, "Programable interval timer interrupt " 1095 "while in user mode. Aborting\n"); 1096 break; 1097 case POWERPC_EXCP_IO: /* IO error exception */ 1098 cpu_abort(env, "IO error exception while in user mode. " 1099 "Aborting\n"); 1100 break; 1101 case POWERPC_EXCP_RUNM: /* Run mode exception */ 1102 cpu_abort(env, "Run mode exception while in user mode. " 1103 "Aborting\n"); 1104 break; 1105 case POWERPC_EXCP_EMUL: /* Emulation trap exception */ 1106 cpu_abort(env, "Emulation trap exception not handled\n"); 1107 break; 1108 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ 1109 cpu_abort(env, "Instruction fetch TLB exception " 1110 "while in user-mode. Aborting"); 1111 break; 1112 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ 1113 cpu_abort(env, "Data load TLB exception while in user-mode. " 1114 "Aborting"); 1115 break; 1116 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ 1117 cpu_abort(env, "Data store TLB exception while in user-mode. " 1118 "Aborting"); 1119 break; 1120 case POWERPC_EXCP_FPA: /* Floating-point assist exception */ 1121 cpu_abort(env, "Floating-point assist exception not handled\n"); 1122 break; 1123 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ 1124 cpu_abort(env, "Instruction address breakpoint exception " 1125 "not handled\n"); 1126 break; 1127 case POWERPC_EXCP_SMI: /* System management interrupt */ 1128 cpu_abort(env, "System management interrupt while in user mode. " 1129 "Aborting\n"); 1130 break; 1131 case POWERPC_EXCP_THERM: /* Thermal interrupt */ 1132 cpu_abort(env, "Thermal interrupt interrupt while in user mode. " 1133 "Aborting\n"); 1134 break; 1135 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */ 1136 cpu_abort(env, "Performance monitor exception not handled\n"); 1137 break; 1138 case POWERPC_EXCP_VPUA: /* Vector assist exception */ 1139 cpu_abort(env, "Vector assist exception not handled\n"); 1140 break; 1141 case POWERPC_EXCP_SOFTP: /* Soft patch exception */ 1142 cpu_abort(env, "Soft patch exception not handled\n"); 1143 break; 1144 case POWERPC_EXCP_MAINT: /* Maintenance exception */ 1145 cpu_abort(env, "Maintenance exception while in user mode. " 1146 "Aborting\n"); 1147 break; 1148 case POWERPC_EXCP_STOP: /* stop translation */ 1149 /* We did invalidate the instruction cache. Go on */ 1150 break; 1151 case POWERPC_EXCP_BRANCH: /* branch instruction: */ 1152 /* We just stopped because of a branch. Go on */ 1153 break; 1154 case POWERPC_EXCP_SYSCALL_USER: 1155 /* system call in user-mode emulation */ 1156 /* WARNING: 1157 * PPC ABI uses overflow flag in cr0 to signal an error 1158 * in syscalls. 1159 */ 1160 #if 0 1161 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0], 1162 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]); 1163 #endif 1164 env->crf[0] &= ~0x1; 1165 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], 1166 env->gpr[5], env->gpr[6], env->gpr[7], 1167 env->gpr[8]); 1168 if (ret > (uint32_t)(-515)) { 1169 env->crf[0] |= 0x1; 1170 ret = -ret; 1171 } 1172 env->gpr[3] = ret; 1173 #if 0 1174 printf("syscall returned 0x%08x (%d)\n", ret, ret); 1175 #endif 1176 break; 1177 case EXCP_INTERRUPT: 1178 /* just indicate that signals should be handled asap */ 1179 break; 1180 default: 1181 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr); 1182 break; 1183 } 1184 process_pending_signals(env); 1185 } 1186 } 1187 #endif 1188 1189 #ifdef TARGET_MIPS 1190 1191 #define MIPS_SYS(name, args) args, 1192 1193 static const uint8_t mips_syscall_args[] = { 1194 MIPS_SYS(sys_syscall , 0) /* 4000 */ 1195 MIPS_SYS(sys_exit , 1) 1196 MIPS_SYS(sys_fork , 0) 1197 MIPS_SYS(sys_read , 3) 1198 MIPS_SYS(sys_write , 3) 1199 MIPS_SYS(sys_open , 3) /* 4005 */ 1200 MIPS_SYS(sys_close , 1) 1201 MIPS_SYS(sys_waitpid , 3) 1202 MIPS_SYS(sys_creat , 2) 1203 MIPS_SYS(sys_link , 2) 1204 MIPS_SYS(sys_unlink , 1) /* 4010 */ 1205 MIPS_SYS(sys_execve , 0) 1206 MIPS_SYS(sys_chdir , 1) 1207 MIPS_SYS(sys_time , 1) 1208 MIPS_SYS(sys_mknod , 3) 1209 MIPS_SYS(sys_chmod , 2) /* 4015 */ 1210 MIPS_SYS(sys_lchown , 3) 1211 MIPS_SYS(sys_ni_syscall , 0) 1212 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */ 1213 MIPS_SYS(sys_lseek , 3) 1214 MIPS_SYS(sys_getpid , 0) /* 4020 */ 1215 MIPS_SYS(sys_mount , 5) 1216 MIPS_SYS(sys_oldumount , 1) 1217 MIPS_SYS(sys_setuid , 1) 1218 MIPS_SYS(sys_getuid , 0) 1219 MIPS_SYS(sys_stime , 1) /* 4025 */ 1220 MIPS_SYS(sys_ptrace , 4) 1221 MIPS_SYS(sys_alarm , 1) 1222 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */ 1223 MIPS_SYS(sys_pause , 0) 1224 MIPS_SYS(sys_utime , 2) /* 4030 */ 1225 MIPS_SYS(sys_ni_syscall , 0) 1226 MIPS_SYS(sys_ni_syscall , 0) 1227 MIPS_SYS(sys_access , 2) 1228 MIPS_SYS(sys_nice , 1) 1229 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */ 1230 MIPS_SYS(sys_sync , 0) 1231 MIPS_SYS(sys_kill , 2) 1232 MIPS_SYS(sys_rename , 2) 1233 MIPS_SYS(sys_mkdir , 2) 1234 MIPS_SYS(sys_rmdir , 1) /* 4040 */ 1235 MIPS_SYS(sys_dup , 1) 1236 MIPS_SYS(sys_pipe , 0) 1237 MIPS_SYS(sys_times , 1) 1238 MIPS_SYS(sys_ni_syscall , 0) 1239 MIPS_SYS(sys_brk , 1) /* 4045 */ 1240 MIPS_SYS(sys_setgid , 1) 1241 MIPS_SYS(sys_getgid , 0) 1242 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */ 1243 MIPS_SYS(sys_geteuid , 0) 1244 MIPS_SYS(sys_getegid , 0) /* 4050 */ 1245 MIPS_SYS(sys_acct , 0) 1246 MIPS_SYS(sys_umount , 2) 1247 MIPS_SYS(sys_ni_syscall , 0) 1248 MIPS_SYS(sys_ioctl , 3) 1249 MIPS_SYS(sys_fcntl , 3) /* 4055 */ 1250 MIPS_SYS(sys_ni_syscall , 2) 1251 MIPS_SYS(sys_setpgid , 2) 1252 MIPS_SYS(sys_ni_syscall , 0) 1253 MIPS_SYS(sys_olduname , 1) 1254 MIPS_SYS(sys_umask , 1) /* 4060 */ 1255 MIPS_SYS(sys_chroot , 1) 1256 MIPS_SYS(sys_ustat , 2) 1257 MIPS_SYS(sys_dup2 , 2) 1258 MIPS_SYS(sys_getppid , 0) 1259 MIPS_SYS(sys_getpgrp , 0) /* 4065 */ 1260 MIPS_SYS(sys_setsid , 0) 1261 MIPS_SYS(sys_sigaction , 3) 1262 MIPS_SYS(sys_sgetmask , 0) 1263 MIPS_SYS(sys_ssetmask , 1) 1264 MIPS_SYS(sys_setreuid , 2) /* 4070 */ 1265 MIPS_SYS(sys_setregid , 2) 1266 MIPS_SYS(sys_sigsuspend , 0) 1267 MIPS_SYS(sys_sigpending , 1) 1268 MIPS_SYS(sys_sethostname , 2) 1269 MIPS_SYS(sys_setrlimit , 2) /* 4075 */ 1270 MIPS_SYS(sys_getrlimit , 2) 1271 MIPS_SYS(sys_getrusage , 2) 1272 MIPS_SYS(sys_gettimeofday, 2) 1273 MIPS_SYS(sys_settimeofday, 2) 1274 MIPS_SYS(sys_getgroups , 2) /* 4080 */ 1275 MIPS_SYS(sys_setgroups , 2) 1276 MIPS_SYS(sys_ni_syscall , 0) /* old_select */ 1277 MIPS_SYS(sys_symlink , 2) 1278 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */ 1279 MIPS_SYS(sys_readlink , 3) /* 4085 */ 1280 MIPS_SYS(sys_uselib , 1) 1281 MIPS_SYS(sys_swapon , 2) 1282 MIPS_SYS(sys_reboot , 3) 1283 MIPS_SYS(old_readdir , 3) 1284 MIPS_SYS(old_mmap , 6) /* 4090 */ 1285 MIPS_SYS(sys_munmap , 2) 1286 MIPS_SYS(sys_truncate , 2) 1287 MIPS_SYS(sys_ftruncate , 2) 1288 MIPS_SYS(sys_fchmod , 2) 1289 MIPS_SYS(sys_fchown , 3) /* 4095 */ 1290 MIPS_SYS(sys_getpriority , 2) 1291 MIPS_SYS(sys_setpriority , 3) 1292 MIPS_SYS(sys_ni_syscall , 0) 1293 MIPS_SYS(sys_statfs , 2) 1294 MIPS_SYS(sys_fstatfs , 2) /* 4100 */ 1295 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */ 1296 MIPS_SYS(sys_socketcall , 2) 1297 MIPS_SYS(sys_syslog , 3) 1298 MIPS_SYS(sys_setitimer , 3) 1299 MIPS_SYS(sys_getitimer , 2) /* 4105 */ 1300 MIPS_SYS(sys_newstat , 2) 1301 MIPS_SYS(sys_newlstat , 2) 1302 MIPS_SYS(sys_newfstat , 2) 1303 MIPS_SYS(sys_uname , 1) 1304 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */ 1305 MIPS_SYS(sys_vhangup , 0) 1306 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */ 1307 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */ 1308 MIPS_SYS(sys_wait4 , 4) 1309 MIPS_SYS(sys_swapoff , 1) /* 4115 */ 1310 MIPS_SYS(sys_sysinfo , 1) 1311 MIPS_SYS(sys_ipc , 6) 1312 MIPS_SYS(sys_fsync , 1) 1313 MIPS_SYS(sys_sigreturn , 0) 1314 MIPS_SYS(sys_clone , 0) /* 4120 */ 1315 MIPS_SYS(sys_setdomainname, 2) 1316 MIPS_SYS(sys_newuname , 1) 1317 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */ 1318 MIPS_SYS(sys_adjtimex , 1) 1319 MIPS_SYS(sys_mprotect , 3) /* 4125 */ 1320 MIPS_SYS(sys_sigprocmask , 3) 1321 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */ 1322 MIPS_SYS(sys_init_module , 5) 1323 MIPS_SYS(sys_delete_module, 1) 1324 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */ 1325 MIPS_SYS(sys_quotactl , 0) 1326 MIPS_SYS(sys_getpgid , 1) 1327 MIPS_SYS(sys_fchdir , 1) 1328 MIPS_SYS(sys_bdflush , 2) 1329 MIPS_SYS(sys_sysfs , 3) /* 4135 */ 1330 MIPS_SYS(sys_personality , 1) 1331 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */ 1332 MIPS_SYS(sys_setfsuid , 1) 1333 MIPS_SYS(sys_setfsgid , 1) 1334 MIPS_SYS(sys_llseek , 5) /* 4140 */ 1335 MIPS_SYS(sys_getdents , 3) 1336 MIPS_SYS(sys_select , 5) 1337 MIPS_SYS(sys_flock , 2) 1338 MIPS_SYS(sys_msync , 3) 1339 MIPS_SYS(sys_readv , 3) /* 4145 */ 1340 MIPS_SYS(sys_writev , 3) 1341 MIPS_SYS(sys_cacheflush , 3) 1342 MIPS_SYS(sys_cachectl , 3) 1343 MIPS_SYS(sys_sysmips , 4) 1344 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */ 1345 MIPS_SYS(sys_getsid , 1) 1346 MIPS_SYS(sys_fdatasync , 0) 1347 MIPS_SYS(sys_sysctl , 1) 1348 MIPS_SYS(sys_mlock , 2) 1349 MIPS_SYS(sys_munlock , 2) /* 4155 */ 1350 MIPS_SYS(sys_mlockall , 1) 1351 MIPS_SYS(sys_munlockall , 0) 1352 MIPS_SYS(sys_sched_setparam, 2) 1353 MIPS_SYS(sys_sched_getparam, 2) 1354 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */ 1355 MIPS_SYS(sys_sched_getscheduler, 1) 1356 MIPS_SYS(sys_sched_yield , 0) 1357 MIPS_SYS(sys_sched_get_priority_max, 1) 1358 MIPS_SYS(sys_sched_get_priority_min, 1) 1359 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */ 1360 MIPS_SYS(sys_nanosleep, 2) 1361 MIPS_SYS(sys_mremap , 4) 1362 MIPS_SYS(sys_accept , 3) 1363 MIPS_SYS(sys_bind , 3) 1364 MIPS_SYS(sys_connect , 3) /* 4170 */ 1365 MIPS_SYS(sys_getpeername , 3) 1366 MIPS_SYS(sys_getsockname , 3) 1367 MIPS_SYS(sys_getsockopt , 5) 1368 MIPS_SYS(sys_listen , 2) 1369 MIPS_SYS(sys_recv , 4) /* 4175 */ 1370 MIPS_SYS(sys_recvfrom , 6) 1371 MIPS_SYS(sys_recvmsg , 3) 1372 MIPS_SYS(sys_send , 4) 1373 MIPS_SYS(sys_sendmsg , 3) 1374 MIPS_SYS(sys_sendto , 6) /* 4180 */ 1375 MIPS_SYS(sys_setsockopt , 5) 1376 MIPS_SYS(sys_shutdown , 2) 1377 MIPS_SYS(sys_socket , 3) 1378 MIPS_SYS(sys_socketpair , 4) 1379 MIPS_SYS(sys_setresuid , 3) /* 4185 */ 1380 MIPS_SYS(sys_getresuid , 3) 1381 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */ 1382 MIPS_SYS(sys_poll , 3) 1383 MIPS_SYS(sys_nfsservctl , 3) 1384 MIPS_SYS(sys_setresgid , 3) /* 4190 */ 1385 MIPS_SYS(sys_getresgid , 3) 1386 MIPS_SYS(sys_prctl , 5) 1387 MIPS_SYS(sys_rt_sigreturn, 0) 1388 MIPS_SYS(sys_rt_sigaction, 4) 1389 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */ 1390 MIPS_SYS(sys_rt_sigpending, 2) 1391 MIPS_SYS(sys_rt_sigtimedwait, 4) 1392 MIPS_SYS(sys_rt_sigqueueinfo, 3) 1393 MIPS_SYS(sys_rt_sigsuspend, 0) 1394 MIPS_SYS(sys_pread64 , 6) /* 4200 */ 1395 MIPS_SYS(sys_pwrite64 , 6) 1396 MIPS_SYS(sys_chown , 3) 1397 MIPS_SYS(sys_getcwd , 2) 1398 MIPS_SYS(sys_capget , 2) 1399 MIPS_SYS(sys_capset , 2) /* 4205 */ 1400 MIPS_SYS(sys_sigaltstack , 0) 1401 MIPS_SYS(sys_sendfile , 4) 1402 MIPS_SYS(sys_ni_syscall , 0) 1403 MIPS_SYS(sys_ni_syscall , 0) 1404 MIPS_SYS(sys_mmap2 , 6) /* 4210 */ 1405 MIPS_SYS(sys_truncate64 , 4) 1406 MIPS_SYS(sys_ftruncate64 , 4) 1407 MIPS_SYS(sys_stat64 , 2) 1408 MIPS_SYS(sys_lstat64 , 2) 1409 MIPS_SYS(sys_fstat64 , 2) /* 4215 */ 1410 MIPS_SYS(sys_pivot_root , 2) 1411 MIPS_SYS(sys_mincore , 3) 1412 MIPS_SYS(sys_madvise , 3) 1413 MIPS_SYS(sys_getdents64 , 3) 1414 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */ 1415 MIPS_SYS(sys_ni_syscall , 0) 1416 MIPS_SYS(sys_gettid , 0) 1417 MIPS_SYS(sys_readahead , 5) 1418 MIPS_SYS(sys_setxattr , 5) 1419 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */ 1420 MIPS_SYS(sys_fsetxattr , 5) 1421 MIPS_SYS(sys_getxattr , 4) 1422 MIPS_SYS(sys_lgetxattr , 4) 1423 MIPS_SYS(sys_fgetxattr , 4) 1424 MIPS_SYS(sys_listxattr , 3) /* 4230 */ 1425 MIPS_SYS(sys_llistxattr , 3) 1426 MIPS_SYS(sys_flistxattr , 3) 1427 MIPS_SYS(sys_removexattr , 2) 1428 MIPS_SYS(sys_lremovexattr, 2) 1429 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */ 1430 MIPS_SYS(sys_tkill , 2) 1431 MIPS_SYS(sys_sendfile64 , 5) 1432 MIPS_SYS(sys_futex , 2) 1433 MIPS_SYS(sys_sched_setaffinity, 3) 1434 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */ 1435 MIPS_SYS(sys_io_setup , 2) 1436 MIPS_SYS(sys_io_destroy , 1) 1437 MIPS_SYS(sys_io_getevents, 5) 1438 MIPS_SYS(sys_io_submit , 3) 1439 MIPS_SYS(sys_io_cancel , 3) /* 4245 */ 1440 MIPS_SYS(sys_exit_group , 1) 1441 MIPS_SYS(sys_lookup_dcookie, 3) 1442 MIPS_SYS(sys_epoll_create, 1) 1443 MIPS_SYS(sys_epoll_ctl , 4) 1444 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */ 1445 MIPS_SYS(sys_remap_file_pages, 5) 1446 MIPS_SYS(sys_set_tid_address, 1) 1447 MIPS_SYS(sys_restart_syscall, 0) 1448 MIPS_SYS(sys_fadvise64_64, 7) 1449 MIPS_SYS(sys_statfs64 , 3) /* 4255 */ 1450 MIPS_SYS(sys_fstatfs64 , 2) 1451 MIPS_SYS(sys_timer_create, 3) 1452 MIPS_SYS(sys_timer_settime, 4) 1453 MIPS_SYS(sys_timer_gettime, 2) 1454 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */ 1455 MIPS_SYS(sys_timer_delete, 1) 1456 MIPS_SYS(sys_clock_settime, 2) 1457 MIPS_SYS(sys_clock_gettime, 2) 1458 MIPS_SYS(sys_clock_getres, 2) 1459 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */ 1460 MIPS_SYS(sys_tgkill , 3) 1461 MIPS_SYS(sys_utimes , 2) 1462 MIPS_SYS(sys_mbind , 4) 1463 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */ 1464 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */ 1465 MIPS_SYS(sys_mq_open , 4) 1466 MIPS_SYS(sys_mq_unlink , 1) 1467 MIPS_SYS(sys_mq_timedsend, 5) 1468 MIPS_SYS(sys_mq_timedreceive, 5) 1469 MIPS_SYS(sys_mq_notify , 2) /* 4275 */ 1470 MIPS_SYS(sys_mq_getsetattr, 3) 1471 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */ 1472 MIPS_SYS(sys_waitid , 4) 1473 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */ 1474 MIPS_SYS(sys_add_key , 5) 1475 MIPS_SYS(sys_request_key, 4) 1476 MIPS_SYS(sys_keyctl , 5) 1477 MIPS_SYS(sys_set_thread_area, 1) 1478 MIPS_SYS(sys_inotify_init, 0) 1479 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */ 1480 MIPS_SYS(sys_inotify_rm_watch, 2) 1481 MIPS_SYS(sys_migrate_pages, 4) 1482 MIPS_SYS(sys_openat, 4) 1483 MIPS_SYS(sys_mkdirat, 3) 1484 MIPS_SYS(sys_mknodat, 4) /* 4290 */ 1485 MIPS_SYS(sys_fchownat, 5) 1486 MIPS_SYS(sys_futimesat, 3) 1487 MIPS_SYS(sys_fstatat64, 4) 1488 MIPS_SYS(sys_unlinkat, 3) 1489 MIPS_SYS(sys_renameat, 4) /* 4295 */ 1490 MIPS_SYS(sys_linkat, 5) 1491 MIPS_SYS(sys_symlinkat, 3) 1492 MIPS_SYS(sys_readlinkat, 4) 1493 MIPS_SYS(sys_fchmodat, 3) 1494 MIPS_SYS(sys_faccessat, 3) /* 4300 */ 1495 MIPS_SYS(sys_pselect6, 6) 1496 MIPS_SYS(sys_ppoll, 5) 1497 MIPS_SYS(sys_unshare, 1) 1498 MIPS_SYS(sys_splice, 4) 1499 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */ 1500 MIPS_SYS(sys_tee, 4) 1501 MIPS_SYS(sys_vmsplice, 4) 1502 MIPS_SYS(sys_move_pages, 6) 1503 MIPS_SYS(sys_set_robust_list, 2) 1504 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */ 1505 MIPS_SYS(sys_kexec_load, 4) 1506 MIPS_SYS(sys_getcpu, 3) 1507 MIPS_SYS(sys_epoll_pwait, 6) 1508 MIPS_SYS(sys_ioprio_set, 3) 1509 MIPS_SYS(sys_ioprio_get, 2) 1510 }; 1511 1512 #undef MIPS_SYS 1513 1514 void cpu_loop(CPUMIPSState *env) 1515 { 1516 target_siginfo_t info; 1517 int trapnr, ret; 1518 unsigned int syscall_num; 1519 1520 for(;;) { 1521 trapnr = cpu_mips_exec(env); 1522 switch(trapnr) { 1523 case EXCP_SYSCALL: 1524 syscall_num = env->gpr[2][env->current_tc] - 4000; 1525 env->PC[env->current_tc] += 4; 1526 if (syscall_num >= sizeof(mips_syscall_args)) { 1527 ret = -ENOSYS; 1528 } else { 1529 int nb_args; 1530 abi_ulong sp_reg; 1531 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0; 1532 1533 nb_args = mips_syscall_args[syscall_num]; 1534 sp_reg = env->gpr[29][env->current_tc]; 1535 switch (nb_args) { 1536 /* these arguments are taken from the stack */ 1537 case 8: arg8 = tgetl(sp_reg + 28); 1538 case 7: arg7 = tgetl(sp_reg + 24); 1539 case 6: arg6 = tgetl(sp_reg + 20); 1540 case 5: arg5 = tgetl(sp_reg + 16); 1541 default: 1542 break; 1543 } 1544 ret = do_syscall(env, env->gpr[2][env->current_tc], 1545 env->gpr[4][env->current_tc], 1546 env->gpr[5][env->current_tc], 1547 env->gpr[6][env->current_tc], 1548 env->gpr[7][env->current_tc], 1549 arg5, arg6/*, arg7, arg8*/); 1550 } 1551 if ((unsigned int)ret >= (unsigned int)(-1133)) { 1552 env->gpr[7][env->current_tc] = 1; /* error flag */ 1553 ret = -ret; 1554 } else { 1555 env->gpr[7][env->current_tc] = 0; /* error flag */ 1556 } 1557 env->gpr[2][env->current_tc] = ret; 1558 break; 1559 case EXCP_TLBL: 1560 case EXCP_TLBS: 1561 case EXCP_CpU: 1562 case EXCP_RI: 1563 info.si_signo = TARGET_SIGILL; 1564 info.si_errno = 0; 1565 info.si_code = 0; 1566 queue_signal(info.si_signo, &info); 1567 break; 1568 case EXCP_INTERRUPT: 1569 /* just indicate that signals should be handled asap */ 1570 break; 1571 case EXCP_DEBUG: 1572 { 1573 int sig; 1574 1575 sig = gdb_handlesig (env, TARGET_SIGTRAP); 1576 if (sig) 1577 { 1578 info.si_signo = sig; 1579 info.si_errno = 0; 1580 info.si_code = TARGET_TRAP_BRKPT; 1581 queue_signal(info.si_signo, &info); 1582 } 1583 } 1584 break; 1585 default: 1586 // error: 1587 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 1588 trapnr); 1589 cpu_dump_state(env, stderr, fprintf, 0); 1590 abort(); 1591 } 1592 process_pending_signals(env); 1593 } 1594 } 1595 #endif 1596 1597 #ifdef TARGET_SH4 1598 void cpu_loop (CPUState *env) 1599 { 1600 int trapnr, ret; 1601 target_siginfo_t info; 1602 1603 while (1) { 1604 trapnr = cpu_sh4_exec (env); 1605 1606 switch (trapnr) { 1607 case 0x160: 1608 ret = do_syscall(env, 1609 env->gregs[3], 1610 env->gregs[4], 1611 env->gregs[5], 1612 env->gregs[6], 1613 env->gregs[7], 1614 env->gregs[0], 1615 0); 1616 env->gregs[0] = ret; 1617 env->pc += 2; 1618 break; 1619 case EXCP_DEBUG: 1620 { 1621 int sig; 1622 1623 sig = gdb_handlesig (env, TARGET_SIGTRAP); 1624 if (sig) 1625 { 1626 info.si_signo = sig; 1627 info.si_errno = 0; 1628 info.si_code = TARGET_TRAP_BRKPT; 1629 queue_signal(info.si_signo, &info); 1630 } 1631 } 1632 break; 1633 default: 1634 printf ("Unhandled trap: 0x%x\n", trapnr); 1635 cpu_dump_state(env, stderr, fprintf, 0); 1636 exit (1); 1637 } 1638 process_pending_signals (env); 1639 } 1640 } 1641 #endif 1642 1643 #ifdef TARGET_CRIS 1644 void cpu_loop (CPUState *env) 1645 { 1646 int trapnr, ret; 1647 target_siginfo_t info; 1648 1649 while (1) { 1650 trapnr = cpu_cris_exec (env); 1651 switch (trapnr) { 1652 case 0xaa: 1653 { 1654 info.si_signo = SIGSEGV; 1655 info.si_errno = 0; 1656 /* XXX: check env->error_code */ 1657 info.si_code = TARGET_SEGV_MAPERR; 1658 info._sifields._sigfault._addr = env->debug1; 1659 queue_signal(info.si_signo, &info); 1660 } 1661 break; 1662 case EXCP_BREAK: 1663 ret = do_syscall(env, 1664 env->regs[9], 1665 env->regs[10], 1666 env->regs[11], 1667 env->regs[12], 1668 env->regs[13], 1669 env->pregs[7], 1670 env->pregs[11]); 1671 env->regs[10] = ret; 1672 env->pc += 2; 1673 break; 1674 case EXCP_DEBUG: 1675 { 1676 int sig; 1677 1678 sig = gdb_handlesig (env, TARGET_SIGTRAP); 1679 if (sig) 1680 { 1681 info.si_signo = sig; 1682 info.si_errno = 0; 1683 info.si_code = TARGET_TRAP_BRKPT; 1684 queue_signal(info.si_signo, &info); 1685 } 1686 } 1687 break; 1688 default: 1689 printf ("Unhandled trap: 0x%x\n", trapnr); 1690 cpu_dump_state(env, stderr, fprintf, 0); 1691 exit (1); 1692 } 1693 process_pending_signals (env); 1694 } 1695 } 1696 #endif 1697 1698 #ifdef TARGET_M68K 1699 1700 void cpu_loop(CPUM68KState *env) 1701 { 1702 int trapnr; 1703 unsigned int n; 1704 target_siginfo_t info; 1705 TaskState *ts = env->opaque; 1706 1707 for(;;) { 1708 trapnr = cpu_m68k_exec(env); 1709 switch(trapnr) { 1710 case EXCP_ILLEGAL: 1711 { 1712 if (ts->sim_syscalls) { 1713 uint16_t nr; 1714 nr = lduw(env->pc + 2); 1715 env->pc += 4; 1716 do_m68k_simcall(env, nr); 1717 } else { 1718 goto do_sigill; 1719 } 1720 } 1721 break; 1722 case EXCP_HALT_INSN: 1723 /* Semihosing syscall. */ 1724 env->pc += 4; 1725 do_m68k_semihosting(env, env->dregs[0]); 1726 break; 1727 case EXCP_LINEA: 1728 case EXCP_LINEF: 1729 case EXCP_UNSUPPORTED: 1730 do_sigill: 1731 info.si_signo = SIGILL; 1732 info.si_errno = 0; 1733 info.si_code = TARGET_ILL_ILLOPN; 1734 info._sifields._sigfault._addr = env->pc; 1735 queue_signal(info.si_signo, &info); 1736 break; 1737 case EXCP_TRAP0: 1738 { 1739 ts->sim_syscalls = 0; 1740 n = env->dregs[0]; 1741 env->pc += 2; 1742 env->dregs[0] = do_syscall(env, 1743 n, 1744 env->dregs[1], 1745 env->dregs[2], 1746 env->dregs[3], 1747 env->dregs[4], 1748 env->dregs[5], 1749 env->dregs[6]); 1750 } 1751 break; 1752 case EXCP_INTERRUPT: 1753 /* just indicate that signals should be handled asap */ 1754 break; 1755 case EXCP_ACCESS: 1756 { 1757 info.si_signo = SIGSEGV; 1758 info.si_errno = 0; 1759 /* XXX: check env->error_code */ 1760 info.si_code = TARGET_SEGV_MAPERR; 1761 info._sifields._sigfault._addr = env->mmu.ar; 1762 queue_signal(info.si_signo, &info); 1763 } 1764 break; 1765 case EXCP_DEBUG: 1766 { 1767 int sig; 1768 1769 sig = gdb_handlesig (env, TARGET_SIGTRAP); 1770 if (sig) 1771 { 1772 info.si_signo = sig; 1773 info.si_errno = 0; 1774 info.si_code = TARGET_TRAP_BRKPT; 1775 queue_signal(info.si_signo, &info); 1776 } 1777 } 1778 break; 1779 default: 1780 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 1781 trapnr); 1782 cpu_dump_state(env, stderr, fprintf, 0); 1783 abort(); 1784 } 1785 process_pending_signals(env); 1786 } 1787 } 1788 #endif /* TARGET_M68K */ 1789 1790 #ifdef TARGET_ALPHA 1791 void cpu_loop (CPUState *env) 1792 { 1793 int trapnr; 1794 target_siginfo_t info; 1795 1796 while (1) { 1797 trapnr = cpu_alpha_exec (env); 1798 1799 switch (trapnr) { 1800 case EXCP_RESET: 1801 fprintf(stderr, "Reset requested. Exit\n"); 1802 exit(1); 1803 break; 1804 case EXCP_MCHK: 1805 fprintf(stderr, "Machine check exception. Exit\n"); 1806 exit(1); 1807 break; 1808 case EXCP_ARITH: 1809 fprintf(stderr, "Arithmetic trap.\n"); 1810 exit(1); 1811 break; 1812 case EXCP_HW_INTERRUPT: 1813 fprintf(stderr, "External interrupt. Exit\n"); 1814 exit(1); 1815 break; 1816 case EXCP_DFAULT: 1817 fprintf(stderr, "MMU data fault\n"); 1818 exit(1); 1819 break; 1820 case EXCP_DTB_MISS_PAL: 1821 fprintf(stderr, "MMU data TLB miss in PALcode\n"); 1822 exit(1); 1823 break; 1824 case EXCP_ITB_MISS: 1825 fprintf(stderr, "MMU instruction TLB miss\n"); 1826 exit(1); 1827 break; 1828 case EXCP_ITB_ACV: 1829 fprintf(stderr, "MMU instruction access violation\n"); 1830 exit(1); 1831 break; 1832 case EXCP_DTB_MISS_NATIVE: 1833 fprintf(stderr, "MMU data TLB miss\n"); 1834 exit(1); 1835 break; 1836 case EXCP_UNALIGN: 1837 fprintf(stderr, "Unaligned access\n"); 1838 exit(1); 1839 break; 1840 case EXCP_OPCDEC: 1841 fprintf(stderr, "Invalid instruction\n"); 1842 exit(1); 1843 break; 1844 case EXCP_FEN: 1845 fprintf(stderr, "Floating-point not allowed\n"); 1846 exit(1); 1847 break; 1848 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1): 1849 fprintf(stderr, "Call to PALcode\n"); 1850 call_pal(env, (trapnr >> 6) | 0x80); 1851 break; 1852 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1): 1853 fprintf(stderr, "Privileged call to PALcode\n"); 1854 exit(1); 1855 break; 1856 case EXCP_DEBUG: 1857 { 1858 int sig; 1859 1860 sig = gdb_handlesig (env, TARGET_SIGTRAP); 1861 if (sig) 1862 { 1863 info.si_signo = sig; 1864 info.si_errno = 0; 1865 info.si_code = TARGET_TRAP_BRKPT; 1866 queue_signal(info.si_signo, &info); 1867 } 1868 } 1869 break; 1870 default: 1871 printf ("Unhandled trap: 0x%x\n", trapnr); 1872 cpu_dump_state(env, stderr, fprintf, 0); 1873 exit (1); 1874 } 1875 process_pending_signals (env); 1876 } 1877 } 1878 #endif /* TARGET_ALPHA */ 1879 1880 void usage(void) 1881 { 1882 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n" 1883 "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n" 1884 "Linux CPU emulator (compiled for %s emulation)\n" 1885 "\n" 1886 "-h print this help\n" 1887 "-g port wait gdb connection to port\n" 1888 "-L path set the elf interpreter prefix (default=%s)\n" 1889 "-s size set the stack size in bytes (default=%ld)\n" 1890 "-cpu model select CPU (-cpu ? for list)\n" 1891 "-drop-ld-preload drop LD_PRELOAD for target process\n" 1892 "\n" 1893 "debug options:\n" 1894 "-d options activate log (logfile=%s)\n" 1895 "-p pagesize set the host page size to 'pagesize'\n" 1896 "-strace log system calls\n", 1897 TARGET_ARCH, 1898 interp_prefix, 1899 x86_stack_size, 1900 DEBUG_LOGFILE); 1901 _exit(1); 1902 } 1903 1904 /* XXX: currently only used for async signals (see signal.c) */ 1905 CPUState *global_env; 1906 1907 /* used to free thread contexts */ 1908 TaskState *first_task_state; 1909 1910 int main(int argc, char **argv) 1911 { 1912 const char *filename; 1913 const char *cpu_model; 1914 struct target_pt_regs regs1, *regs = ®s1; 1915 struct image_info info1, *info = &info1; 1916 TaskState ts1, *ts = &ts1; 1917 CPUState *env; 1918 int optind; 1919 const char *r; 1920 int gdbstub_port = 0; 1921 int drop_ld_preload = 0, environ_count = 0; 1922 char **target_environ, **wrk, **dst; 1923 1924 if (argc <= 1) 1925 usage(); 1926 1927 /* init debug */ 1928 cpu_set_log_filename(DEBUG_LOGFILE); 1929 1930 cpu_model = NULL; 1931 optind = 1; 1932 for(;;) { 1933 if (optind >= argc) 1934 break; 1935 r = argv[optind]; 1936 if (r[0] != '-') 1937 break; 1938 optind++; 1939 r++; 1940 if (!strcmp(r, "-")) { 1941 break; 1942 } else if (!strcmp(r, "d")) { 1943 int mask; 1944 CPULogItem *item; 1945 1946 if (optind >= argc) 1947 break; 1948 1949 r = argv[optind++]; 1950 mask = cpu_str_to_log_mask(r); 1951 if (!mask) { 1952 printf("Log items (comma separated):\n"); 1953 for(item = cpu_log_items; item->mask != 0; item++) { 1954 printf("%-10s %s\n", item->name, item->help); 1955 } 1956 exit(1); 1957 } 1958 cpu_set_log(mask); 1959 } else if (!strcmp(r, "s")) { 1960 r = argv[optind++]; 1961 x86_stack_size = strtol(r, (char **)&r, 0); 1962 if (x86_stack_size <= 0) 1963 usage(); 1964 if (*r == 'M') 1965 x86_stack_size *= 1024 * 1024; 1966 else if (*r == 'k' || *r == 'K') 1967 x86_stack_size *= 1024; 1968 } else if (!strcmp(r, "L")) { 1969 interp_prefix = argv[optind++]; 1970 } else if (!strcmp(r, "p")) { 1971 qemu_host_page_size = atoi(argv[optind++]); 1972 if (qemu_host_page_size == 0 || 1973 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { 1974 fprintf(stderr, "page size must be a power of two\n"); 1975 exit(1); 1976 } 1977 } else if (!strcmp(r, "g")) { 1978 gdbstub_port = atoi(argv[optind++]); 1979 } else if (!strcmp(r, "r")) { 1980 qemu_uname_release = argv[optind++]; 1981 } else if (!strcmp(r, "cpu")) { 1982 cpu_model = argv[optind++]; 1983 if (strcmp(cpu_model, "?") == 0) { 1984 /* XXX: implement xxx_cpu_list for targets that still miss it */ 1985 #if defined(cpu_list) 1986 cpu_list(stdout, &fprintf); 1987 #endif 1988 _exit(1); 1989 } 1990 } else if (!strcmp(r, "drop-ld-preload")) { 1991 drop_ld_preload = 1; 1992 } else if (!strcmp(r, "strace")) { 1993 do_strace = 1; 1994 } else 1995 { 1996 usage(); 1997 } 1998 } 1999 if (optind >= argc) 2000 usage(); 2001 filename = argv[optind]; 2002 2003 /* Zero out regs */ 2004 memset(regs, 0, sizeof(struct target_pt_regs)); 2005 2006 /* Zero out image_info */ 2007 memset(info, 0, sizeof(struct image_info)); 2008 2009 /* Scan interp_prefix dir for replacement files. */ 2010 init_paths(interp_prefix); 2011 2012 if (cpu_model == NULL) { 2013 #if defined(TARGET_I386) 2014 #ifdef TARGET_X86_64 2015 cpu_model = "qemu64"; 2016 #else 2017 cpu_model = "qemu32"; 2018 #endif 2019 #elif defined(TARGET_ARM) 2020 cpu_model = "arm926"; 2021 #elif defined(TARGET_M68K) 2022 cpu_model = "any"; 2023 #elif defined(TARGET_SPARC) 2024 #ifdef TARGET_SPARC64 2025 cpu_model = "TI UltraSparc II"; 2026 #else 2027 cpu_model = "Fujitsu MB86904"; 2028 #endif 2029 #elif defined(TARGET_MIPS) 2030 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64) 2031 cpu_model = "20Kc"; 2032 #else 2033 cpu_model = "24Kf"; 2034 #endif 2035 #elif defined(TARGET_PPC) 2036 cpu_model = "750"; 2037 #else 2038 cpu_model = "any"; 2039 #endif 2040 } 2041 /* NOTE: we need to init the CPU at this stage to get 2042 qemu_host_page_size */ 2043 env = cpu_init(cpu_model); 2044 if (!env) { 2045 fprintf(stderr, "Unable to find CPU definition\n"); 2046 exit(1); 2047 } 2048 global_env = env; 2049 2050 if (getenv("QEMU_STRACE")) { 2051 do_strace = 1; 2052 } 2053 2054 wrk = environ; 2055 while (*(wrk++)) 2056 environ_count++; 2057 2058 target_environ = malloc((environ_count + 1) * sizeof(char *)); 2059 if (!target_environ) 2060 abort(); 2061 for (wrk = environ, dst = target_environ; *wrk; wrk++) { 2062 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11)) 2063 continue; 2064 *(dst++) = strdup(*wrk); 2065 } 2066 *dst = NULL; /* NULL terminate target_environ */ 2067 2068 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) { 2069 printf("Error loading %s\n", filename); 2070 _exit(1); 2071 } 2072 2073 for (wrk = target_environ; *wrk; wrk++) { 2074 free(*wrk); 2075 } 2076 2077 free(target_environ); 2078 2079 if (loglevel) { 2080 page_dump(logfile); 2081 2082 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk); 2083 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code); 2084 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n", 2085 info->start_code); 2086 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n", 2087 info->start_data); 2088 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data); 2089 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n", 2090 info->start_stack); 2091 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk); 2092 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry); 2093 } 2094 2095 target_set_brk(info->brk); 2096 syscall_init(); 2097 signal_init(); 2098 2099 /* build Task State */ 2100 memset(ts, 0, sizeof(TaskState)); 2101 env->opaque = ts; 2102 ts->used = 1; 2103 ts->info = info; 2104 env->user_mode_only = 1; 2105 2106 #if defined(TARGET_I386) 2107 cpu_x86_set_cpl(env, 3); 2108 2109 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; 2110 env->hflags |= HF_PE_MASK; 2111 if (env->cpuid_features & CPUID_SSE) { 2112 env->cr[4] |= CR4_OSFXSR_MASK; 2113 env->hflags |= HF_OSFXSR_MASK; 2114 } 2115 #ifndef TARGET_ABI32 2116 /* enable 64 bit mode */ 2117 env->cr[4] |= CR4_PAE_MASK; 2118 env->efer |= MSR_EFER_LMA; 2119 env->hflags |= HF_LMA_MASK; 2120 #endif 2121 2122 /* flags setup : we activate the IRQs by default as in user mode */ 2123 env->eflags |= IF_MASK; 2124 2125 /* linux register setup */ 2126 #ifndef TARGET_ABI32 2127 env->regs[R_EAX] = regs->rax; 2128 env->regs[R_EBX] = regs->rbx; 2129 env->regs[R_ECX] = regs->rcx; 2130 env->regs[R_EDX] = regs->rdx; 2131 env->regs[R_ESI] = regs->rsi; 2132 env->regs[R_EDI] = regs->rdi; 2133 env->regs[R_EBP] = regs->rbp; 2134 env->regs[R_ESP] = regs->rsp; 2135 env->eip = regs->rip; 2136 #else 2137 env->regs[R_EAX] = regs->eax; 2138 env->regs[R_EBX] = regs->ebx; 2139 env->regs[R_ECX] = regs->ecx; 2140 env->regs[R_EDX] = regs->edx; 2141 env->regs[R_ESI] = regs->esi; 2142 env->regs[R_EDI] = regs->edi; 2143 env->regs[R_EBP] = regs->ebp; 2144 env->regs[R_ESP] = regs->esp; 2145 env->eip = regs->eip; 2146 #endif 2147 2148 /* linux interrupt setup */ 2149 env->idt.base = h2g(idt_table); 2150 env->idt.limit = sizeof(idt_table) - 1; 2151 set_idt(0, 0); 2152 set_idt(1, 0); 2153 set_idt(2, 0); 2154 set_idt(3, 3); 2155 set_idt(4, 3); 2156 set_idt(5, 3); 2157 set_idt(6, 0); 2158 set_idt(7, 0); 2159 set_idt(8, 0); 2160 set_idt(9, 0); 2161 set_idt(10, 0); 2162 set_idt(11, 0); 2163 set_idt(12, 0); 2164 set_idt(13, 0); 2165 set_idt(14, 0); 2166 set_idt(15, 0); 2167 set_idt(16, 0); 2168 set_idt(17, 0); 2169 set_idt(18, 0); 2170 set_idt(19, 0); 2171 set_idt(0x80, 3); 2172 2173 /* linux segment setup */ 2174 { 2175 uint64_t *gdt_table; 2176 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES); 2177 env->gdt.base = h2g((unsigned long)gdt_table); 2178 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1; 2179 #ifdef TARGET_ABI32 2180 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, 2181 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 2182 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); 2183 #else 2184 /* 64 bit code segment */ 2185 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, 2186 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 2187 DESC_L_MASK | 2188 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); 2189 #endif 2190 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, 2191 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 2192 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); 2193 } 2194 cpu_x86_load_seg(env, R_CS, __USER_CS); 2195 cpu_x86_load_seg(env, R_SS, __USER_DS); 2196 #ifdef TARGET_ABI32 2197 cpu_x86_load_seg(env, R_DS, __USER_DS); 2198 cpu_x86_load_seg(env, R_ES, __USER_DS); 2199 cpu_x86_load_seg(env, R_FS, __USER_DS); 2200 cpu_x86_load_seg(env, R_GS, __USER_DS); 2201 /* This hack makes Wine work... */ 2202 env->segs[R_FS].selector = 0; 2203 #else 2204 cpu_x86_load_seg(env, R_DS, 0); 2205 cpu_x86_load_seg(env, R_ES, 0); 2206 cpu_x86_load_seg(env, R_FS, 0); 2207 cpu_x86_load_seg(env, R_GS, 0); 2208 #endif 2209 #elif defined(TARGET_ARM) 2210 { 2211 int i; 2212 cpsr_write(env, regs->uregs[16], 0xffffffff); 2213 for(i = 0; i < 16; i++) { 2214 env->regs[i] = regs->uregs[i]; 2215 } 2216 } 2217 #elif defined(TARGET_SPARC) 2218 { 2219 int i; 2220 env->pc = regs->pc; 2221 env->npc = regs->npc; 2222 env->y = regs->y; 2223 for(i = 0; i < 8; i++) 2224 env->gregs[i] = regs->u_regs[i]; 2225 for(i = 0; i < 8; i++) 2226 env->regwptr[i] = regs->u_regs[i + 8]; 2227 } 2228 #elif defined(TARGET_PPC) 2229 { 2230 int i; 2231 2232 #if defined(TARGET_PPC64) 2233 #if defined(TARGET_ABI32) 2234 env->msr &= ~((target_ulong)1 << MSR_SF); 2235 #else 2236 env->msr |= (target_ulong)1 << MSR_SF; 2237 #endif 2238 #endif 2239 env->nip = regs->nip; 2240 for(i = 0; i < 32; i++) { 2241 env->gpr[i] = regs->gpr[i]; 2242 } 2243 } 2244 #elif defined(TARGET_M68K) 2245 { 2246 env->pc = regs->pc; 2247 env->dregs[0] = regs->d0; 2248 env->dregs[1] = regs->d1; 2249 env->dregs[2] = regs->d2; 2250 env->dregs[3] = regs->d3; 2251 env->dregs[4] = regs->d4; 2252 env->dregs[5] = regs->d5; 2253 env->dregs[6] = regs->d6; 2254 env->dregs[7] = regs->d7; 2255 env->aregs[0] = regs->a0; 2256 env->aregs[1] = regs->a1; 2257 env->aregs[2] = regs->a2; 2258 env->aregs[3] = regs->a3; 2259 env->aregs[4] = regs->a4; 2260 env->aregs[5] = regs->a5; 2261 env->aregs[6] = regs->a6; 2262 env->aregs[7] = regs->usp; 2263 env->sr = regs->sr; 2264 ts->sim_syscalls = 1; 2265 } 2266 #elif defined(TARGET_MIPS) 2267 { 2268 int i; 2269 2270 for(i = 0; i < 32; i++) { 2271 env->gpr[i][env->current_tc] = regs->regs[i]; 2272 } 2273 env->PC[env->current_tc] = regs->cp0_epc; 2274 } 2275 #elif defined(TARGET_SH4) 2276 { 2277 int i; 2278 2279 for(i = 0; i < 16; i++) { 2280 env->gregs[i] = regs->regs[i]; 2281 } 2282 env->pc = regs->pc; 2283 } 2284 #elif defined(TARGET_ALPHA) 2285 { 2286 int i; 2287 2288 for(i = 0; i < 28; i++) { 2289 env->ir[i] = ((abi_ulong *)regs)[i]; 2290 } 2291 env->ipr[IPR_USP] = regs->usp; 2292 env->ir[30] = regs->usp; 2293 env->pc = regs->pc; 2294 env->unique = regs->unique; 2295 } 2296 #elif defined(TARGET_CRIS) 2297 { 2298 env->regs[0] = regs->r0; 2299 env->regs[1] = regs->r1; 2300 env->regs[2] = regs->r2; 2301 env->regs[3] = regs->r3; 2302 env->regs[4] = regs->r4; 2303 env->regs[5] = regs->r5; 2304 env->regs[6] = regs->r6; 2305 env->regs[7] = regs->r7; 2306 env->regs[8] = regs->r8; 2307 env->regs[9] = regs->r9; 2308 env->regs[10] = regs->r10; 2309 env->regs[11] = regs->r11; 2310 env->regs[12] = regs->r12; 2311 env->regs[13] = regs->r13; 2312 env->regs[14] = info->start_stack; 2313 env->regs[15] = regs->acr; 2314 env->pc = regs->erp; 2315 } 2316 #else 2317 #error unsupported target CPU 2318 #endif 2319 2320 #if defined(TARGET_ARM) || defined(TARGET_M68K) 2321 ts->stack_base = info->start_stack; 2322 ts->heap_base = info->brk; 2323 /* This will be filled in on the first SYS_HEAPINFO call. */ 2324 ts->heap_limit = 0; 2325 #endif 2326 2327 if (gdbstub_port) { 2328 gdbserver_start (gdbstub_port); 2329 gdb_handlesig(env, 0); 2330 } 2331 cpu_loop(env); 2332 /* never exits */ 2333 return 0; 2334 } 2335