1 /* 2 * qemu user main 3 * 4 * Copyright (c) 2003-2008 Fabrice Bellard 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #include <stdlib.h> 20 #include <stdio.h> 21 #include <stdarg.h> 22 #include <string.h> 23 #include <errno.h> 24 #include <unistd.h> 25 #include <sys/mman.h> 26 #include <sys/syscall.h> 27 #include <sys/resource.h> 28 29 #include "qemu.h" 30 #include "qemu-common.h" 31 #include "cache-utils.h" 32 #include "cpu.h" 33 #include "tcg.h" 34 #include "qemu-timer.h" 35 #include "envlist.h" 36 #include "elf.h" 37 38 #define DEBUG_LOGFILE "/tmp/qemu.log" 39 40 char *exec_path; 41 42 int singlestep; 43 const char *filename; 44 const char *argv0; 45 int gdbstub_port; 46 envlist_t *envlist; 47 const char *cpu_model; 48 unsigned long mmap_min_addr; 49 #if defined(CONFIG_USE_GUEST_BASE) 50 unsigned long guest_base; 51 int have_guest_base; 52 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64) 53 /* 54 * When running 32-on-64 we should make sure we can fit all of the possible 55 * guest address space into a contiguous chunk of virtual host memory. 56 * 57 * This way we will never overlap with our own libraries or binaries or stack 58 * or anything else that QEMU maps. 59 */ 60 unsigned long reserved_va = 0xf7000000; 61 #else 62 unsigned long reserved_va; 63 #endif 64 #endif 65 66 static void usage(void); 67 68 static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX; 69 const char *qemu_uname_release = CONFIG_UNAME_RELEASE; 70 71 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so 72 we allocate a bigger stack. Need a better solution, for example 73 by remapping the process stack directly at the right place */ 74 unsigned long guest_stack_size = 8 * 1024 * 1024UL; 75 76 void gemu_log(const char *fmt, ...) 77 { 78 va_list ap; 79 80 va_start(ap, fmt); 81 vfprintf(stderr, fmt, ap); 82 va_end(ap); 83 } 84 85 #if defined(TARGET_I386) 86 int cpu_get_pic_interrupt(CPUX86State *env) 87 { 88 return -1; 89 } 90 #endif 91 92 #if defined(CONFIG_USE_NPTL) 93 /***********************************************************/ 94 /* Helper routines for implementing atomic operations. */ 95 96 /* To implement exclusive operations we force all cpus to syncronise. 97 We don't require a full sync, only that no cpus are executing guest code. 98 The alternative is to map target atomic ops onto host equivalents, 99 which requires quite a lot of per host/target work. */ 100 static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER; 101 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER; 102 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER; 103 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER; 104 static int pending_cpus; 105 106 /* Make sure everything is in a consistent state for calling fork(). */ 107 void fork_start(void) 108 { 109 pthread_mutex_lock(&tb_lock); 110 pthread_mutex_lock(&exclusive_lock); 111 mmap_fork_start(); 112 } 113 114 void fork_end(int child) 115 { 116 mmap_fork_end(child); 117 if (child) { 118 /* Child processes created by fork() only have a single thread. 119 Discard information about the parent threads. */ 120 first_cpu = thread_env; 121 thread_env->next_cpu = NULL; 122 pending_cpus = 0; 123 pthread_mutex_init(&exclusive_lock, NULL); 124 pthread_mutex_init(&cpu_list_mutex, NULL); 125 pthread_cond_init(&exclusive_cond, NULL); 126 pthread_cond_init(&exclusive_resume, NULL); 127 pthread_mutex_init(&tb_lock, NULL); 128 gdbserver_fork(thread_env); 129 } else { 130 pthread_mutex_unlock(&exclusive_lock); 131 pthread_mutex_unlock(&tb_lock); 132 } 133 } 134 135 /* Wait for pending exclusive operations to complete. The exclusive lock 136 must be held. */ 137 static inline void exclusive_idle(void) 138 { 139 while (pending_cpus) { 140 pthread_cond_wait(&exclusive_resume, &exclusive_lock); 141 } 142 } 143 144 /* Start an exclusive operation. 145 Must only be called from outside cpu_arm_exec. */ 146 static inline void start_exclusive(void) 147 { 148 CPUArchState *other; 149 pthread_mutex_lock(&exclusive_lock); 150 exclusive_idle(); 151 152 pending_cpus = 1; 153 /* Make all other cpus stop executing. */ 154 for (other = first_cpu; other; other = other->next_cpu) { 155 if (other->running) { 156 pending_cpus++; 157 cpu_exit(other); 158 } 159 } 160 if (pending_cpus > 1) { 161 pthread_cond_wait(&exclusive_cond, &exclusive_lock); 162 } 163 } 164 165 /* Finish an exclusive operation. */ 166 static inline void end_exclusive(void) 167 { 168 pending_cpus = 0; 169 pthread_cond_broadcast(&exclusive_resume); 170 pthread_mutex_unlock(&exclusive_lock); 171 } 172 173 /* Wait for exclusive ops to finish, and begin cpu execution. */ 174 static inline void cpu_exec_start(CPUArchState *env) 175 { 176 pthread_mutex_lock(&exclusive_lock); 177 exclusive_idle(); 178 env->running = 1; 179 pthread_mutex_unlock(&exclusive_lock); 180 } 181 182 /* Mark cpu as not executing, and release pending exclusive ops. */ 183 static inline void cpu_exec_end(CPUArchState *env) 184 { 185 pthread_mutex_lock(&exclusive_lock); 186 env->running = 0; 187 if (pending_cpus > 1) { 188 pending_cpus--; 189 if (pending_cpus == 1) { 190 pthread_cond_signal(&exclusive_cond); 191 } 192 } 193 exclusive_idle(); 194 pthread_mutex_unlock(&exclusive_lock); 195 } 196 197 void cpu_list_lock(void) 198 { 199 pthread_mutex_lock(&cpu_list_mutex); 200 } 201 202 void cpu_list_unlock(void) 203 { 204 pthread_mutex_unlock(&cpu_list_mutex); 205 } 206 #else /* if !CONFIG_USE_NPTL */ 207 /* These are no-ops because we are not threadsafe. */ 208 static inline void cpu_exec_start(CPUArchState *env) 209 { 210 } 211 212 static inline void cpu_exec_end(CPUArchState *env) 213 { 214 } 215 216 static inline void start_exclusive(void) 217 { 218 } 219 220 static inline void end_exclusive(void) 221 { 222 } 223 224 void fork_start(void) 225 { 226 } 227 228 void fork_end(int child) 229 { 230 if (child) { 231 gdbserver_fork(thread_env); 232 } 233 } 234 235 void cpu_list_lock(void) 236 { 237 } 238 239 void cpu_list_unlock(void) 240 { 241 } 242 #endif 243 244 245 #ifdef TARGET_I386 246 /***********************************************************/ 247 /* CPUX86 core interface */ 248 249 void cpu_smm_update(CPUX86State *env) 250 { 251 } 252 253 uint64_t cpu_get_tsc(CPUX86State *env) 254 { 255 return cpu_get_real_ticks(); 256 } 257 258 static void write_dt(void *ptr, unsigned long addr, unsigned long limit, 259 int flags) 260 { 261 unsigned int e1, e2; 262 uint32_t *p; 263 e1 = (addr << 16) | (limit & 0xffff); 264 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); 265 e2 |= flags; 266 p = ptr; 267 p[0] = tswap32(e1); 268 p[1] = tswap32(e2); 269 } 270 271 static uint64_t *idt_table; 272 #ifdef TARGET_X86_64 273 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl, 274 uint64_t addr, unsigned int sel) 275 { 276 uint32_t *p, e1, e2; 277 e1 = (addr & 0xffff) | (sel << 16); 278 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); 279 p = ptr; 280 p[0] = tswap32(e1); 281 p[1] = tswap32(e2); 282 p[2] = tswap32(addr >> 32); 283 p[3] = 0; 284 } 285 /* only dpl matters as we do only user space emulation */ 286 static void set_idt(int n, unsigned int dpl) 287 { 288 set_gate64(idt_table + n * 2, 0, dpl, 0, 0); 289 } 290 #else 291 static void set_gate(void *ptr, unsigned int type, unsigned int dpl, 292 uint32_t addr, unsigned int sel) 293 { 294 uint32_t *p, e1, e2; 295 e1 = (addr & 0xffff) | (sel << 16); 296 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); 297 p = ptr; 298 p[0] = tswap32(e1); 299 p[1] = tswap32(e2); 300 } 301 302 /* only dpl matters as we do only user space emulation */ 303 static void set_idt(int n, unsigned int dpl) 304 { 305 set_gate(idt_table + n, 0, dpl, 0, 0); 306 } 307 #endif 308 309 void cpu_loop(CPUX86State *env) 310 { 311 int trapnr; 312 abi_ulong pc; 313 target_siginfo_t info; 314 315 for(;;) { 316 trapnr = cpu_x86_exec(env); 317 switch(trapnr) { 318 case 0x80: 319 /* linux syscall from int $0x80 */ 320 env->regs[R_EAX] = do_syscall(env, 321 env->regs[R_EAX], 322 env->regs[R_EBX], 323 env->regs[R_ECX], 324 env->regs[R_EDX], 325 env->regs[R_ESI], 326 env->regs[R_EDI], 327 env->regs[R_EBP], 328 0, 0); 329 break; 330 #ifndef TARGET_ABI32 331 case EXCP_SYSCALL: 332 /* linux syscall from syscall instruction */ 333 env->regs[R_EAX] = do_syscall(env, 334 env->regs[R_EAX], 335 env->regs[R_EDI], 336 env->regs[R_ESI], 337 env->regs[R_EDX], 338 env->regs[10], 339 env->regs[8], 340 env->regs[9], 341 0, 0); 342 env->eip = env->exception_next_eip; 343 break; 344 #endif 345 case EXCP0B_NOSEG: 346 case EXCP0C_STACK: 347 info.si_signo = SIGBUS; 348 info.si_errno = 0; 349 info.si_code = TARGET_SI_KERNEL; 350 info._sifields._sigfault._addr = 0; 351 queue_signal(env, info.si_signo, &info); 352 break; 353 case EXCP0D_GPF: 354 /* XXX: potential problem if ABI32 */ 355 #ifndef TARGET_X86_64 356 if (env->eflags & VM_MASK) { 357 handle_vm86_fault(env); 358 } else 359 #endif 360 { 361 info.si_signo = SIGSEGV; 362 info.si_errno = 0; 363 info.si_code = TARGET_SI_KERNEL; 364 info._sifields._sigfault._addr = 0; 365 queue_signal(env, info.si_signo, &info); 366 } 367 break; 368 case EXCP0E_PAGE: 369 info.si_signo = SIGSEGV; 370 info.si_errno = 0; 371 if (!(env->error_code & 1)) 372 info.si_code = TARGET_SEGV_MAPERR; 373 else 374 info.si_code = TARGET_SEGV_ACCERR; 375 info._sifields._sigfault._addr = env->cr[2]; 376 queue_signal(env, info.si_signo, &info); 377 break; 378 case EXCP00_DIVZ: 379 #ifndef TARGET_X86_64 380 if (env->eflags & VM_MASK) { 381 handle_vm86_trap(env, trapnr); 382 } else 383 #endif 384 { 385 /* division by zero */ 386 info.si_signo = SIGFPE; 387 info.si_errno = 0; 388 info.si_code = TARGET_FPE_INTDIV; 389 info._sifields._sigfault._addr = env->eip; 390 queue_signal(env, info.si_signo, &info); 391 } 392 break; 393 case EXCP01_DB: 394 case EXCP03_INT3: 395 #ifndef TARGET_X86_64 396 if (env->eflags & VM_MASK) { 397 handle_vm86_trap(env, trapnr); 398 } else 399 #endif 400 { 401 info.si_signo = SIGTRAP; 402 info.si_errno = 0; 403 if (trapnr == EXCP01_DB) { 404 info.si_code = TARGET_TRAP_BRKPT; 405 info._sifields._sigfault._addr = env->eip; 406 } else { 407 info.si_code = TARGET_SI_KERNEL; 408 info._sifields._sigfault._addr = 0; 409 } 410 queue_signal(env, info.si_signo, &info); 411 } 412 break; 413 case EXCP04_INTO: 414 case EXCP05_BOUND: 415 #ifndef TARGET_X86_64 416 if (env->eflags & VM_MASK) { 417 handle_vm86_trap(env, trapnr); 418 } else 419 #endif 420 { 421 info.si_signo = SIGSEGV; 422 info.si_errno = 0; 423 info.si_code = TARGET_SI_KERNEL; 424 info._sifields._sigfault._addr = 0; 425 queue_signal(env, info.si_signo, &info); 426 } 427 break; 428 case EXCP06_ILLOP: 429 info.si_signo = SIGILL; 430 info.si_errno = 0; 431 info.si_code = TARGET_ILL_ILLOPN; 432 info._sifields._sigfault._addr = env->eip; 433 queue_signal(env, info.si_signo, &info); 434 break; 435 case EXCP_INTERRUPT: 436 /* just indicate that signals should be handled asap */ 437 break; 438 case EXCP_DEBUG: 439 { 440 int sig; 441 442 sig = gdb_handlesig (env, TARGET_SIGTRAP); 443 if (sig) 444 { 445 info.si_signo = sig; 446 info.si_errno = 0; 447 info.si_code = TARGET_TRAP_BRKPT; 448 queue_signal(env, info.si_signo, &info); 449 } 450 } 451 break; 452 default: 453 pc = env->segs[R_CS].base + env->eip; 454 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n", 455 (long)pc, trapnr); 456 abort(); 457 } 458 process_pending_signals(env); 459 } 460 } 461 #endif 462 463 #ifdef TARGET_ARM 464 465 #define get_user_code_u32(x, gaddr, doswap) \ 466 ({ abi_long __r = get_user_u32((x), (gaddr)); \ 467 if (!__r && (doswap)) { \ 468 (x) = bswap32(x); \ 469 } \ 470 __r; \ 471 }) 472 473 #define get_user_code_u16(x, gaddr, doswap) \ 474 ({ abi_long __r = get_user_u16((x), (gaddr)); \ 475 if (!__r && (doswap)) { \ 476 (x) = bswap16(x); \ 477 } \ 478 __r; \ 479 }) 480 481 /* 482 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt 483 * Input: 484 * r0 = pointer to oldval 485 * r1 = pointer to newval 486 * r2 = pointer to target value 487 * 488 * Output: 489 * r0 = 0 if *ptr was changed, non-0 if no exchange happened 490 * C set if *ptr was changed, clear if no exchange happened 491 * 492 * Note segv's in kernel helpers are a bit tricky, we can set the 493 * data address sensibly but the PC address is just the entry point. 494 */ 495 static void arm_kernel_cmpxchg64_helper(CPUARMState *env) 496 { 497 uint64_t oldval, newval, val; 498 uint32_t addr, cpsr; 499 target_siginfo_t info; 500 501 /* Based on the 32 bit code in do_kernel_trap */ 502 503 /* XXX: This only works between threads, not between processes. 504 It's probably possible to implement this with native host 505 operations. However things like ldrex/strex are much harder so 506 there's not much point trying. */ 507 start_exclusive(); 508 cpsr = cpsr_read(env); 509 addr = env->regs[2]; 510 511 if (get_user_u64(oldval, env->regs[0])) { 512 env->cp15.c6_data = env->regs[0]; 513 goto segv; 514 }; 515 516 if (get_user_u64(newval, env->regs[1])) { 517 env->cp15.c6_data = env->regs[1]; 518 goto segv; 519 }; 520 521 if (get_user_u64(val, addr)) { 522 env->cp15.c6_data = addr; 523 goto segv; 524 } 525 526 if (val == oldval) { 527 val = newval; 528 529 if (put_user_u64(val, addr)) { 530 env->cp15.c6_data = addr; 531 goto segv; 532 }; 533 534 env->regs[0] = 0; 535 cpsr |= CPSR_C; 536 } else { 537 env->regs[0] = -1; 538 cpsr &= ~CPSR_C; 539 } 540 cpsr_write(env, cpsr, CPSR_C); 541 end_exclusive(); 542 return; 543 544 segv: 545 end_exclusive(); 546 /* We get the PC of the entry address - which is as good as anything, 547 on a real kernel what you get depends on which mode it uses. */ 548 info.si_signo = SIGSEGV; 549 info.si_errno = 0; 550 /* XXX: check env->error_code */ 551 info.si_code = TARGET_SEGV_MAPERR; 552 info._sifields._sigfault._addr = env->cp15.c6_data; 553 queue_signal(env, info.si_signo, &info); 554 555 end_exclusive(); 556 } 557 558 /* Handle a jump to the kernel code page. */ 559 static int 560 do_kernel_trap(CPUARMState *env) 561 { 562 uint32_t addr; 563 uint32_t cpsr; 564 uint32_t val; 565 566 switch (env->regs[15]) { 567 case 0xffff0fa0: /* __kernel_memory_barrier */ 568 /* ??? No-op. Will need to do better for SMP. */ 569 break; 570 case 0xffff0fc0: /* __kernel_cmpxchg */ 571 /* XXX: This only works between threads, not between processes. 572 It's probably possible to implement this with native host 573 operations. However things like ldrex/strex are much harder so 574 there's not much point trying. */ 575 start_exclusive(); 576 cpsr = cpsr_read(env); 577 addr = env->regs[2]; 578 /* FIXME: This should SEGV if the access fails. */ 579 if (get_user_u32(val, addr)) 580 val = ~env->regs[0]; 581 if (val == env->regs[0]) { 582 val = env->regs[1]; 583 /* FIXME: Check for segfaults. */ 584 put_user_u32(val, addr); 585 env->regs[0] = 0; 586 cpsr |= CPSR_C; 587 } else { 588 env->regs[0] = -1; 589 cpsr &= ~CPSR_C; 590 } 591 cpsr_write(env, cpsr, CPSR_C); 592 end_exclusive(); 593 break; 594 case 0xffff0fe0: /* __kernel_get_tls */ 595 env->regs[0] = env->cp15.c13_tls2; 596 break; 597 case 0xffff0f60: /* __kernel_cmpxchg64 */ 598 arm_kernel_cmpxchg64_helper(env); 599 break; 600 601 default: 602 return 1; 603 } 604 /* Jump back to the caller. */ 605 addr = env->regs[14]; 606 if (addr & 1) { 607 env->thumb = 1; 608 addr &= ~1; 609 } 610 env->regs[15] = addr; 611 612 return 0; 613 } 614 615 static int do_strex(CPUARMState *env) 616 { 617 uint32_t val; 618 int size; 619 int rc = 1; 620 int segv = 0; 621 uint32_t addr; 622 start_exclusive(); 623 addr = env->exclusive_addr; 624 if (addr != env->exclusive_test) { 625 goto fail; 626 } 627 size = env->exclusive_info & 0xf; 628 switch (size) { 629 case 0: 630 segv = get_user_u8(val, addr); 631 break; 632 case 1: 633 segv = get_user_u16(val, addr); 634 break; 635 case 2: 636 case 3: 637 segv = get_user_u32(val, addr); 638 break; 639 default: 640 abort(); 641 } 642 if (segv) { 643 env->cp15.c6_data = addr; 644 goto done; 645 } 646 if (val != env->exclusive_val) { 647 goto fail; 648 } 649 if (size == 3) { 650 segv = get_user_u32(val, addr + 4); 651 if (segv) { 652 env->cp15.c6_data = addr + 4; 653 goto done; 654 } 655 if (val != env->exclusive_high) { 656 goto fail; 657 } 658 } 659 val = env->regs[(env->exclusive_info >> 8) & 0xf]; 660 switch (size) { 661 case 0: 662 segv = put_user_u8(val, addr); 663 break; 664 case 1: 665 segv = put_user_u16(val, addr); 666 break; 667 case 2: 668 case 3: 669 segv = put_user_u32(val, addr); 670 break; 671 } 672 if (segv) { 673 env->cp15.c6_data = addr; 674 goto done; 675 } 676 if (size == 3) { 677 val = env->regs[(env->exclusive_info >> 12) & 0xf]; 678 segv = put_user_u32(val, addr + 4); 679 if (segv) { 680 env->cp15.c6_data = addr + 4; 681 goto done; 682 } 683 } 684 rc = 0; 685 fail: 686 env->regs[15] += 4; 687 env->regs[(env->exclusive_info >> 4) & 0xf] = rc; 688 done: 689 end_exclusive(); 690 return segv; 691 } 692 693 void cpu_loop(CPUARMState *env) 694 { 695 int trapnr; 696 unsigned int n, insn; 697 target_siginfo_t info; 698 uint32_t addr; 699 700 for(;;) { 701 cpu_exec_start(env); 702 trapnr = cpu_arm_exec(env); 703 cpu_exec_end(env); 704 switch(trapnr) { 705 case EXCP_UDEF: 706 { 707 TaskState *ts = env->opaque; 708 uint32_t opcode; 709 int rc; 710 711 /* we handle the FPU emulation here, as Linux */ 712 /* we get the opcode */ 713 /* FIXME - what to do if get_user() fails? */ 714 get_user_code_u32(opcode, env->regs[15], env->bswap_code); 715 716 rc = EmulateAll(opcode, &ts->fpa, env); 717 if (rc == 0) { /* illegal instruction */ 718 info.si_signo = SIGILL; 719 info.si_errno = 0; 720 info.si_code = TARGET_ILL_ILLOPN; 721 info._sifields._sigfault._addr = env->regs[15]; 722 queue_signal(env, info.si_signo, &info); 723 } else if (rc < 0) { /* FP exception */ 724 int arm_fpe=0; 725 726 /* translate softfloat flags to FPSR flags */ 727 if (-rc & float_flag_invalid) 728 arm_fpe |= BIT_IOC; 729 if (-rc & float_flag_divbyzero) 730 arm_fpe |= BIT_DZC; 731 if (-rc & float_flag_overflow) 732 arm_fpe |= BIT_OFC; 733 if (-rc & float_flag_underflow) 734 arm_fpe |= BIT_UFC; 735 if (-rc & float_flag_inexact) 736 arm_fpe |= BIT_IXC; 737 738 FPSR fpsr = ts->fpa.fpsr; 739 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe); 740 741 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */ 742 info.si_signo = SIGFPE; 743 info.si_errno = 0; 744 745 /* ordered by priority, least first */ 746 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES; 747 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND; 748 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF; 749 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV; 750 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV; 751 752 info._sifields._sigfault._addr = env->regs[15]; 753 queue_signal(env, info.si_signo, &info); 754 } else { 755 env->regs[15] += 4; 756 } 757 758 /* accumulate unenabled exceptions */ 759 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC)) 760 fpsr |= BIT_IXC; 761 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC)) 762 fpsr |= BIT_UFC; 763 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC)) 764 fpsr |= BIT_OFC; 765 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC)) 766 fpsr |= BIT_DZC; 767 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC)) 768 fpsr |= BIT_IOC; 769 ts->fpa.fpsr=fpsr; 770 } else { /* everything OK */ 771 /* increment PC */ 772 env->regs[15] += 4; 773 } 774 } 775 break; 776 case EXCP_SWI: 777 case EXCP_BKPT: 778 { 779 env->eabi = 1; 780 /* system call */ 781 if (trapnr == EXCP_BKPT) { 782 if (env->thumb) { 783 /* FIXME - what to do if get_user() fails? */ 784 get_user_code_u16(insn, env->regs[15], env->bswap_code); 785 n = insn & 0xff; 786 env->regs[15] += 2; 787 } else { 788 /* FIXME - what to do if get_user() fails? */ 789 get_user_code_u32(insn, env->regs[15], env->bswap_code); 790 n = (insn & 0xf) | ((insn >> 4) & 0xff0); 791 env->regs[15] += 4; 792 } 793 } else { 794 if (env->thumb) { 795 /* FIXME - what to do if get_user() fails? */ 796 get_user_code_u16(insn, env->regs[15] - 2, 797 env->bswap_code); 798 n = insn & 0xff; 799 } else { 800 /* FIXME - what to do if get_user() fails? */ 801 get_user_code_u32(insn, env->regs[15] - 4, 802 env->bswap_code); 803 n = insn & 0xffffff; 804 } 805 } 806 807 if (n == ARM_NR_cacheflush) { 808 /* nop */ 809 } else if (n == ARM_NR_semihosting 810 || n == ARM_NR_thumb_semihosting) { 811 env->regs[0] = do_arm_semihosting (env); 812 } else if (n == 0 || n >= ARM_SYSCALL_BASE || env->thumb) { 813 /* linux syscall */ 814 if (env->thumb || n == 0) { 815 n = env->regs[7]; 816 } else { 817 n -= ARM_SYSCALL_BASE; 818 env->eabi = 0; 819 } 820 if ( n > ARM_NR_BASE) { 821 switch (n) { 822 case ARM_NR_cacheflush: 823 /* nop */ 824 break; 825 case ARM_NR_set_tls: 826 cpu_set_tls(env, env->regs[0]); 827 env->regs[0] = 0; 828 break; 829 default: 830 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n", 831 n); 832 env->regs[0] = -TARGET_ENOSYS; 833 break; 834 } 835 } else { 836 env->regs[0] = do_syscall(env, 837 n, 838 env->regs[0], 839 env->regs[1], 840 env->regs[2], 841 env->regs[3], 842 env->regs[4], 843 env->regs[5], 844 0, 0); 845 } 846 } else { 847 goto error; 848 } 849 } 850 break; 851 case EXCP_INTERRUPT: 852 /* just indicate that signals should be handled asap */ 853 break; 854 case EXCP_PREFETCH_ABORT: 855 addr = env->cp15.c6_insn; 856 goto do_segv; 857 case EXCP_DATA_ABORT: 858 addr = env->cp15.c6_data; 859 do_segv: 860 { 861 info.si_signo = SIGSEGV; 862 info.si_errno = 0; 863 /* XXX: check env->error_code */ 864 info.si_code = TARGET_SEGV_MAPERR; 865 info._sifields._sigfault._addr = addr; 866 queue_signal(env, info.si_signo, &info); 867 } 868 break; 869 case EXCP_DEBUG: 870 { 871 int sig; 872 873 sig = gdb_handlesig (env, TARGET_SIGTRAP); 874 if (sig) 875 { 876 info.si_signo = sig; 877 info.si_errno = 0; 878 info.si_code = TARGET_TRAP_BRKPT; 879 queue_signal(env, info.si_signo, &info); 880 } 881 } 882 break; 883 case EXCP_KERNEL_TRAP: 884 if (do_kernel_trap(env)) 885 goto error; 886 break; 887 case EXCP_STREX: 888 if (do_strex(env)) { 889 addr = env->cp15.c6_data; 890 goto do_segv; 891 } 892 break; 893 default: 894 error: 895 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 896 trapnr); 897 cpu_dump_state(env, stderr, fprintf, 0); 898 abort(); 899 } 900 process_pending_signals(env); 901 } 902 } 903 904 #endif 905 906 #ifdef TARGET_UNICORE32 907 908 void cpu_loop(CPUUniCore32State *env) 909 { 910 int trapnr; 911 unsigned int n, insn; 912 target_siginfo_t info; 913 914 for (;;) { 915 cpu_exec_start(env); 916 trapnr = uc32_cpu_exec(env); 917 cpu_exec_end(env); 918 switch (trapnr) { 919 case UC32_EXCP_PRIV: 920 { 921 /* system call */ 922 get_user_u32(insn, env->regs[31] - 4); 923 n = insn & 0xffffff; 924 925 if (n >= UC32_SYSCALL_BASE) { 926 /* linux syscall */ 927 n -= UC32_SYSCALL_BASE; 928 if (n == UC32_SYSCALL_NR_set_tls) { 929 cpu_set_tls(env, env->regs[0]); 930 env->regs[0] = 0; 931 } else { 932 env->regs[0] = do_syscall(env, 933 n, 934 env->regs[0], 935 env->regs[1], 936 env->regs[2], 937 env->regs[3], 938 env->regs[4], 939 env->regs[5], 940 0, 0); 941 } 942 } else { 943 goto error; 944 } 945 } 946 break; 947 case UC32_EXCP_DTRAP: 948 case UC32_EXCP_ITRAP: 949 info.si_signo = SIGSEGV; 950 info.si_errno = 0; 951 /* XXX: check env->error_code */ 952 info.si_code = TARGET_SEGV_MAPERR; 953 info._sifields._sigfault._addr = env->cp0.c4_faultaddr; 954 queue_signal(env, info.si_signo, &info); 955 break; 956 case EXCP_INTERRUPT: 957 /* just indicate that signals should be handled asap */ 958 break; 959 case EXCP_DEBUG: 960 { 961 int sig; 962 963 sig = gdb_handlesig(env, TARGET_SIGTRAP); 964 if (sig) { 965 info.si_signo = sig; 966 info.si_errno = 0; 967 info.si_code = TARGET_TRAP_BRKPT; 968 queue_signal(env, info.si_signo, &info); 969 } 970 } 971 break; 972 default: 973 goto error; 974 } 975 process_pending_signals(env); 976 } 977 978 error: 979 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr); 980 cpu_dump_state(env, stderr, fprintf, 0); 981 abort(); 982 } 983 #endif 984 985 #ifdef TARGET_SPARC 986 #define SPARC64_STACK_BIAS 2047 987 988 //#define DEBUG_WIN 989 990 /* WARNING: dealing with register windows _is_ complicated. More info 991 can be found at http://www.sics.se/~psm/sparcstack.html */ 992 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) 993 { 994 index = (index + cwp * 16) % (16 * env->nwindows); 995 /* wrap handling : if cwp is on the last window, then we use the 996 registers 'after' the end */ 997 if (index < 8 && env->cwp == env->nwindows - 1) 998 index += 16 * env->nwindows; 999 return index; 1000 } 1001 1002 /* save the register window 'cwp1' */ 1003 static inline void save_window_offset(CPUSPARCState *env, int cwp1) 1004 { 1005 unsigned int i; 1006 abi_ulong sp_ptr; 1007 1008 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; 1009 #ifdef TARGET_SPARC64 1010 if (sp_ptr & 3) 1011 sp_ptr += SPARC64_STACK_BIAS; 1012 #endif 1013 #if defined(DEBUG_WIN) 1014 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n", 1015 sp_ptr, cwp1); 1016 #endif 1017 for(i = 0; i < 16; i++) { 1018 /* FIXME - what to do if put_user() fails? */ 1019 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr); 1020 sp_ptr += sizeof(abi_ulong); 1021 } 1022 } 1023 1024 static void save_window(CPUSPARCState *env) 1025 { 1026 #ifndef TARGET_SPARC64 1027 unsigned int new_wim; 1028 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) & 1029 ((1LL << env->nwindows) - 1); 1030 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2)); 1031 env->wim = new_wim; 1032 #else 1033 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2)); 1034 env->cansave++; 1035 env->canrestore--; 1036 #endif 1037 } 1038 1039 static void restore_window(CPUSPARCState *env) 1040 { 1041 #ifndef TARGET_SPARC64 1042 unsigned int new_wim; 1043 #endif 1044 unsigned int i, cwp1; 1045 abi_ulong sp_ptr; 1046 1047 #ifndef TARGET_SPARC64 1048 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) & 1049 ((1LL << env->nwindows) - 1); 1050 #endif 1051 1052 /* restore the invalid window */ 1053 cwp1 = cpu_cwp_inc(env, env->cwp + 1); 1054 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; 1055 #ifdef TARGET_SPARC64 1056 if (sp_ptr & 3) 1057 sp_ptr += SPARC64_STACK_BIAS; 1058 #endif 1059 #if defined(DEBUG_WIN) 1060 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n", 1061 sp_ptr, cwp1); 1062 #endif 1063 for(i = 0; i < 16; i++) { 1064 /* FIXME - what to do if get_user() fails? */ 1065 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr); 1066 sp_ptr += sizeof(abi_ulong); 1067 } 1068 #ifdef TARGET_SPARC64 1069 env->canrestore++; 1070 if (env->cleanwin < env->nwindows - 1) 1071 env->cleanwin++; 1072 env->cansave--; 1073 #else 1074 env->wim = new_wim; 1075 #endif 1076 } 1077 1078 static void flush_windows(CPUSPARCState *env) 1079 { 1080 int offset, cwp1; 1081 1082 offset = 1; 1083 for(;;) { 1084 /* if restore would invoke restore_window(), then we can stop */ 1085 cwp1 = cpu_cwp_inc(env, env->cwp + offset); 1086 #ifndef TARGET_SPARC64 1087 if (env->wim & (1 << cwp1)) 1088 break; 1089 #else 1090 if (env->canrestore == 0) 1091 break; 1092 env->cansave++; 1093 env->canrestore--; 1094 #endif 1095 save_window_offset(env, cwp1); 1096 offset++; 1097 } 1098 cwp1 = cpu_cwp_inc(env, env->cwp + 1); 1099 #ifndef TARGET_SPARC64 1100 /* set wim so that restore will reload the registers */ 1101 env->wim = 1 << cwp1; 1102 #endif 1103 #if defined(DEBUG_WIN) 1104 printf("flush_windows: nb=%d\n", offset - 1); 1105 #endif 1106 } 1107 1108 void cpu_loop (CPUSPARCState *env) 1109 { 1110 int trapnr; 1111 abi_long ret; 1112 target_siginfo_t info; 1113 1114 while (1) { 1115 trapnr = cpu_sparc_exec (env); 1116 1117 /* Compute PSR before exposing state. */ 1118 if (env->cc_op != CC_OP_FLAGS) { 1119 cpu_get_psr(env); 1120 } 1121 1122 switch (trapnr) { 1123 #ifndef TARGET_SPARC64 1124 case 0x88: 1125 case 0x90: 1126 #else 1127 case 0x110: 1128 case 0x16d: 1129 #endif 1130 ret = do_syscall (env, env->gregs[1], 1131 env->regwptr[0], env->regwptr[1], 1132 env->regwptr[2], env->regwptr[3], 1133 env->regwptr[4], env->regwptr[5], 1134 0, 0); 1135 if ((abi_ulong)ret >= (abi_ulong)(-515)) { 1136 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) 1137 env->xcc |= PSR_CARRY; 1138 #else 1139 env->psr |= PSR_CARRY; 1140 #endif 1141 ret = -ret; 1142 } else { 1143 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) 1144 env->xcc &= ~PSR_CARRY; 1145 #else 1146 env->psr &= ~PSR_CARRY; 1147 #endif 1148 } 1149 env->regwptr[0] = ret; 1150 /* next instruction */ 1151 env->pc = env->npc; 1152 env->npc = env->npc + 4; 1153 break; 1154 case 0x83: /* flush windows */ 1155 #ifdef TARGET_ABI32 1156 case 0x103: 1157 #endif 1158 flush_windows(env); 1159 /* next instruction */ 1160 env->pc = env->npc; 1161 env->npc = env->npc + 4; 1162 break; 1163 #ifndef TARGET_SPARC64 1164 case TT_WIN_OVF: /* window overflow */ 1165 save_window(env); 1166 break; 1167 case TT_WIN_UNF: /* window underflow */ 1168 restore_window(env); 1169 break; 1170 case TT_TFAULT: 1171 case TT_DFAULT: 1172 { 1173 info.si_signo = TARGET_SIGSEGV; 1174 info.si_errno = 0; 1175 /* XXX: check env->error_code */ 1176 info.si_code = TARGET_SEGV_MAPERR; 1177 info._sifields._sigfault._addr = env->mmuregs[4]; 1178 queue_signal(env, info.si_signo, &info); 1179 } 1180 break; 1181 #else 1182 case TT_SPILL: /* window overflow */ 1183 save_window(env); 1184 break; 1185 case TT_FILL: /* window underflow */ 1186 restore_window(env); 1187 break; 1188 case TT_TFAULT: 1189 case TT_DFAULT: 1190 { 1191 info.si_signo = TARGET_SIGSEGV; 1192 info.si_errno = 0; 1193 /* XXX: check env->error_code */ 1194 info.si_code = TARGET_SEGV_MAPERR; 1195 if (trapnr == TT_DFAULT) 1196 info._sifields._sigfault._addr = env->dmmuregs[4]; 1197 else 1198 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc; 1199 queue_signal(env, info.si_signo, &info); 1200 } 1201 break; 1202 #ifndef TARGET_ABI32 1203 case 0x16e: 1204 flush_windows(env); 1205 sparc64_get_context(env); 1206 break; 1207 case 0x16f: 1208 flush_windows(env); 1209 sparc64_set_context(env); 1210 break; 1211 #endif 1212 #endif 1213 case EXCP_INTERRUPT: 1214 /* just indicate that signals should be handled asap */ 1215 break; 1216 case TT_ILL_INSN: 1217 { 1218 info.si_signo = TARGET_SIGILL; 1219 info.si_errno = 0; 1220 info.si_code = TARGET_ILL_ILLOPC; 1221 info._sifields._sigfault._addr = env->pc; 1222 queue_signal(env, info.si_signo, &info); 1223 } 1224 break; 1225 case EXCP_DEBUG: 1226 { 1227 int sig; 1228 1229 sig = gdb_handlesig (env, TARGET_SIGTRAP); 1230 if (sig) 1231 { 1232 info.si_signo = sig; 1233 info.si_errno = 0; 1234 info.si_code = TARGET_TRAP_BRKPT; 1235 queue_signal(env, info.si_signo, &info); 1236 } 1237 } 1238 break; 1239 default: 1240 printf ("Unhandled trap: 0x%x\n", trapnr); 1241 cpu_dump_state(env, stderr, fprintf, 0); 1242 exit (1); 1243 } 1244 process_pending_signals (env); 1245 } 1246 } 1247 1248 #endif 1249 1250 #ifdef TARGET_PPC 1251 static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env) 1252 { 1253 /* TO FIX */ 1254 return 0; 1255 } 1256 1257 uint64_t cpu_ppc_load_tbl(CPUPPCState *env) 1258 { 1259 return cpu_ppc_get_tb(env); 1260 } 1261 1262 uint32_t cpu_ppc_load_tbu(CPUPPCState *env) 1263 { 1264 return cpu_ppc_get_tb(env) >> 32; 1265 } 1266 1267 uint64_t cpu_ppc_load_atbl(CPUPPCState *env) 1268 { 1269 return cpu_ppc_get_tb(env); 1270 } 1271 1272 uint32_t cpu_ppc_load_atbu(CPUPPCState *env) 1273 { 1274 return cpu_ppc_get_tb(env) >> 32; 1275 } 1276 1277 uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env) 1278 __attribute__ (( alias ("cpu_ppc_load_tbu") )); 1279 1280 uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env) 1281 { 1282 return cpu_ppc_load_tbl(env) & 0x3FFFFF80; 1283 } 1284 1285 /* XXX: to be fixed */ 1286 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp) 1287 { 1288 return -1; 1289 } 1290 1291 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val) 1292 { 1293 return -1; 1294 } 1295 1296 #define EXCP_DUMP(env, fmt, ...) \ 1297 do { \ 1298 fprintf(stderr, fmt , ## __VA_ARGS__); \ 1299 cpu_dump_state(env, stderr, fprintf, 0); \ 1300 qemu_log(fmt, ## __VA_ARGS__); \ 1301 if (qemu_log_enabled()) { \ 1302 log_cpu_state(env, 0); \ 1303 } \ 1304 } while (0) 1305 1306 static int do_store_exclusive(CPUPPCState *env) 1307 { 1308 target_ulong addr; 1309 target_ulong page_addr; 1310 target_ulong val; 1311 int flags; 1312 int segv = 0; 1313 1314 addr = env->reserve_ea; 1315 page_addr = addr & TARGET_PAGE_MASK; 1316 start_exclusive(); 1317 mmap_lock(); 1318 flags = page_get_flags(page_addr); 1319 if ((flags & PAGE_READ) == 0) { 1320 segv = 1; 1321 } else { 1322 int reg = env->reserve_info & 0x1f; 1323 int size = (env->reserve_info >> 5) & 0xf; 1324 int stored = 0; 1325 1326 if (addr == env->reserve_addr) { 1327 switch (size) { 1328 case 1: segv = get_user_u8(val, addr); break; 1329 case 2: segv = get_user_u16(val, addr); break; 1330 case 4: segv = get_user_u32(val, addr); break; 1331 #if defined(TARGET_PPC64) 1332 case 8: segv = get_user_u64(val, addr); break; 1333 #endif 1334 default: abort(); 1335 } 1336 if (!segv && val == env->reserve_val) { 1337 val = env->gpr[reg]; 1338 switch (size) { 1339 case 1: segv = put_user_u8(val, addr); break; 1340 case 2: segv = put_user_u16(val, addr); break; 1341 case 4: segv = put_user_u32(val, addr); break; 1342 #if defined(TARGET_PPC64) 1343 case 8: segv = put_user_u64(val, addr); break; 1344 #endif 1345 default: abort(); 1346 } 1347 if (!segv) { 1348 stored = 1; 1349 } 1350 } 1351 } 1352 env->crf[0] = (stored << 1) | xer_so; 1353 env->reserve_addr = (target_ulong)-1; 1354 } 1355 if (!segv) { 1356 env->nip += 4; 1357 } 1358 mmap_unlock(); 1359 end_exclusive(); 1360 return segv; 1361 } 1362 1363 void cpu_loop(CPUPPCState *env) 1364 { 1365 target_siginfo_t info; 1366 int trapnr; 1367 target_ulong ret; 1368 1369 for(;;) { 1370 cpu_exec_start(env); 1371 trapnr = cpu_ppc_exec(env); 1372 cpu_exec_end(env); 1373 switch(trapnr) { 1374 case POWERPC_EXCP_NONE: 1375 /* Just go on */ 1376 break; 1377 case POWERPC_EXCP_CRITICAL: /* Critical input */ 1378 cpu_abort(env, "Critical interrupt while in user mode. " 1379 "Aborting\n"); 1380 break; 1381 case POWERPC_EXCP_MCHECK: /* Machine check exception */ 1382 cpu_abort(env, "Machine check exception while in user mode. " 1383 "Aborting\n"); 1384 break; 1385 case POWERPC_EXCP_DSI: /* Data storage exception */ 1386 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n", 1387 env->spr[SPR_DAR]); 1388 /* XXX: check this. Seems bugged */ 1389 switch (env->error_code & 0xFF000000) { 1390 case 0x40000000: 1391 info.si_signo = TARGET_SIGSEGV; 1392 info.si_errno = 0; 1393 info.si_code = TARGET_SEGV_MAPERR; 1394 break; 1395 case 0x04000000: 1396 info.si_signo = TARGET_SIGILL; 1397 info.si_errno = 0; 1398 info.si_code = TARGET_ILL_ILLADR; 1399 break; 1400 case 0x08000000: 1401 info.si_signo = TARGET_SIGSEGV; 1402 info.si_errno = 0; 1403 info.si_code = TARGET_SEGV_ACCERR; 1404 break; 1405 default: 1406 /* Let's send a regular segfault... */ 1407 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n", 1408 env->error_code); 1409 info.si_signo = TARGET_SIGSEGV; 1410 info.si_errno = 0; 1411 info.si_code = TARGET_SEGV_MAPERR; 1412 break; 1413 } 1414 info._sifields._sigfault._addr = env->nip; 1415 queue_signal(env, info.si_signo, &info); 1416 break; 1417 case POWERPC_EXCP_ISI: /* Instruction storage exception */ 1418 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx 1419 "\n", env->spr[SPR_SRR0]); 1420 /* XXX: check this */ 1421 switch (env->error_code & 0xFF000000) { 1422 case 0x40000000: 1423 info.si_signo = TARGET_SIGSEGV; 1424 info.si_errno = 0; 1425 info.si_code = TARGET_SEGV_MAPERR; 1426 break; 1427 case 0x10000000: 1428 case 0x08000000: 1429 info.si_signo = TARGET_SIGSEGV; 1430 info.si_errno = 0; 1431 info.si_code = TARGET_SEGV_ACCERR; 1432 break; 1433 default: 1434 /* Let's send a regular segfault... */ 1435 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n", 1436 env->error_code); 1437 info.si_signo = TARGET_SIGSEGV; 1438 info.si_errno = 0; 1439 info.si_code = TARGET_SEGV_MAPERR; 1440 break; 1441 } 1442 info._sifields._sigfault._addr = env->nip - 4; 1443 queue_signal(env, info.si_signo, &info); 1444 break; 1445 case POWERPC_EXCP_EXTERNAL: /* External input */ 1446 cpu_abort(env, "External interrupt while in user mode. " 1447 "Aborting\n"); 1448 break; 1449 case POWERPC_EXCP_ALIGN: /* Alignment exception */ 1450 EXCP_DUMP(env, "Unaligned memory access\n"); 1451 /* XXX: check this */ 1452 info.si_signo = TARGET_SIGBUS; 1453 info.si_errno = 0; 1454 info.si_code = TARGET_BUS_ADRALN; 1455 info._sifields._sigfault._addr = env->nip - 4; 1456 queue_signal(env, info.si_signo, &info); 1457 break; 1458 case POWERPC_EXCP_PROGRAM: /* Program exception */ 1459 /* XXX: check this */ 1460 switch (env->error_code & ~0xF) { 1461 case POWERPC_EXCP_FP: 1462 EXCP_DUMP(env, "Floating point program exception\n"); 1463 info.si_signo = TARGET_SIGFPE; 1464 info.si_errno = 0; 1465 switch (env->error_code & 0xF) { 1466 case POWERPC_EXCP_FP_OX: 1467 info.si_code = TARGET_FPE_FLTOVF; 1468 break; 1469 case POWERPC_EXCP_FP_UX: 1470 info.si_code = TARGET_FPE_FLTUND; 1471 break; 1472 case POWERPC_EXCP_FP_ZX: 1473 case POWERPC_EXCP_FP_VXZDZ: 1474 info.si_code = TARGET_FPE_FLTDIV; 1475 break; 1476 case POWERPC_EXCP_FP_XX: 1477 info.si_code = TARGET_FPE_FLTRES; 1478 break; 1479 case POWERPC_EXCP_FP_VXSOFT: 1480 info.si_code = TARGET_FPE_FLTINV; 1481 break; 1482 case POWERPC_EXCP_FP_VXSNAN: 1483 case POWERPC_EXCP_FP_VXISI: 1484 case POWERPC_EXCP_FP_VXIDI: 1485 case POWERPC_EXCP_FP_VXIMZ: 1486 case POWERPC_EXCP_FP_VXVC: 1487 case POWERPC_EXCP_FP_VXSQRT: 1488 case POWERPC_EXCP_FP_VXCVI: 1489 info.si_code = TARGET_FPE_FLTSUB; 1490 break; 1491 default: 1492 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n", 1493 env->error_code); 1494 break; 1495 } 1496 break; 1497 case POWERPC_EXCP_INVAL: 1498 EXCP_DUMP(env, "Invalid instruction\n"); 1499 info.si_signo = TARGET_SIGILL; 1500 info.si_errno = 0; 1501 switch (env->error_code & 0xF) { 1502 case POWERPC_EXCP_INVAL_INVAL: 1503 info.si_code = TARGET_ILL_ILLOPC; 1504 break; 1505 case POWERPC_EXCP_INVAL_LSWX: 1506 info.si_code = TARGET_ILL_ILLOPN; 1507 break; 1508 case POWERPC_EXCP_INVAL_SPR: 1509 info.si_code = TARGET_ILL_PRVREG; 1510 break; 1511 case POWERPC_EXCP_INVAL_FP: 1512 info.si_code = TARGET_ILL_COPROC; 1513 break; 1514 default: 1515 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n", 1516 env->error_code & 0xF); 1517 info.si_code = TARGET_ILL_ILLADR; 1518 break; 1519 } 1520 break; 1521 case POWERPC_EXCP_PRIV: 1522 EXCP_DUMP(env, "Privilege violation\n"); 1523 info.si_signo = TARGET_SIGILL; 1524 info.si_errno = 0; 1525 switch (env->error_code & 0xF) { 1526 case POWERPC_EXCP_PRIV_OPC: 1527 info.si_code = TARGET_ILL_PRVOPC; 1528 break; 1529 case POWERPC_EXCP_PRIV_REG: 1530 info.si_code = TARGET_ILL_PRVREG; 1531 break; 1532 default: 1533 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n", 1534 env->error_code & 0xF); 1535 info.si_code = TARGET_ILL_PRVOPC; 1536 break; 1537 } 1538 break; 1539 case POWERPC_EXCP_TRAP: 1540 cpu_abort(env, "Tried to call a TRAP\n"); 1541 break; 1542 default: 1543 /* Should not happen ! */ 1544 cpu_abort(env, "Unknown program exception (%02x)\n", 1545 env->error_code); 1546 break; 1547 } 1548 info._sifields._sigfault._addr = env->nip - 4; 1549 queue_signal(env, info.si_signo, &info); 1550 break; 1551 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ 1552 EXCP_DUMP(env, "No floating point allowed\n"); 1553 info.si_signo = TARGET_SIGILL; 1554 info.si_errno = 0; 1555 info.si_code = TARGET_ILL_COPROC; 1556 info._sifields._sigfault._addr = env->nip - 4; 1557 queue_signal(env, info.si_signo, &info); 1558 break; 1559 case POWERPC_EXCP_SYSCALL: /* System call exception */ 1560 cpu_abort(env, "Syscall exception while in user mode. " 1561 "Aborting\n"); 1562 break; 1563 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ 1564 EXCP_DUMP(env, "No APU instruction allowed\n"); 1565 info.si_signo = TARGET_SIGILL; 1566 info.si_errno = 0; 1567 info.si_code = TARGET_ILL_COPROC; 1568 info._sifields._sigfault._addr = env->nip - 4; 1569 queue_signal(env, info.si_signo, &info); 1570 break; 1571 case POWERPC_EXCP_DECR: /* Decrementer exception */ 1572 cpu_abort(env, "Decrementer interrupt while in user mode. " 1573 "Aborting\n"); 1574 break; 1575 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ 1576 cpu_abort(env, "Fix interval timer interrupt while in user mode. " 1577 "Aborting\n"); 1578 break; 1579 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ 1580 cpu_abort(env, "Watchdog timer interrupt while in user mode. " 1581 "Aborting\n"); 1582 break; 1583 case POWERPC_EXCP_DTLB: /* Data TLB error */ 1584 cpu_abort(env, "Data TLB exception while in user mode. " 1585 "Aborting\n"); 1586 break; 1587 case POWERPC_EXCP_ITLB: /* Instruction TLB error */ 1588 cpu_abort(env, "Instruction TLB exception while in user mode. " 1589 "Aborting\n"); 1590 break; 1591 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */ 1592 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n"); 1593 info.si_signo = TARGET_SIGILL; 1594 info.si_errno = 0; 1595 info.si_code = TARGET_ILL_COPROC; 1596 info._sifields._sigfault._addr = env->nip - 4; 1597 queue_signal(env, info.si_signo, &info); 1598 break; 1599 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */ 1600 cpu_abort(env, "Embedded floating-point data IRQ not handled\n"); 1601 break; 1602 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */ 1603 cpu_abort(env, "Embedded floating-point round IRQ not handled\n"); 1604 break; 1605 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */ 1606 cpu_abort(env, "Performance monitor exception not handled\n"); 1607 break; 1608 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ 1609 cpu_abort(env, "Doorbell interrupt while in user mode. " 1610 "Aborting\n"); 1611 break; 1612 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ 1613 cpu_abort(env, "Doorbell critical interrupt while in user mode. " 1614 "Aborting\n"); 1615 break; 1616 case POWERPC_EXCP_RESET: /* System reset exception */ 1617 cpu_abort(env, "Reset interrupt while in user mode. " 1618 "Aborting\n"); 1619 break; 1620 case POWERPC_EXCP_DSEG: /* Data segment exception */ 1621 cpu_abort(env, "Data segment exception while in user mode. " 1622 "Aborting\n"); 1623 break; 1624 case POWERPC_EXCP_ISEG: /* Instruction segment exception */ 1625 cpu_abort(env, "Instruction segment exception " 1626 "while in user mode. Aborting\n"); 1627 break; 1628 /* PowerPC 64 with hypervisor mode support */ 1629 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ 1630 cpu_abort(env, "Hypervisor decrementer interrupt " 1631 "while in user mode. Aborting\n"); 1632 break; 1633 case POWERPC_EXCP_TRACE: /* Trace exception */ 1634 /* Nothing to do: 1635 * we use this exception to emulate step-by-step execution mode. 1636 */ 1637 break; 1638 /* PowerPC 64 with hypervisor mode support */ 1639 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ 1640 cpu_abort(env, "Hypervisor data storage exception " 1641 "while in user mode. Aborting\n"); 1642 break; 1643 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */ 1644 cpu_abort(env, "Hypervisor instruction storage exception " 1645 "while in user mode. Aborting\n"); 1646 break; 1647 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ 1648 cpu_abort(env, "Hypervisor data segment exception " 1649 "while in user mode. Aborting\n"); 1650 break; 1651 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */ 1652 cpu_abort(env, "Hypervisor instruction segment exception " 1653 "while in user mode. Aborting\n"); 1654 break; 1655 case POWERPC_EXCP_VPU: /* Vector unavailable exception */ 1656 EXCP_DUMP(env, "No Altivec instructions allowed\n"); 1657 info.si_signo = TARGET_SIGILL; 1658 info.si_errno = 0; 1659 info.si_code = TARGET_ILL_COPROC; 1660 info._sifields._sigfault._addr = env->nip - 4; 1661 queue_signal(env, info.si_signo, &info); 1662 break; 1663 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */ 1664 cpu_abort(env, "Programmable interval timer interrupt " 1665 "while in user mode. Aborting\n"); 1666 break; 1667 case POWERPC_EXCP_IO: /* IO error exception */ 1668 cpu_abort(env, "IO error exception while in user mode. " 1669 "Aborting\n"); 1670 break; 1671 case POWERPC_EXCP_RUNM: /* Run mode exception */ 1672 cpu_abort(env, "Run mode exception while in user mode. " 1673 "Aborting\n"); 1674 break; 1675 case POWERPC_EXCP_EMUL: /* Emulation trap exception */ 1676 cpu_abort(env, "Emulation trap exception not handled\n"); 1677 break; 1678 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ 1679 cpu_abort(env, "Instruction fetch TLB exception " 1680 "while in user-mode. Aborting"); 1681 break; 1682 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ 1683 cpu_abort(env, "Data load TLB exception while in user-mode. " 1684 "Aborting"); 1685 break; 1686 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ 1687 cpu_abort(env, "Data store TLB exception while in user-mode. " 1688 "Aborting"); 1689 break; 1690 case POWERPC_EXCP_FPA: /* Floating-point assist exception */ 1691 cpu_abort(env, "Floating-point assist exception not handled\n"); 1692 break; 1693 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ 1694 cpu_abort(env, "Instruction address breakpoint exception " 1695 "not handled\n"); 1696 break; 1697 case POWERPC_EXCP_SMI: /* System management interrupt */ 1698 cpu_abort(env, "System management interrupt while in user mode. " 1699 "Aborting\n"); 1700 break; 1701 case POWERPC_EXCP_THERM: /* Thermal interrupt */ 1702 cpu_abort(env, "Thermal interrupt interrupt while in user mode. " 1703 "Aborting\n"); 1704 break; 1705 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */ 1706 cpu_abort(env, "Performance monitor exception not handled\n"); 1707 break; 1708 case POWERPC_EXCP_VPUA: /* Vector assist exception */ 1709 cpu_abort(env, "Vector assist exception not handled\n"); 1710 break; 1711 case POWERPC_EXCP_SOFTP: /* Soft patch exception */ 1712 cpu_abort(env, "Soft patch exception not handled\n"); 1713 break; 1714 case POWERPC_EXCP_MAINT: /* Maintenance exception */ 1715 cpu_abort(env, "Maintenance exception while in user mode. " 1716 "Aborting\n"); 1717 break; 1718 case POWERPC_EXCP_STOP: /* stop translation */ 1719 /* We did invalidate the instruction cache. Go on */ 1720 break; 1721 case POWERPC_EXCP_BRANCH: /* branch instruction: */ 1722 /* We just stopped because of a branch. Go on */ 1723 break; 1724 case POWERPC_EXCP_SYSCALL_USER: 1725 /* system call in user-mode emulation */ 1726 /* WARNING: 1727 * PPC ABI uses overflow flag in cr0 to signal an error 1728 * in syscalls. 1729 */ 1730 env->crf[0] &= ~0x1; 1731 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], 1732 env->gpr[5], env->gpr[6], env->gpr[7], 1733 env->gpr[8], 0, 0); 1734 if (ret == (target_ulong)(-TARGET_QEMU_ESIGRETURN)) { 1735 /* Returning from a successful sigreturn syscall. 1736 Avoid corrupting register state. */ 1737 break; 1738 } 1739 if (ret > (target_ulong)(-515)) { 1740 env->crf[0] |= 0x1; 1741 ret = -ret; 1742 } 1743 env->gpr[3] = ret; 1744 break; 1745 case POWERPC_EXCP_STCX: 1746 if (do_store_exclusive(env)) { 1747 info.si_signo = TARGET_SIGSEGV; 1748 info.si_errno = 0; 1749 info.si_code = TARGET_SEGV_MAPERR; 1750 info._sifields._sigfault._addr = env->nip; 1751 queue_signal(env, info.si_signo, &info); 1752 } 1753 break; 1754 case EXCP_DEBUG: 1755 { 1756 int sig; 1757 1758 sig = gdb_handlesig(env, TARGET_SIGTRAP); 1759 if (sig) { 1760 info.si_signo = sig; 1761 info.si_errno = 0; 1762 info.si_code = TARGET_TRAP_BRKPT; 1763 queue_signal(env, info.si_signo, &info); 1764 } 1765 } 1766 break; 1767 case EXCP_INTERRUPT: 1768 /* just indicate that signals should be handled asap */ 1769 break; 1770 default: 1771 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr); 1772 break; 1773 } 1774 process_pending_signals(env); 1775 } 1776 } 1777 #endif 1778 1779 #ifdef TARGET_MIPS 1780 1781 #define MIPS_SYS(name, args) args, 1782 1783 static const uint8_t mips_syscall_args[] = { 1784 MIPS_SYS(sys_syscall , 8) /* 4000 */ 1785 MIPS_SYS(sys_exit , 1) 1786 MIPS_SYS(sys_fork , 0) 1787 MIPS_SYS(sys_read , 3) 1788 MIPS_SYS(sys_write , 3) 1789 MIPS_SYS(sys_open , 3) /* 4005 */ 1790 MIPS_SYS(sys_close , 1) 1791 MIPS_SYS(sys_waitpid , 3) 1792 MIPS_SYS(sys_creat , 2) 1793 MIPS_SYS(sys_link , 2) 1794 MIPS_SYS(sys_unlink , 1) /* 4010 */ 1795 MIPS_SYS(sys_execve , 0) 1796 MIPS_SYS(sys_chdir , 1) 1797 MIPS_SYS(sys_time , 1) 1798 MIPS_SYS(sys_mknod , 3) 1799 MIPS_SYS(sys_chmod , 2) /* 4015 */ 1800 MIPS_SYS(sys_lchown , 3) 1801 MIPS_SYS(sys_ni_syscall , 0) 1802 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */ 1803 MIPS_SYS(sys_lseek , 3) 1804 MIPS_SYS(sys_getpid , 0) /* 4020 */ 1805 MIPS_SYS(sys_mount , 5) 1806 MIPS_SYS(sys_oldumount , 1) 1807 MIPS_SYS(sys_setuid , 1) 1808 MIPS_SYS(sys_getuid , 0) 1809 MIPS_SYS(sys_stime , 1) /* 4025 */ 1810 MIPS_SYS(sys_ptrace , 4) 1811 MIPS_SYS(sys_alarm , 1) 1812 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */ 1813 MIPS_SYS(sys_pause , 0) 1814 MIPS_SYS(sys_utime , 2) /* 4030 */ 1815 MIPS_SYS(sys_ni_syscall , 0) 1816 MIPS_SYS(sys_ni_syscall , 0) 1817 MIPS_SYS(sys_access , 2) 1818 MIPS_SYS(sys_nice , 1) 1819 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */ 1820 MIPS_SYS(sys_sync , 0) 1821 MIPS_SYS(sys_kill , 2) 1822 MIPS_SYS(sys_rename , 2) 1823 MIPS_SYS(sys_mkdir , 2) 1824 MIPS_SYS(sys_rmdir , 1) /* 4040 */ 1825 MIPS_SYS(sys_dup , 1) 1826 MIPS_SYS(sys_pipe , 0) 1827 MIPS_SYS(sys_times , 1) 1828 MIPS_SYS(sys_ni_syscall , 0) 1829 MIPS_SYS(sys_brk , 1) /* 4045 */ 1830 MIPS_SYS(sys_setgid , 1) 1831 MIPS_SYS(sys_getgid , 0) 1832 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */ 1833 MIPS_SYS(sys_geteuid , 0) 1834 MIPS_SYS(sys_getegid , 0) /* 4050 */ 1835 MIPS_SYS(sys_acct , 0) 1836 MIPS_SYS(sys_umount , 2) 1837 MIPS_SYS(sys_ni_syscall , 0) 1838 MIPS_SYS(sys_ioctl , 3) 1839 MIPS_SYS(sys_fcntl , 3) /* 4055 */ 1840 MIPS_SYS(sys_ni_syscall , 2) 1841 MIPS_SYS(sys_setpgid , 2) 1842 MIPS_SYS(sys_ni_syscall , 0) 1843 MIPS_SYS(sys_olduname , 1) 1844 MIPS_SYS(sys_umask , 1) /* 4060 */ 1845 MIPS_SYS(sys_chroot , 1) 1846 MIPS_SYS(sys_ustat , 2) 1847 MIPS_SYS(sys_dup2 , 2) 1848 MIPS_SYS(sys_getppid , 0) 1849 MIPS_SYS(sys_getpgrp , 0) /* 4065 */ 1850 MIPS_SYS(sys_setsid , 0) 1851 MIPS_SYS(sys_sigaction , 3) 1852 MIPS_SYS(sys_sgetmask , 0) 1853 MIPS_SYS(sys_ssetmask , 1) 1854 MIPS_SYS(sys_setreuid , 2) /* 4070 */ 1855 MIPS_SYS(sys_setregid , 2) 1856 MIPS_SYS(sys_sigsuspend , 0) 1857 MIPS_SYS(sys_sigpending , 1) 1858 MIPS_SYS(sys_sethostname , 2) 1859 MIPS_SYS(sys_setrlimit , 2) /* 4075 */ 1860 MIPS_SYS(sys_getrlimit , 2) 1861 MIPS_SYS(sys_getrusage , 2) 1862 MIPS_SYS(sys_gettimeofday, 2) 1863 MIPS_SYS(sys_settimeofday, 2) 1864 MIPS_SYS(sys_getgroups , 2) /* 4080 */ 1865 MIPS_SYS(sys_setgroups , 2) 1866 MIPS_SYS(sys_ni_syscall , 0) /* old_select */ 1867 MIPS_SYS(sys_symlink , 2) 1868 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */ 1869 MIPS_SYS(sys_readlink , 3) /* 4085 */ 1870 MIPS_SYS(sys_uselib , 1) 1871 MIPS_SYS(sys_swapon , 2) 1872 MIPS_SYS(sys_reboot , 3) 1873 MIPS_SYS(old_readdir , 3) 1874 MIPS_SYS(old_mmap , 6) /* 4090 */ 1875 MIPS_SYS(sys_munmap , 2) 1876 MIPS_SYS(sys_truncate , 2) 1877 MIPS_SYS(sys_ftruncate , 2) 1878 MIPS_SYS(sys_fchmod , 2) 1879 MIPS_SYS(sys_fchown , 3) /* 4095 */ 1880 MIPS_SYS(sys_getpriority , 2) 1881 MIPS_SYS(sys_setpriority , 3) 1882 MIPS_SYS(sys_ni_syscall , 0) 1883 MIPS_SYS(sys_statfs , 2) 1884 MIPS_SYS(sys_fstatfs , 2) /* 4100 */ 1885 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */ 1886 MIPS_SYS(sys_socketcall , 2) 1887 MIPS_SYS(sys_syslog , 3) 1888 MIPS_SYS(sys_setitimer , 3) 1889 MIPS_SYS(sys_getitimer , 2) /* 4105 */ 1890 MIPS_SYS(sys_newstat , 2) 1891 MIPS_SYS(sys_newlstat , 2) 1892 MIPS_SYS(sys_newfstat , 2) 1893 MIPS_SYS(sys_uname , 1) 1894 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */ 1895 MIPS_SYS(sys_vhangup , 0) 1896 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */ 1897 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */ 1898 MIPS_SYS(sys_wait4 , 4) 1899 MIPS_SYS(sys_swapoff , 1) /* 4115 */ 1900 MIPS_SYS(sys_sysinfo , 1) 1901 MIPS_SYS(sys_ipc , 6) 1902 MIPS_SYS(sys_fsync , 1) 1903 MIPS_SYS(sys_sigreturn , 0) 1904 MIPS_SYS(sys_clone , 6) /* 4120 */ 1905 MIPS_SYS(sys_setdomainname, 2) 1906 MIPS_SYS(sys_newuname , 1) 1907 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */ 1908 MIPS_SYS(sys_adjtimex , 1) 1909 MIPS_SYS(sys_mprotect , 3) /* 4125 */ 1910 MIPS_SYS(sys_sigprocmask , 3) 1911 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */ 1912 MIPS_SYS(sys_init_module , 5) 1913 MIPS_SYS(sys_delete_module, 1) 1914 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */ 1915 MIPS_SYS(sys_quotactl , 0) 1916 MIPS_SYS(sys_getpgid , 1) 1917 MIPS_SYS(sys_fchdir , 1) 1918 MIPS_SYS(sys_bdflush , 2) 1919 MIPS_SYS(sys_sysfs , 3) /* 4135 */ 1920 MIPS_SYS(sys_personality , 1) 1921 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */ 1922 MIPS_SYS(sys_setfsuid , 1) 1923 MIPS_SYS(sys_setfsgid , 1) 1924 MIPS_SYS(sys_llseek , 5) /* 4140 */ 1925 MIPS_SYS(sys_getdents , 3) 1926 MIPS_SYS(sys_select , 5) 1927 MIPS_SYS(sys_flock , 2) 1928 MIPS_SYS(sys_msync , 3) 1929 MIPS_SYS(sys_readv , 3) /* 4145 */ 1930 MIPS_SYS(sys_writev , 3) 1931 MIPS_SYS(sys_cacheflush , 3) 1932 MIPS_SYS(sys_cachectl , 3) 1933 MIPS_SYS(sys_sysmips , 4) 1934 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */ 1935 MIPS_SYS(sys_getsid , 1) 1936 MIPS_SYS(sys_fdatasync , 0) 1937 MIPS_SYS(sys_sysctl , 1) 1938 MIPS_SYS(sys_mlock , 2) 1939 MIPS_SYS(sys_munlock , 2) /* 4155 */ 1940 MIPS_SYS(sys_mlockall , 1) 1941 MIPS_SYS(sys_munlockall , 0) 1942 MIPS_SYS(sys_sched_setparam, 2) 1943 MIPS_SYS(sys_sched_getparam, 2) 1944 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */ 1945 MIPS_SYS(sys_sched_getscheduler, 1) 1946 MIPS_SYS(sys_sched_yield , 0) 1947 MIPS_SYS(sys_sched_get_priority_max, 1) 1948 MIPS_SYS(sys_sched_get_priority_min, 1) 1949 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */ 1950 MIPS_SYS(sys_nanosleep, 2) 1951 MIPS_SYS(sys_mremap , 4) 1952 MIPS_SYS(sys_accept , 3) 1953 MIPS_SYS(sys_bind , 3) 1954 MIPS_SYS(sys_connect , 3) /* 4170 */ 1955 MIPS_SYS(sys_getpeername , 3) 1956 MIPS_SYS(sys_getsockname , 3) 1957 MIPS_SYS(sys_getsockopt , 5) 1958 MIPS_SYS(sys_listen , 2) 1959 MIPS_SYS(sys_recv , 4) /* 4175 */ 1960 MIPS_SYS(sys_recvfrom , 6) 1961 MIPS_SYS(sys_recvmsg , 3) 1962 MIPS_SYS(sys_send , 4) 1963 MIPS_SYS(sys_sendmsg , 3) 1964 MIPS_SYS(sys_sendto , 6) /* 4180 */ 1965 MIPS_SYS(sys_setsockopt , 5) 1966 MIPS_SYS(sys_shutdown , 2) 1967 MIPS_SYS(sys_socket , 3) 1968 MIPS_SYS(sys_socketpair , 4) 1969 MIPS_SYS(sys_setresuid , 3) /* 4185 */ 1970 MIPS_SYS(sys_getresuid , 3) 1971 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */ 1972 MIPS_SYS(sys_poll , 3) 1973 MIPS_SYS(sys_nfsservctl , 3) 1974 MIPS_SYS(sys_setresgid , 3) /* 4190 */ 1975 MIPS_SYS(sys_getresgid , 3) 1976 MIPS_SYS(sys_prctl , 5) 1977 MIPS_SYS(sys_rt_sigreturn, 0) 1978 MIPS_SYS(sys_rt_sigaction, 4) 1979 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */ 1980 MIPS_SYS(sys_rt_sigpending, 2) 1981 MIPS_SYS(sys_rt_sigtimedwait, 4) 1982 MIPS_SYS(sys_rt_sigqueueinfo, 3) 1983 MIPS_SYS(sys_rt_sigsuspend, 0) 1984 MIPS_SYS(sys_pread64 , 6) /* 4200 */ 1985 MIPS_SYS(sys_pwrite64 , 6) 1986 MIPS_SYS(sys_chown , 3) 1987 MIPS_SYS(sys_getcwd , 2) 1988 MIPS_SYS(sys_capget , 2) 1989 MIPS_SYS(sys_capset , 2) /* 4205 */ 1990 MIPS_SYS(sys_sigaltstack , 2) 1991 MIPS_SYS(sys_sendfile , 4) 1992 MIPS_SYS(sys_ni_syscall , 0) 1993 MIPS_SYS(sys_ni_syscall , 0) 1994 MIPS_SYS(sys_mmap2 , 6) /* 4210 */ 1995 MIPS_SYS(sys_truncate64 , 4) 1996 MIPS_SYS(sys_ftruncate64 , 4) 1997 MIPS_SYS(sys_stat64 , 2) 1998 MIPS_SYS(sys_lstat64 , 2) 1999 MIPS_SYS(sys_fstat64 , 2) /* 4215 */ 2000 MIPS_SYS(sys_pivot_root , 2) 2001 MIPS_SYS(sys_mincore , 3) 2002 MIPS_SYS(sys_madvise , 3) 2003 MIPS_SYS(sys_getdents64 , 3) 2004 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */ 2005 MIPS_SYS(sys_ni_syscall , 0) 2006 MIPS_SYS(sys_gettid , 0) 2007 MIPS_SYS(sys_readahead , 5) 2008 MIPS_SYS(sys_setxattr , 5) 2009 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */ 2010 MIPS_SYS(sys_fsetxattr , 5) 2011 MIPS_SYS(sys_getxattr , 4) 2012 MIPS_SYS(sys_lgetxattr , 4) 2013 MIPS_SYS(sys_fgetxattr , 4) 2014 MIPS_SYS(sys_listxattr , 3) /* 4230 */ 2015 MIPS_SYS(sys_llistxattr , 3) 2016 MIPS_SYS(sys_flistxattr , 3) 2017 MIPS_SYS(sys_removexattr , 2) 2018 MIPS_SYS(sys_lremovexattr, 2) 2019 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */ 2020 MIPS_SYS(sys_tkill , 2) 2021 MIPS_SYS(sys_sendfile64 , 5) 2022 MIPS_SYS(sys_futex , 2) 2023 MIPS_SYS(sys_sched_setaffinity, 3) 2024 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */ 2025 MIPS_SYS(sys_io_setup , 2) 2026 MIPS_SYS(sys_io_destroy , 1) 2027 MIPS_SYS(sys_io_getevents, 5) 2028 MIPS_SYS(sys_io_submit , 3) 2029 MIPS_SYS(sys_io_cancel , 3) /* 4245 */ 2030 MIPS_SYS(sys_exit_group , 1) 2031 MIPS_SYS(sys_lookup_dcookie, 3) 2032 MIPS_SYS(sys_epoll_create, 1) 2033 MIPS_SYS(sys_epoll_ctl , 4) 2034 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */ 2035 MIPS_SYS(sys_remap_file_pages, 5) 2036 MIPS_SYS(sys_set_tid_address, 1) 2037 MIPS_SYS(sys_restart_syscall, 0) 2038 MIPS_SYS(sys_fadvise64_64, 7) 2039 MIPS_SYS(sys_statfs64 , 3) /* 4255 */ 2040 MIPS_SYS(sys_fstatfs64 , 2) 2041 MIPS_SYS(sys_timer_create, 3) 2042 MIPS_SYS(sys_timer_settime, 4) 2043 MIPS_SYS(sys_timer_gettime, 2) 2044 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */ 2045 MIPS_SYS(sys_timer_delete, 1) 2046 MIPS_SYS(sys_clock_settime, 2) 2047 MIPS_SYS(sys_clock_gettime, 2) 2048 MIPS_SYS(sys_clock_getres, 2) 2049 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */ 2050 MIPS_SYS(sys_tgkill , 3) 2051 MIPS_SYS(sys_utimes , 2) 2052 MIPS_SYS(sys_mbind , 4) 2053 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */ 2054 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */ 2055 MIPS_SYS(sys_mq_open , 4) 2056 MIPS_SYS(sys_mq_unlink , 1) 2057 MIPS_SYS(sys_mq_timedsend, 5) 2058 MIPS_SYS(sys_mq_timedreceive, 5) 2059 MIPS_SYS(sys_mq_notify , 2) /* 4275 */ 2060 MIPS_SYS(sys_mq_getsetattr, 3) 2061 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */ 2062 MIPS_SYS(sys_waitid , 4) 2063 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */ 2064 MIPS_SYS(sys_add_key , 5) 2065 MIPS_SYS(sys_request_key, 4) 2066 MIPS_SYS(sys_keyctl , 5) 2067 MIPS_SYS(sys_set_thread_area, 1) 2068 MIPS_SYS(sys_inotify_init, 0) 2069 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */ 2070 MIPS_SYS(sys_inotify_rm_watch, 2) 2071 MIPS_SYS(sys_migrate_pages, 4) 2072 MIPS_SYS(sys_openat, 4) 2073 MIPS_SYS(sys_mkdirat, 3) 2074 MIPS_SYS(sys_mknodat, 4) /* 4290 */ 2075 MIPS_SYS(sys_fchownat, 5) 2076 MIPS_SYS(sys_futimesat, 3) 2077 MIPS_SYS(sys_fstatat64, 4) 2078 MIPS_SYS(sys_unlinkat, 3) 2079 MIPS_SYS(sys_renameat, 4) /* 4295 */ 2080 MIPS_SYS(sys_linkat, 5) 2081 MIPS_SYS(sys_symlinkat, 3) 2082 MIPS_SYS(sys_readlinkat, 4) 2083 MIPS_SYS(sys_fchmodat, 3) 2084 MIPS_SYS(sys_faccessat, 3) /* 4300 */ 2085 MIPS_SYS(sys_pselect6, 6) 2086 MIPS_SYS(sys_ppoll, 5) 2087 MIPS_SYS(sys_unshare, 1) 2088 MIPS_SYS(sys_splice, 4) 2089 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */ 2090 MIPS_SYS(sys_tee, 4) 2091 MIPS_SYS(sys_vmsplice, 4) 2092 MIPS_SYS(sys_move_pages, 6) 2093 MIPS_SYS(sys_set_robust_list, 2) 2094 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */ 2095 MIPS_SYS(sys_kexec_load, 4) 2096 MIPS_SYS(sys_getcpu, 3) 2097 MIPS_SYS(sys_epoll_pwait, 6) 2098 MIPS_SYS(sys_ioprio_set, 3) 2099 MIPS_SYS(sys_ioprio_get, 2) 2100 MIPS_SYS(sys_utimensat, 4) 2101 MIPS_SYS(sys_signalfd, 3) 2102 MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */ 2103 MIPS_SYS(sys_eventfd, 1) 2104 MIPS_SYS(sys_fallocate, 6) /* 4320 */ 2105 MIPS_SYS(sys_timerfd_create, 2) 2106 MIPS_SYS(sys_timerfd_gettime, 2) 2107 MIPS_SYS(sys_timerfd_settime, 4) 2108 MIPS_SYS(sys_signalfd4, 4) 2109 MIPS_SYS(sys_eventfd2, 2) /* 4325 */ 2110 MIPS_SYS(sys_epoll_create1, 1) 2111 MIPS_SYS(sys_dup3, 3) 2112 MIPS_SYS(sys_pipe2, 2) 2113 MIPS_SYS(sys_inotify_init1, 1) 2114 MIPS_SYS(sys_preadv, 6) /* 4330 */ 2115 MIPS_SYS(sys_pwritev, 6) 2116 MIPS_SYS(sys_rt_tgsigqueueinfo, 4) 2117 MIPS_SYS(sys_perf_event_open, 5) 2118 MIPS_SYS(sys_accept4, 4) 2119 MIPS_SYS(sys_recvmmsg, 5) /* 4335 */ 2120 MIPS_SYS(sys_fanotify_init, 2) 2121 MIPS_SYS(sys_fanotify_mark, 6) 2122 MIPS_SYS(sys_prlimit64, 4) 2123 MIPS_SYS(sys_name_to_handle_at, 5) 2124 MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */ 2125 MIPS_SYS(sys_clock_adjtime, 2) 2126 MIPS_SYS(sys_syncfs, 1) 2127 }; 2128 2129 #undef MIPS_SYS 2130 2131 static int do_store_exclusive(CPUMIPSState *env) 2132 { 2133 target_ulong addr; 2134 target_ulong page_addr; 2135 target_ulong val; 2136 int flags; 2137 int segv = 0; 2138 int reg; 2139 int d; 2140 2141 addr = env->lladdr; 2142 page_addr = addr & TARGET_PAGE_MASK; 2143 start_exclusive(); 2144 mmap_lock(); 2145 flags = page_get_flags(page_addr); 2146 if ((flags & PAGE_READ) == 0) { 2147 segv = 1; 2148 } else { 2149 reg = env->llreg & 0x1f; 2150 d = (env->llreg & 0x20) != 0; 2151 if (d) { 2152 segv = get_user_s64(val, addr); 2153 } else { 2154 segv = get_user_s32(val, addr); 2155 } 2156 if (!segv) { 2157 if (val != env->llval) { 2158 env->active_tc.gpr[reg] = 0; 2159 } else { 2160 if (d) { 2161 segv = put_user_u64(env->llnewval, addr); 2162 } else { 2163 segv = put_user_u32(env->llnewval, addr); 2164 } 2165 if (!segv) { 2166 env->active_tc.gpr[reg] = 1; 2167 } 2168 } 2169 } 2170 } 2171 env->lladdr = -1; 2172 if (!segv) { 2173 env->active_tc.PC += 4; 2174 } 2175 mmap_unlock(); 2176 end_exclusive(); 2177 return segv; 2178 } 2179 2180 void cpu_loop(CPUMIPSState *env) 2181 { 2182 target_siginfo_t info; 2183 int trapnr, ret; 2184 unsigned int syscall_num; 2185 2186 for(;;) { 2187 cpu_exec_start(env); 2188 trapnr = cpu_mips_exec(env); 2189 cpu_exec_end(env); 2190 switch(trapnr) { 2191 case EXCP_SYSCALL: 2192 syscall_num = env->active_tc.gpr[2] - 4000; 2193 env->active_tc.PC += 4; 2194 if (syscall_num >= sizeof(mips_syscall_args)) { 2195 ret = -TARGET_ENOSYS; 2196 } else { 2197 int nb_args; 2198 abi_ulong sp_reg; 2199 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0; 2200 2201 nb_args = mips_syscall_args[syscall_num]; 2202 sp_reg = env->active_tc.gpr[29]; 2203 switch (nb_args) { 2204 /* these arguments are taken from the stack */ 2205 case 8: 2206 if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) { 2207 goto done_syscall; 2208 } 2209 case 7: 2210 if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) { 2211 goto done_syscall; 2212 } 2213 case 6: 2214 if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) { 2215 goto done_syscall; 2216 } 2217 case 5: 2218 if ((ret = get_user_ual(arg5, sp_reg + 16)) != 0) { 2219 goto done_syscall; 2220 } 2221 default: 2222 break; 2223 } 2224 ret = do_syscall(env, env->active_tc.gpr[2], 2225 env->active_tc.gpr[4], 2226 env->active_tc.gpr[5], 2227 env->active_tc.gpr[6], 2228 env->active_tc.gpr[7], 2229 arg5, arg6, arg7, arg8); 2230 } 2231 done_syscall: 2232 if (ret == -TARGET_QEMU_ESIGRETURN) { 2233 /* Returning from a successful sigreturn syscall. 2234 Avoid clobbering register state. */ 2235 break; 2236 } 2237 if ((unsigned int)ret >= (unsigned int)(-1133)) { 2238 env->active_tc.gpr[7] = 1; /* error flag */ 2239 ret = -ret; 2240 } else { 2241 env->active_tc.gpr[7] = 0; /* error flag */ 2242 } 2243 env->active_tc.gpr[2] = ret; 2244 break; 2245 case EXCP_TLBL: 2246 case EXCP_TLBS: 2247 case EXCP_AdEL: 2248 case EXCP_AdES: 2249 info.si_signo = TARGET_SIGSEGV; 2250 info.si_errno = 0; 2251 /* XXX: check env->error_code */ 2252 info.si_code = TARGET_SEGV_MAPERR; 2253 info._sifields._sigfault._addr = env->CP0_BadVAddr; 2254 queue_signal(env, info.si_signo, &info); 2255 break; 2256 case EXCP_CpU: 2257 case EXCP_RI: 2258 info.si_signo = TARGET_SIGILL; 2259 info.si_errno = 0; 2260 info.si_code = 0; 2261 queue_signal(env, info.si_signo, &info); 2262 break; 2263 case EXCP_INTERRUPT: 2264 /* just indicate that signals should be handled asap */ 2265 break; 2266 case EXCP_DEBUG: 2267 { 2268 int sig; 2269 2270 sig = gdb_handlesig (env, TARGET_SIGTRAP); 2271 if (sig) 2272 { 2273 info.si_signo = sig; 2274 info.si_errno = 0; 2275 info.si_code = TARGET_TRAP_BRKPT; 2276 queue_signal(env, info.si_signo, &info); 2277 } 2278 } 2279 break; 2280 case EXCP_SC: 2281 if (do_store_exclusive(env)) { 2282 info.si_signo = TARGET_SIGSEGV; 2283 info.si_errno = 0; 2284 info.si_code = TARGET_SEGV_MAPERR; 2285 info._sifields._sigfault._addr = env->active_tc.PC; 2286 queue_signal(env, info.si_signo, &info); 2287 } 2288 break; 2289 default: 2290 // error: 2291 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 2292 trapnr); 2293 cpu_dump_state(env, stderr, fprintf, 0); 2294 abort(); 2295 } 2296 process_pending_signals(env); 2297 } 2298 } 2299 #endif 2300 2301 #ifdef TARGET_OPENRISC 2302 2303 void cpu_loop(CPUOpenRISCState *env) 2304 { 2305 int trapnr, gdbsig; 2306 2307 for (;;) { 2308 trapnr = cpu_exec(env); 2309 gdbsig = 0; 2310 2311 switch (trapnr) { 2312 case EXCP_RESET: 2313 qemu_log("\nReset request, exit, pc is %#x\n", env->pc); 2314 exit(1); 2315 break; 2316 case EXCP_BUSERR: 2317 qemu_log("\nBus error, exit, pc is %#x\n", env->pc); 2318 gdbsig = SIGBUS; 2319 break; 2320 case EXCP_DPF: 2321 case EXCP_IPF: 2322 cpu_dump_state(env, stderr, fprintf, 0); 2323 gdbsig = TARGET_SIGSEGV; 2324 break; 2325 case EXCP_TICK: 2326 qemu_log("\nTick time interrupt pc is %#x\n", env->pc); 2327 break; 2328 case EXCP_ALIGN: 2329 qemu_log("\nAlignment pc is %#x\n", env->pc); 2330 gdbsig = SIGBUS; 2331 break; 2332 case EXCP_ILLEGAL: 2333 qemu_log("\nIllegal instructionpc is %#x\n", env->pc); 2334 gdbsig = SIGILL; 2335 break; 2336 case EXCP_INT: 2337 qemu_log("\nExternal interruptpc is %#x\n", env->pc); 2338 break; 2339 case EXCP_DTLBMISS: 2340 case EXCP_ITLBMISS: 2341 qemu_log("\nTLB miss\n"); 2342 break; 2343 case EXCP_RANGE: 2344 qemu_log("\nRange\n"); 2345 gdbsig = SIGSEGV; 2346 break; 2347 case EXCP_SYSCALL: 2348 env->pc += 4; /* 0xc00; */ 2349 env->gpr[11] = do_syscall(env, 2350 env->gpr[11], /* return value */ 2351 env->gpr[3], /* r3 - r7 are params */ 2352 env->gpr[4], 2353 env->gpr[5], 2354 env->gpr[6], 2355 env->gpr[7], 2356 env->gpr[8], 0, 0); 2357 break; 2358 case EXCP_FPE: 2359 qemu_log("\nFloating point error\n"); 2360 break; 2361 case EXCP_TRAP: 2362 qemu_log("\nTrap\n"); 2363 gdbsig = SIGTRAP; 2364 break; 2365 case EXCP_NR: 2366 qemu_log("\nNR\n"); 2367 break; 2368 default: 2369 qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n", 2370 trapnr); 2371 cpu_dump_state(env, stderr, fprintf, 0); 2372 gdbsig = TARGET_SIGILL; 2373 break; 2374 } 2375 if (gdbsig) { 2376 gdb_handlesig(env, gdbsig); 2377 if (gdbsig != TARGET_SIGTRAP) { 2378 exit(1); 2379 } 2380 } 2381 2382 process_pending_signals(env); 2383 } 2384 } 2385 2386 #endif /* TARGET_OPENRISC */ 2387 2388 #ifdef TARGET_SH4 2389 void cpu_loop(CPUSH4State *env) 2390 { 2391 int trapnr, ret; 2392 target_siginfo_t info; 2393 2394 while (1) { 2395 trapnr = cpu_sh4_exec (env); 2396 2397 switch (trapnr) { 2398 case 0x160: 2399 env->pc += 2; 2400 ret = do_syscall(env, 2401 env->gregs[3], 2402 env->gregs[4], 2403 env->gregs[5], 2404 env->gregs[6], 2405 env->gregs[7], 2406 env->gregs[0], 2407 env->gregs[1], 2408 0, 0); 2409 env->gregs[0] = ret; 2410 break; 2411 case EXCP_INTERRUPT: 2412 /* just indicate that signals should be handled asap */ 2413 break; 2414 case EXCP_DEBUG: 2415 { 2416 int sig; 2417 2418 sig = gdb_handlesig (env, TARGET_SIGTRAP); 2419 if (sig) 2420 { 2421 info.si_signo = sig; 2422 info.si_errno = 0; 2423 info.si_code = TARGET_TRAP_BRKPT; 2424 queue_signal(env, info.si_signo, &info); 2425 } 2426 } 2427 break; 2428 case 0xa0: 2429 case 0xc0: 2430 info.si_signo = SIGSEGV; 2431 info.si_errno = 0; 2432 info.si_code = TARGET_SEGV_MAPERR; 2433 info._sifields._sigfault._addr = env->tea; 2434 queue_signal(env, info.si_signo, &info); 2435 break; 2436 2437 default: 2438 printf ("Unhandled trap: 0x%x\n", trapnr); 2439 cpu_dump_state(env, stderr, fprintf, 0); 2440 exit (1); 2441 } 2442 process_pending_signals (env); 2443 } 2444 } 2445 #endif 2446 2447 #ifdef TARGET_CRIS 2448 void cpu_loop(CPUCRISState *env) 2449 { 2450 int trapnr, ret; 2451 target_siginfo_t info; 2452 2453 while (1) { 2454 trapnr = cpu_cris_exec (env); 2455 switch (trapnr) { 2456 case 0xaa: 2457 { 2458 info.si_signo = SIGSEGV; 2459 info.si_errno = 0; 2460 /* XXX: check env->error_code */ 2461 info.si_code = TARGET_SEGV_MAPERR; 2462 info._sifields._sigfault._addr = env->pregs[PR_EDA]; 2463 queue_signal(env, info.si_signo, &info); 2464 } 2465 break; 2466 case EXCP_INTERRUPT: 2467 /* just indicate that signals should be handled asap */ 2468 break; 2469 case EXCP_BREAK: 2470 ret = do_syscall(env, 2471 env->regs[9], 2472 env->regs[10], 2473 env->regs[11], 2474 env->regs[12], 2475 env->regs[13], 2476 env->pregs[7], 2477 env->pregs[11], 2478 0, 0); 2479 env->regs[10] = ret; 2480 break; 2481 case EXCP_DEBUG: 2482 { 2483 int sig; 2484 2485 sig = gdb_handlesig (env, TARGET_SIGTRAP); 2486 if (sig) 2487 { 2488 info.si_signo = sig; 2489 info.si_errno = 0; 2490 info.si_code = TARGET_TRAP_BRKPT; 2491 queue_signal(env, info.si_signo, &info); 2492 } 2493 } 2494 break; 2495 default: 2496 printf ("Unhandled trap: 0x%x\n", trapnr); 2497 cpu_dump_state(env, stderr, fprintf, 0); 2498 exit (1); 2499 } 2500 process_pending_signals (env); 2501 } 2502 } 2503 #endif 2504 2505 #ifdef TARGET_MICROBLAZE 2506 void cpu_loop(CPUMBState *env) 2507 { 2508 int trapnr, ret; 2509 target_siginfo_t info; 2510 2511 while (1) { 2512 trapnr = cpu_mb_exec (env); 2513 switch (trapnr) { 2514 case 0xaa: 2515 { 2516 info.si_signo = SIGSEGV; 2517 info.si_errno = 0; 2518 /* XXX: check env->error_code */ 2519 info.si_code = TARGET_SEGV_MAPERR; 2520 info._sifields._sigfault._addr = 0; 2521 queue_signal(env, info.si_signo, &info); 2522 } 2523 break; 2524 case EXCP_INTERRUPT: 2525 /* just indicate that signals should be handled asap */ 2526 break; 2527 case EXCP_BREAK: 2528 /* Return address is 4 bytes after the call. */ 2529 env->regs[14] += 4; 2530 env->sregs[SR_PC] = env->regs[14]; 2531 ret = do_syscall(env, 2532 env->regs[12], 2533 env->regs[5], 2534 env->regs[6], 2535 env->regs[7], 2536 env->regs[8], 2537 env->regs[9], 2538 env->regs[10], 2539 0, 0); 2540 env->regs[3] = ret; 2541 break; 2542 case EXCP_HW_EXCP: 2543 env->regs[17] = env->sregs[SR_PC] + 4; 2544 if (env->iflags & D_FLAG) { 2545 env->sregs[SR_ESR] |= 1 << 12; 2546 env->sregs[SR_PC] -= 4; 2547 /* FIXME: if branch was immed, replay the imm as well. */ 2548 } 2549 2550 env->iflags &= ~(IMM_FLAG | D_FLAG); 2551 2552 switch (env->sregs[SR_ESR] & 31) { 2553 case ESR_EC_DIVZERO: 2554 info.si_signo = SIGFPE; 2555 info.si_errno = 0; 2556 info.si_code = TARGET_FPE_FLTDIV; 2557 info._sifields._sigfault._addr = 0; 2558 queue_signal(env, info.si_signo, &info); 2559 break; 2560 case ESR_EC_FPU: 2561 info.si_signo = SIGFPE; 2562 info.si_errno = 0; 2563 if (env->sregs[SR_FSR] & FSR_IO) { 2564 info.si_code = TARGET_FPE_FLTINV; 2565 } 2566 if (env->sregs[SR_FSR] & FSR_DZ) { 2567 info.si_code = TARGET_FPE_FLTDIV; 2568 } 2569 info._sifields._sigfault._addr = 0; 2570 queue_signal(env, info.si_signo, &info); 2571 break; 2572 default: 2573 printf ("Unhandled hw-exception: 0x%x\n", 2574 env->sregs[SR_ESR] & ESR_EC_MASK); 2575 cpu_dump_state(env, stderr, fprintf, 0); 2576 exit (1); 2577 break; 2578 } 2579 break; 2580 case EXCP_DEBUG: 2581 { 2582 int sig; 2583 2584 sig = gdb_handlesig (env, TARGET_SIGTRAP); 2585 if (sig) 2586 { 2587 info.si_signo = sig; 2588 info.si_errno = 0; 2589 info.si_code = TARGET_TRAP_BRKPT; 2590 queue_signal(env, info.si_signo, &info); 2591 } 2592 } 2593 break; 2594 default: 2595 printf ("Unhandled trap: 0x%x\n", trapnr); 2596 cpu_dump_state(env, stderr, fprintf, 0); 2597 exit (1); 2598 } 2599 process_pending_signals (env); 2600 } 2601 } 2602 #endif 2603 2604 #ifdef TARGET_M68K 2605 2606 void cpu_loop(CPUM68KState *env) 2607 { 2608 int trapnr; 2609 unsigned int n; 2610 target_siginfo_t info; 2611 TaskState *ts = env->opaque; 2612 2613 for(;;) { 2614 trapnr = cpu_m68k_exec(env); 2615 switch(trapnr) { 2616 case EXCP_ILLEGAL: 2617 { 2618 if (ts->sim_syscalls) { 2619 uint16_t nr; 2620 nr = lduw(env->pc + 2); 2621 env->pc += 4; 2622 do_m68k_simcall(env, nr); 2623 } else { 2624 goto do_sigill; 2625 } 2626 } 2627 break; 2628 case EXCP_HALT_INSN: 2629 /* Semihosing syscall. */ 2630 env->pc += 4; 2631 do_m68k_semihosting(env, env->dregs[0]); 2632 break; 2633 case EXCP_LINEA: 2634 case EXCP_LINEF: 2635 case EXCP_UNSUPPORTED: 2636 do_sigill: 2637 info.si_signo = SIGILL; 2638 info.si_errno = 0; 2639 info.si_code = TARGET_ILL_ILLOPN; 2640 info._sifields._sigfault._addr = env->pc; 2641 queue_signal(env, info.si_signo, &info); 2642 break; 2643 case EXCP_TRAP0: 2644 { 2645 ts->sim_syscalls = 0; 2646 n = env->dregs[0]; 2647 env->pc += 2; 2648 env->dregs[0] = do_syscall(env, 2649 n, 2650 env->dregs[1], 2651 env->dregs[2], 2652 env->dregs[3], 2653 env->dregs[4], 2654 env->dregs[5], 2655 env->aregs[0], 2656 0, 0); 2657 } 2658 break; 2659 case EXCP_INTERRUPT: 2660 /* just indicate that signals should be handled asap */ 2661 break; 2662 case EXCP_ACCESS: 2663 { 2664 info.si_signo = SIGSEGV; 2665 info.si_errno = 0; 2666 /* XXX: check env->error_code */ 2667 info.si_code = TARGET_SEGV_MAPERR; 2668 info._sifields._sigfault._addr = env->mmu.ar; 2669 queue_signal(env, info.si_signo, &info); 2670 } 2671 break; 2672 case EXCP_DEBUG: 2673 { 2674 int sig; 2675 2676 sig = gdb_handlesig (env, TARGET_SIGTRAP); 2677 if (sig) 2678 { 2679 info.si_signo = sig; 2680 info.si_errno = 0; 2681 info.si_code = TARGET_TRAP_BRKPT; 2682 queue_signal(env, info.si_signo, &info); 2683 } 2684 } 2685 break; 2686 default: 2687 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 2688 trapnr); 2689 cpu_dump_state(env, stderr, fprintf, 0); 2690 abort(); 2691 } 2692 process_pending_signals(env); 2693 } 2694 } 2695 #endif /* TARGET_M68K */ 2696 2697 #ifdef TARGET_ALPHA 2698 static void do_store_exclusive(CPUAlphaState *env, int reg, int quad) 2699 { 2700 target_ulong addr, val, tmp; 2701 target_siginfo_t info; 2702 int ret = 0; 2703 2704 addr = env->lock_addr; 2705 tmp = env->lock_st_addr; 2706 env->lock_addr = -1; 2707 env->lock_st_addr = 0; 2708 2709 start_exclusive(); 2710 mmap_lock(); 2711 2712 if (addr == tmp) { 2713 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) { 2714 goto do_sigsegv; 2715 } 2716 2717 if (val == env->lock_value) { 2718 tmp = env->ir[reg]; 2719 if (quad ? put_user_u64(tmp, addr) : put_user_u32(tmp, addr)) { 2720 goto do_sigsegv; 2721 } 2722 ret = 1; 2723 } 2724 } 2725 env->ir[reg] = ret; 2726 env->pc += 4; 2727 2728 mmap_unlock(); 2729 end_exclusive(); 2730 return; 2731 2732 do_sigsegv: 2733 mmap_unlock(); 2734 end_exclusive(); 2735 2736 info.si_signo = TARGET_SIGSEGV; 2737 info.si_errno = 0; 2738 info.si_code = TARGET_SEGV_MAPERR; 2739 info._sifields._sigfault._addr = addr; 2740 queue_signal(env, TARGET_SIGSEGV, &info); 2741 } 2742 2743 void cpu_loop(CPUAlphaState *env) 2744 { 2745 int trapnr; 2746 target_siginfo_t info; 2747 abi_long sysret; 2748 2749 while (1) { 2750 trapnr = cpu_alpha_exec (env); 2751 2752 /* All of the traps imply a transition through PALcode, which 2753 implies an REI instruction has been executed. Which means 2754 that the intr_flag should be cleared. */ 2755 env->intr_flag = 0; 2756 2757 switch (trapnr) { 2758 case EXCP_RESET: 2759 fprintf(stderr, "Reset requested. Exit\n"); 2760 exit(1); 2761 break; 2762 case EXCP_MCHK: 2763 fprintf(stderr, "Machine check exception. Exit\n"); 2764 exit(1); 2765 break; 2766 case EXCP_SMP_INTERRUPT: 2767 case EXCP_CLK_INTERRUPT: 2768 case EXCP_DEV_INTERRUPT: 2769 fprintf(stderr, "External interrupt. Exit\n"); 2770 exit(1); 2771 break; 2772 case EXCP_MMFAULT: 2773 env->lock_addr = -1; 2774 info.si_signo = TARGET_SIGSEGV; 2775 info.si_errno = 0; 2776 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID 2777 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR); 2778 info._sifields._sigfault._addr = env->trap_arg0; 2779 queue_signal(env, info.si_signo, &info); 2780 break; 2781 case EXCP_UNALIGN: 2782 env->lock_addr = -1; 2783 info.si_signo = TARGET_SIGBUS; 2784 info.si_errno = 0; 2785 info.si_code = TARGET_BUS_ADRALN; 2786 info._sifields._sigfault._addr = env->trap_arg0; 2787 queue_signal(env, info.si_signo, &info); 2788 break; 2789 case EXCP_OPCDEC: 2790 do_sigill: 2791 env->lock_addr = -1; 2792 info.si_signo = TARGET_SIGILL; 2793 info.si_errno = 0; 2794 info.si_code = TARGET_ILL_ILLOPC; 2795 info._sifields._sigfault._addr = env->pc; 2796 queue_signal(env, info.si_signo, &info); 2797 break; 2798 case EXCP_ARITH: 2799 env->lock_addr = -1; 2800 info.si_signo = TARGET_SIGFPE; 2801 info.si_errno = 0; 2802 info.si_code = TARGET_FPE_FLTINV; 2803 info._sifields._sigfault._addr = env->pc; 2804 queue_signal(env, info.si_signo, &info); 2805 break; 2806 case EXCP_FEN: 2807 /* No-op. Linux simply re-enables the FPU. */ 2808 break; 2809 case EXCP_CALL_PAL: 2810 env->lock_addr = -1; 2811 switch (env->error_code) { 2812 case 0x80: 2813 /* BPT */ 2814 info.si_signo = TARGET_SIGTRAP; 2815 info.si_errno = 0; 2816 info.si_code = TARGET_TRAP_BRKPT; 2817 info._sifields._sigfault._addr = env->pc; 2818 queue_signal(env, info.si_signo, &info); 2819 break; 2820 case 0x81: 2821 /* BUGCHK */ 2822 info.si_signo = TARGET_SIGTRAP; 2823 info.si_errno = 0; 2824 info.si_code = 0; 2825 info._sifields._sigfault._addr = env->pc; 2826 queue_signal(env, info.si_signo, &info); 2827 break; 2828 case 0x83: 2829 /* CALLSYS */ 2830 trapnr = env->ir[IR_V0]; 2831 sysret = do_syscall(env, trapnr, 2832 env->ir[IR_A0], env->ir[IR_A1], 2833 env->ir[IR_A2], env->ir[IR_A3], 2834 env->ir[IR_A4], env->ir[IR_A5], 2835 0, 0); 2836 if (trapnr == TARGET_NR_sigreturn 2837 || trapnr == TARGET_NR_rt_sigreturn) { 2838 break; 2839 } 2840 /* Syscall writes 0 to V0 to bypass error check, similar 2841 to how this is handled internal to Linux kernel. 2842 (Ab)use trapnr temporarily as boolean indicating error. */ 2843 trapnr = (env->ir[IR_V0] != 0 && sysret < 0); 2844 env->ir[IR_V0] = (trapnr ? -sysret : sysret); 2845 env->ir[IR_A3] = trapnr; 2846 break; 2847 case 0x86: 2848 /* IMB */ 2849 /* ??? We can probably elide the code using page_unprotect 2850 that is checking for self-modifying code. Instead we 2851 could simply call tb_flush here. Until we work out the 2852 changes required to turn off the extra write protection, 2853 this can be a no-op. */ 2854 break; 2855 case 0x9E: 2856 /* RDUNIQUE */ 2857 /* Handled in the translator for usermode. */ 2858 abort(); 2859 case 0x9F: 2860 /* WRUNIQUE */ 2861 /* Handled in the translator for usermode. */ 2862 abort(); 2863 case 0xAA: 2864 /* GENTRAP */ 2865 info.si_signo = TARGET_SIGFPE; 2866 switch (env->ir[IR_A0]) { 2867 case TARGET_GEN_INTOVF: 2868 info.si_code = TARGET_FPE_INTOVF; 2869 break; 2870 case TARGET_GEN_INTDIV: 2871 info.si_code = TARGET_FPE_INTDIV; 2872 break; 2873 case TARGET_GEN_FLTOVF: 2874 info.si_code = TARGET_FPE_FLTOVF; 2875 break; 2876 case TARGET_GEN_FLTUND: 2877 info.si_code = TARGET_FPE_FLTUND; 2878 break; 2879 case TARGET_GEN_FLTINV: 2880 info.si_code = TARGET_FPE_FLTINV; 2881 break; 2882 case TARGET_GEN_FLTINE: 2883 info.si_code = TARGET_FPE_FLTRES; 2884 break; 2885 case TARGET_GEN_ROPRAND: 2886 info.si_code = 0; 2887 break; 2888 default: 2889 info.si_signo = TARGET_SIGTRAP; 2890 info.si_code = 0; 2891 break; 2892 } 2893 info.si_errno = 0; 2894 info._sifields._sigfault._addr = env->pc; 2895 queue_signal(env, info.si_signo, &info); 2896 break; 2897 default: 2898 goto do_sigill; 2899 } 2900 break; 2901 case EXCP_DEBUG: 2902 info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP); 2903 if (info.si_signo) { 2904 env->lock_addr = -1; 2905 info.si_errno = 0; 2906 info.si_code = TARGET_TRAP_BRKPT; 2907 queue_signal(env, info.si_signo, &info); 2908 } 2909 break; 2910 case EXCP_STL_C: 2911 case EXCP_STQ_C: 2912 do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C); 2913 break; 2914 case EXCP_INTERRUPT: 2915 /* Just indicate that signals should be handled asap. */ 2916 break; 2917 default: 2918 printf ("Unhandled trap: 0x%x\n", trapnr); 2919 cpu_dump_state(env, stderr, fprintf, 0); 2920 exit (1); 2921 } 2922 process_pending_signals (env); 2923 } 2924 } 2925 #endif /* TARGET_ALPHA */ 2926 2927 #ifdef TARGET_S390X 2928 void cpu_loop(CPUS390XState *env) 2929 { 2930 int trapnr; 2931 target_siginfo_t info; 2932 2933 while (1) { 2934 trapnr = cpu_s390x_exec (env); 2935 2936 switch (trapnr) { 2937 case EXCP_INTERRUPT: 2938 /* just indicate that signals should be handled asap */ 2939 break; 2940 case EXCP_DEBUG: 2941 { 2942 int sig; 2943 2944 sig = gdb_handlesig (env, TARGET_SIGTRAP); 2945 if (sig) { 2946 info.si_signo = sig; 2947 info.si_errno = 0; 2948 info.si_code = TARGET_TRAP_BRKPT; 2949 queue_signal(env, info.si_signo, &info); 2950 } 2951 } 2952 break; 2953 case EXCP_SVC: 2954 { 2955 int n = env->int_svc_code; 2956 if (!n) { 2957 /* syscalls > 255 */ 2958 n = env->regs[1]; 2959 } 2960 env->psw.addr += env->int_svc_ilc; 2961 env->regs[2] = do_syscall(env, n, 2962 env->regs[2], 2963 env->regs[3], 2964 env->regs[4], 2965 env->regs[5], 2966 env->regs[6], 2967 env->regs[7], 2968 0, 0); 2969 } 2970 break; 2971 case EXCP_ADDR: 2972 { 2973 info.si_signo = SIGSEGV; 2974 info.si_errno = 0; 2975 /* XXX: check env->error_code */ 2976 info.si_code = TARGET_SEGV_MAPERR; 2977 info._sifields._sigfault._addr = env->__excp_addr; 2978 queue_signal(env, info.si_signo, &info); 2979 } 2980 break; 2981 case EXCP_SPEC: 2982 { 2983 fprintf(stderr,"specification exception insn 0x%08x%04x\n", ldl(env->psw.addr), lduw(env->psw.addr + 4)); 2984 info.si_signo = SIGILL; 2985 info.si_errno = 0; 2986 info.si_code = TARGET_ILL_ILLOPC; 2987 info._sifields._sigfault._addr = env->__excp_addr; 2988 queue_signal(env, info.si_signo, &info); 2989 } 2990 break; 2991 default: 2992 printf ("Unhandled trap: 0x%x\n", trapnr); 2993 cpu_dump_state(env, stderr, fprintf, 0); 2994 exit (1); 2995 } 2996 process_pending_signals (env); 2997 } 2998 } 2999 3000 #endif /* TARGET_S390X */ 3001 3002 THREAD CPUArchState *thread_env; 3003 3004 void task_settid(TaskState *ts) 3005 { 3006 if (ts->ts_tid == 0) { 3007 #ifdef CONFIG_USE_NPTL 3008 ts->ts_tid = (pid_t)syscall(SYS_gettid); 3009 #else 3010 /* when no threads are used, tid becomes pid */ 3011 ts->ts_tid = getpid(); 3012 #endif 3013 } 3014 } 3015 3016 void stop_all_tasks(void) 3017 { 3018 /* 3019 * We trust that when using NPTL, start_exclusive() 3020 * handles thread stopping correctly. 3021 */ 3022 start_exclusive(); 3023 } 3024 3025 /* Assumes contents are already zeroed. */ 3026 void init_task_state(TaskState *ts) 3027 { 3028 int i; 3029 3030 ts->used = 1; 3031 ts->first_free = ts->sigqueue_table; 3032 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) { 3033 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1]; 3034 } 3035 ts->sigqueue_table[i].next = NULL; 3036 } 3037 3038 static void handle_arg_help(const char *arg) 3039 { 3040 usage(); 3041 } 3042 3043 static void handle_arg_log(const char *arg) 3044 { 3045 int mask; 3046 const CPULogItem *item; 3047 3048 mask = cpu_str_to_log_mask(arg); 3049 if (!mask) { 3050 printf("Log items (comma separated):\n"); 3051 for (item = cpu_log_items; item->mask != 0; item++) { 3052 printf("%-10s %s\n", item->name, item->help); 3053 } 3054 exit(1); 3055 } 3056 cpu_set_log(mask); 3057 } 3058 3059 static void handle_arg_log_filename(const char *arg) 3060 { 3061 cpu_set_log_filename(arg); 3062 } 3063 3064 static void handle_arg_set_env(const char *arg) 3065 { 3066 char *r, *p, *token; 3067 r = p = strdup(arg); 3068 while ((token = strsep(&p, ",")) != NULL) { 3069 if (envlist_setenv(envlist, token) != 0) { 3070 usage(); 3071 } 3072 } 3073 free(r); 3074 } 3075 3076 static void handle_arg_unset_env(const char *arg) 3077 { 3078 char *r, *p, *token; 3079 r = p = strdup(arg); 3080 while ((token = strsep(&p, ",")) != NULL) { 3081 if (envlist_unsetenv(envlist, token) != 0) { 3082 usage(); 3083 } 3084 } 3085 free(r); 3086 } 3087 3088 static void handle_arg_argv0(const char *arg) 3089 { 3090 argv0 = strdup(arg); 3091 } 3092 3093 static void handle_arg_stack_size(const char *arg) 3094 { 3095 char *p; 3096 guest_stack_size = strtoul(arg, &p, 0); 3097 if (guest_stack_size == 0) { 3098 usage(); 3099 } 3100 3101 if (*p == 'M') { 3102 guest_stack_size *= 1024 * 1024; 3103 } else if (*p == 'k' || *p == 'K') { 3104 guest_stack_size *= 1024; 3105 } 3106 } 3107 3108 static void handle_arg_ld_prefix(const char *arg) 3109 { 3110 interp_prefix = strdup(arg); 3111 } 3112 3113 static void handle_arg_pagesize(const char *arg) 3114 { 3115 qemu_host_page_size = atoi(arg); 3116 if (qemu_host_page_size == 0 || 3117 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { 3118 fprintf(stderr, "page size must be a power of two\n"); 3119 exit(1); 3120 } 3121 } 3122 3123 static void handle_arg_gdb(const char *arg) 3124 { 3125 gdbstub_port = atoi(arg); 3126 } 3127 3128 static void handle_arg_uname(const char *arg) 3129 { 3130 qemu_uname_release = strdup(arg); 3131 } 3132 3133 static void handle_arg_cpu(const char *arg) 3134 { 3135 cpu_model = strdup(arg); 3136 if (cpu_model == NULL || is_help_option(cpu_model)) { 3137 /* XXX: implement xxx_cpu_list for targets that still miss it */ 3138 #if defined(cpu_list) 3139 cpu_list(stdout, &fprintf); 3140 #endif 3141 exit(1); 3142 } 3143 } 3144 3145 #if defined(CONFIG_USE_GUEST_BASE) 3146 static void handle_arg_guest_base(const char *arg) 3147 { 3148 guest_base = strtol(arg, NULL, 0); 3149 have_guest_base = 1; 3150 } 3151 3152 static void handle_arg_reserved_va(const char *arg) 3153 { 3154 char *p; 3155 int shift = 0; 3156 reserved_va = strtoul(arg, &p, 0); 3157 switch (*p) { 3158 case 'k': 3159 case 'K': 3160 shift = 10; 3161 break; 3162 case 'M': 3163 shift = 20; 3164 break; 3165 case 'G': 3166 shift = 30; 3167 break; 3168 } 3169 if (shift) { 3170 unsigned long unshifted = reserved_va; 3171 p++; 3172 reserved_va <<= shift; 3173 if (((reserved_va >> shift) != unshifted) 3174 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS 3175 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) 3176 #endif 3177 ) { 3178 fprintf(stderr, "Reserved virtual address too big\n"); 3179 exit(1); 3180 } 3181 } 3182 if (*p) { 3183 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p); 3184 exit(1); 3185 } 3186 } 3187 #endif 3188 3189 static void handle_arg_singlestep(const char *arg) 3190 { 3191 singlestep = 1; 3192 } 3193 3194 static void handle_arg_strace(const char *arg) 3195 { 3196 do_strace = 1; 3197 } 3198 3199 static void handle_arg_version(const char *arg) 3200 { 3201 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION 3202 ", Copyright (c) 2003-2008 Fabrice Bellard\n"); 3203 exit(0); 3204 } 3205 3206 struct qemu_argument { 3207 const char *argv; 3208 const char *env; 3209 bool has_arg; 3210 void (*handle_opt)(const char *arg); 3211 const char *example; 3212 const char *help; 3213 }; 3214 3215 static const struct qemu_argument arg_table[] = { 3216 {"h", "", false, handle_arg_help, 3217 "", "print this help"}, 3218 {"g", "QEMU_GDB", true, handle_arg_gdb, 3219 "port", "wait gdb connection to 'port'"}, 3220 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix, 3221 "path", "set the elf interpreter prefix to 'path'"}, 3222 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size, 3223 "size", "set the stack size to 'size' bytes"}, 3224 {"cpu", "QEMU_CPU", true, handle_arg_cpu, 3225 "model", "select CPU (-cpu help for list)"}, 3226 {"E", "QEMU_SET_ENV", true, handle_arg_set_env, 3227 "var=value", "sets targets environment variable (see below)"}, 3228 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env, 3229 "var", "unsets targets environment variable (see below)"}, 3230 {"0", "QEMU_ARGV0", true, handle_arg_argv0, 3231 "argv0", "forces target process argv[0] to be 'argv0'"}, 3232 {"r", "QEMU_UNAME", true, handle_arg_uname, 3233 "uname", "set qemu uname release string to 'uname'"}, 3234 #if defined(CONFIG_USE_GUEST_BASE) 3235 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base, 3236 "address", "set guest_base address to 'address'"}, 3237 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va, 3238 "size", "reserve 'size' bytes for guest virtual address space"}, 3239 #endif 3240 {"d", "QEMU_LOG", true, handle_arg_log, 3241 "options", "activate log"}, 3242 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename, 3243 "logfile", "override default logfile location"}, 3244 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize, 3245 "pagesize", "set the host page size to 'pagesize'"}, 3246 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep, 3247 "", "run in singlestep mode"}, 3248 {"strace", "QEMU_STRACE", false, handle_arg_strace, 3249 "", "log system calls"}, 3250 {"version", "QEMU_VERSION", false, handle_arg_version, 3251 "", "display version information and exit"}, 3252 {NULL, NULL, false, NULL, NULL, NULL} 3253 }; 3254 3255 static void usage(void) 3256 { 3257 const struct qemu_argument *arginfo; 3258 int maxarglen; 3259 int maxenvlen; 3260 3261 printf("usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n" 3262 "Linux CPU emulator (compiled for " TARGET_ARCH " emulation)\n" 3263 "\n" 3264 "Options and associated environment variables:\n" 3265 "\n"); 3266 3267 maxarglen = maxenvlen = 0; 3268 3269 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) { 3270 if (strlen(arginfo->env) > maxenvlen) { 3271 maxenvlen = strlen(arginfo->env); 3272 } 3273 if (strlen(arginfo->argv) > maxarglen) { 3274 maxarglen = strlen(arginfo->argv); 3275 } 3276 } 3277 3278 printf("%-*s%-*sDescription\n", maxarglen+3, "Argument", 3279 maxenvlen+1, "Env-variable"); 3280 3281 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) { 3282 if (arginfo->has_arg) { 3283 printf("-%s %-*s %-*s %s\n", arginfo->argv, 3284 (int)(maxarglen-strlen(arginfo->argv)), arginfo->example, 3285 maxenvlen, arginfo->env, arginfo->help); 3286 } else { 3287 printf("-%-*s %-*s %s\n", maxarglen+1, arginfo->argv, 3288 maxenvlen, arginfo->env, 3289 arginfo->help); 3290 } 3291 } 3292 3293 printf("\n" 3294 "Defaults:\n" 3295 "QEMU_LD_PREFIX = %s\n" 3296 "QEMU_STACK_SIZE = %ld byte\n" 3297 "QEMU_LOG = %s\n", 3298 interp_prefix, 3299 guest_stack_size, 3300 DEBUG_LOGFILE); 3301 3302 printf("\n" 3303 "You can use -E and -U options or the QEMU_SET_ENV and\n" 3304 "QEMU_UNSET_ENV environment variables to set and unset\n" 3305 "environment variables for the target process.\n" 3306 "It is possible to provide several variables by separating them\n" 3307 "by commas in getsubopt(3) style. Additionally it is possible to\n" 3308 "provide the -E and -U options multiple times.\n" 3309 "The following lines are equivalent:\n" 3310 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n" 3311 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n" 3312 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n" 3313 "Note that if you provide several changes to a single variable\n" 3314 "the last change will stay in effect.\n"); 3315 3316 exit(1); 3317 } 3318 3319 static int parse_args(int argc, char **argv) 3320 { 3321 const char *r; 3322 int optind; 3323 const struct qemu_argument *arginfo; 3324 3325 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) { 3326 if (arginfo->env == NULL) { 3327 continue; 3328 } 3329 3330 r = getenv(arginfo->env); 3331 if (r != NULL) { 3332 arginfo->handle_opt(r); 3333 } 3334 } 3335 3336 optind = 1; 3337 for (;;) { 3338 if (optind >= argc) { 3339 break; 3340 } 3341 r = argv[optind]; 3342 if (r[0] != '-') { 3343 break; 3344 } 3345 optind++; 3346 r++; 3347 if (!strcmp(r, "-")) { 3348 break; 3349 } 3350 3351 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) { 3352 if (!strcmp(r, arginfo->argv)) { 3353 if (arginfo->has_arg) { 3354 if (optind >= argc) { 3355 usage(); 3356 } 3357 arginfo->handle_opt(argv[optind]); 3358 optind++; 3359 } else { 3360 arginfo->handle_opt(NULL); 3361 } 3362 break; 3363 } 3364 } 3365 3366 /* no option matched the current argv */ 3367 if (arginfo->handle_opt == NULL) { 3368 usage(); 3369 } 3370 } 3371 3372 if (optind >= argc) { 3373 usage(); 3374 } 3375 3376 filename = argv[optind]; 3377 exec_path = argv[optind]; 3378 3379 return optind; 3380 } 3381 3382 int main(int argc, char **argv, char **envp) 3383 { 3384 const char *log_file = DEBUG_LOGFILE; 3385 struct target_pt_regs regs1, *regs = ®s1; 3386 struct image_info info1, *info = &info1; 3387 struct linux_binprm bprm; 3388 TaskState *ts; 3389 CPUArchState *env; 3390 int optind; 3391 char **target_environ, **wrk; 3392 char **target_argv; 3393 int target_argc; 3394 int i; 3395 int ret; 3396 3397 module_call_init(MODULE_INIT_QOM); 3398 3399 qemu_cache_utils_init(envp); 3400 3401 if ((envlist = envlist_create()) == NULL) { 3402 (void) fprintf(stderr, "Unable to allocate envlist\n"); 3403 exit(1); 3404 } 3405 3406 /* add current environment into the list */ 3407 for (wrk = environ; *wrk != NULL; wrk++) { 3408 (void) envlist_setenv(envlist, *wrk); 3409 } 3410 3411 /* Read the stack limit from the kernel. If it's "unlimited", 3412 then we can do little else besides use the default. */ 3413 { 3414 struct rlimit lim; 3415 if (getrlimit(RLIMIT_STACK, &lim) == 0 3416 && lim.rlim_cur != RLIM_INFINITY 3417 && lim.rlim_cur == (target_long)lim.rlim_cur) { 3418 guest_stack_size = lim.rlim_cur; 3419 } 3420 } 3421 3422 cpu_model = NULL; 3423 #if defined(cpudef_setup) 3424 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */ 3425 #endif 3426 3427 /* init debug */ 3428 cpu_set_log_filename(log_file); 3429 optind = parse_args(argc, argv); 3430 3431 /* Zero out regs */ 3432 memset(regs, 0, sizeof(struct target_pt_regs)); 3433 3434 /* Zero out image_info */ 3435 memset(info, 0, sizeof(struct image_info)); 3436 3437 memset(&bprm, 0, sizeof (bprm)); 3438 3439 /* Scan interp_prefix dir for replacement files. */ 3440 init_paths(interp_prefix); 3441 3442 if (cpu_model == NULL) { 3443 #if defined(TARGET_I386) 3444 #ifdef TARGET_X86_64 3445 cpu_model = "qemu64"; 3446 #else 3447 cpu_model = "qemu32"; 3448 #endif 3449 #elif defined(TARGET_ARM) 3450 cpu_model = "any"; 3451 #elif defined(TARGET_UNICORE32) 3452 cpu_model = "any"; 3453 #elif defined(TARGET_M68K) 3454 cpu_model = "any"; 3455 #elif defined(TARGET_SPARC) 3456 #ifdef TARGET_SPARC64 3457 cpu_model = "TI UltraSparc II"; 3458 #else 3459 cpu_model = "Fujitsu MB86904"; 3460 #endif 3461 #elif defined(TARGET_MIPS) 3462 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64) 3463 cpu_model = "20Kc"; 3464 #else 3465 cpu_model = "24Kf"; 3466 #endif 3467 #elif defined TARGET_OPENRISC 3468 cpu_model = "or1200"; 3469 #elif defined(TARGET_PPC) 3470 #ifdef TARGET_PPC64 3471 cpu_model = "970fx"; 3472 #else 3473 cpu_model = "750"; 3474 #endif 3475 #else 3476 cpu_model = "any"; 3477 #endif 3478 } 3479 tcg_exec_init(0); 3480 cpu_exec_init_all(); 3481 /* NOTE: we need to init the CPU at this stage to get 3482 qemu_host_page_size */ 3483 env = cpu_init(cpu_model); 3484 if (!env) { 3485 fprintf(stderr, "Unable to find CPU definition\n"); 3486 exit(1); 3487 } 3488 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC) 3489 cpu_reset(ENV_GET_CPU(env)); 3490 #endif 3491 3492 thread_env = env; 3493 3494 if (getenv("QEMU_STRACE")) { 3495 do_strace = 1; 3496 } 3497 3498 target_environ = envlist_to_environ(envlist, NULL); 3499 envlist_free(envlist); 3500 3501 #if defined(CONFIG_USE_GUEST_BASE) 3502 /* 3503 * Now that page sizes are configured in cpu_init() we can do 3504 * proper page alignment for guest_base. 3505 */ 3506 guest_base = HOST_PAGE_ALIGN(guest_base); 3507 3508 if (reserved_va || have_guest_base) { 3509 guest_base = init_guest_space(guest_base, reserved_va, 0, 3510 have_guest_base); 3511 if (guest_base == (unsigned long)-1) { 3512 fprintf(stderr, "Unable to reserve 0x%lx bytes of virtual address " 3513 "space for use as guest address space (check your virtual " 3514 "memory ulimit setting or reserve less using -R option)\n", 3515 reserved_va); 3516 exit(1); 3517 } 3518 3519 if (reserved_va) { 3520 mmap_next_start = reserved_va; 3521 } 3522 } 3523 #endif /* CONFIG_USE_GUEST_BASE */ 3524 3525 /* 3526 * Read in mmap_min_addr kernel parameter. This value is used 3527 * When loading the ELF image to determine whether guest_base 3528 * is needed. It is also used in mmap_find_vma. 3529 */ 3530 { 3531 FILE *fp; 3532 3533 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) { 3534 unsigned long tmp; 3535 if (fscanf(fp, "%lu", &tmp) == 1) { 3536 mmap_min_addr = tmp; 3537 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr); 3538 } 3539 fclose(fp); 3540 } 3541 } 3542 3543 /* 3544 * Prepare copy of argv vector for target. 3545 */ 3546 target_argc = argc - optind; 3547 target_argv = calloc(target_argc + 1, sizeof (char *)); 3548 if (target_argv == NULL) { 3549 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n"); 3550 exit(1); 3551 } 3552 3553 /* 3554 * If argv0 is specified (using '-0' switch) we replace 3555 * argv[0] pointer with the given one. 3556 */ 3557 i = 0; 3558 if (argv0 != NULL) { 3559 target_argv[i++] = strdup(argv0); 3560 } 3561 for (; i < target_argc; i++) { 3562 target_argv[i] = strdup(argv[optind + i]); 3563 } 3564 target_argv[target_argc] = NULL; 3565 3566 ts = g_malloc0 (sizeof(TaskState)); 3567 init_task_state(ts); 3568 /* build Task State */ 3569 ts->info = info; 3570 ts->bprm = &bprm; 3571 env->opaque = ts; 3572 task_settid(ts); 3573 3574 ret = loader_exec(filename, target_argv, target_environ, regs, 3575 info, &bprm); 3576 if (ret != 0) { 3577 printf("Error while loading %s: %s\n", filename, strerror(-ret)); 3578 _exit(1); 3579 } 3580 3581 for (wrk = target_environ; *wrk; wrk++) { 3582 free(*wrk); 3583 } 3584 3585 free(target_environ); 3586 3587 if (qemu_log_enabled()) { 3588 #if defined(CONFIG_USE_GUEST_BASE) 3589 qemu_log("guest_base 0x%lx\n", guest_base); 3590 #endif 3591 log_page_dump(); 3592 3593 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk); 3594 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code); 3595 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n", 3596 info->start_code); 3597 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n", 3598 info->start_data); 3599 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data); 3600 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n", 3601 info->start_stack); 3602 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk); 3603 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry); 3604 } 3605 3606 target_set_brk(info->brk); 3607 syscall_init(); 3608 signal_init(); 3609 3610 #if defined(CONFIG_USE_GUEST_BASE) 3611 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay 3612 generating the prologue until now so that the prologue can take 3613 the real value of GUEST_BASE into account. */ 3614 tcg_prologue_init(&tcg_ctx); 3615 #endif 3616 3617 #if defined(TARGET_I386) 3618 cpu_x86_set_cpl(env, 3); 3619 3620 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; 3621 env->hflags |= HF_PE_MASK; 3622 if (env->cpuid_features & CPUID_SSE) { 3623 env->cr[4] |= CR4_OSFXSR_MASK; 3624 env->hflags |= HF_OSFXSR_MASK; 3625 } 3626 #ifndef TARGET_ABI32 3627 /* enable 64 bit mode if possible */ 3628 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) { 3629 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n"); 3630 exit(1); 3631 } 3632 env->cr[4] |= CR4_PAE_MASK; 3633 env->efer |= MSR_EFER_LMA | MSR_EFER_LME; 3634 env->hflags |= HF_LMA_MASK; 3635 #endif 3636 3637 /* flags setup : we activate the IRQs by default as in user mode */ 3638 env->eflags |= IF_MASK; 3639 3640 /* linux register setup */ 3641 #ifndef TARGET_ABI32 3642 env->regs[R_EAX] = regs->rax; 3643 env->regs[R_EBX] = regs->rbx; 3644 env->regs[R_ECX] = regs->rcx; 3645 env->regs[R_EDX] = regs->rdx; 3646 env->regs[R_ESI] = regs->rsi; 3647 env->regs[R_EDI] = regs->rdi; 3648 env->regs[R_EBP] = regs->rbp; 3649 env->regs[R_ESP] = regs->rsp; 3650 env->eip = regs->rip; 3651 #else 3652 env->regs[R_EAX] = regs->eax; 3653 env->regs[R_EBX] = regs->ebx; 3654 env->regs[R_ECX] = regs->ecx; 3655 env->regs[R_EDX] = regs->edx; 3656 env->regs[R_ESI] = regs->esi; 3657 env->regs[R_EDI] = regs->edi; 3658 env->regs[R_EBP] = regs->ebp; 3659 env->regs[R_ESP] = regs->esp; 3660 env->eip = regs->eip; 3661 #endif 3662 3663 /* linux interrupt setup */ 3664 #ifndef TARGET_ABI32 3665 env->idt.limit = 511; 3666 #else 3667 env->idt.limit = 255; 3668 #endif 3669 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), 3670 PROT_READ|PROT_WRITE, 3671 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); 3672 idt_table = g2h(env->idt.base); 3673 set_idt(0, 0); 3674 set_idt(1, 0); 3675 set_idt(2, 0); 3676 set_idt(3, 3); 3677 set_idt(4, 3); 3678 set_idt(5, 0); 3679 set_idt(6, 0); 3680 set_idt(7, 0); 3681 set_idt(8, 0); 3682 set_idt(9, 0); 3683 set_idt(10, 0); 3684 set_idt(11, 0); 3685 set_idt(12, 0); 3686 set_idt(13, 0); 3687 set_idt(14, 0); 3688 set_idt(15, 0); 3689 set_idt(16, 0); 3690 set_idt(17, 0); 3691 set_idt(18, 0); 3692 set_idt(19, 0); 3693 set_idt(0x80, 3); 3694 3695 /* linux segment setup */ 3696 { 3697 uint64_t *gdt_table; 3698 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES, 3699 PROT_READ|PROT_WRITE, 3700 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); 3701 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1; 3702 gdt_table = g2h(env->gdt.base); 3703 #ifdef TARGET_ABI32 3704 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, 3705 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 3706 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); 3707 #else 3708 /* 64 bit code segment */ 3709 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, 3710 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 3711 DESC_L_MASK | 3712 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); 3713 #endif 3714 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, 3715 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 3716 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); 3717 } 3718 cpu_x86_load_seg(env, R_CS, __USER_CS); 3719 cpu_x86_load_seg(env, R_SS, __USER_DS); 3720 #ifdef TARGET_ABI32 3721 cpu_x86_load_seg(env, R_DS, __USER_DS); 3722 cpu_x86_load_seg(env, R_ES, __USER_DS); 3723 cpu_x86_load_seg(env, R_FS, __USER_DS); 3724 cpu_x86_load_seg(env, R_GS, __USER_DS); 3725 /* This hack makes Wine work... */ 3726 env->segs[R_FS].selector = 0; 3727 #else 3728 cpu_x86_load_seg(env, R_DS, 0); 3729 cpu_x86_load_seg(env, R_ES, 0); 3730 cpu_x86_load_seg(env, R_FS, 0); 3731 cpu_x86_load_seg(env, R_GS, 0); 3732 #endif 3733 #elif defined(TARGET_ARM) 3734 { 3735 int i; 3736 cpsr_write(env, regs->uregs[16], 0xffffffff); 3737 for(i = 0; i < 16; i++) { 3738 env->regs[i] = regs->uregs[i]; 3739 } 3740 /* Enable BE8. */ 3741 if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4 3742 && (info->elf_flags & EF_ARM_BE8)) { 3743 env->bswap_code = 1; 3744 } 3745 } 3746 #elif defined(TARGET_UNICORE32) 3747 { 3748 int i; 3749 cpu_asr_write(env, regs->uregs[32], 0xffffffff); 3750 for (i = 0; i < 32; i++) { 3751 env->regs[i] = regs->uregs[i]; 3752 } 3753 } 3754 #elif defined(TARGET_SPARC) 3755 { 3756 int i; 3757 env->pc = regs->pc; 3758 env->npc = regs->npc; 3759 env->y = regs->y; 3760 for(i = 0; i < 8; i++) 3761 env->gregs[i] = regs->u_regs[i]; 3762 for(i = 0; i < 8; i++) 3763 env->regwptr[i] = regs->u_regs[i + 8]; 3764 } 3765 #elif defined(TARGET_PPC) 3766 { 3767 int i; 3768 3769 #if defined(TARGET_PPC64) 3770 #if defined(TARGET_ABI32) 3771 env->msr &= ~((target_ulong)1 << MSR_SF); 3772 #else 3773 env->msr |= (target_ulong)1 << MSR_SF; 3774 #endif 3775 #endif 3776 env->nip = regs->nip; 3777 for(i = 0; i < 32; i++) { 3778 env->gpr[i] = regs->gpr[i]; 3779 } 3780 } 3781 #elif defined(TARGET_M68K) 3782 { 3783 env->pc = regs->pc; 3784 env->dregs[0] = regs->d0; 3785 env->dregs[1] = regs->d1; 3786 env->dregs[2] = regs->d2; 3787 env->dregs[3] = regs->d3; 3788 env->dregs[4] = regs->d4; 3789 env->dregs[5] = regs->d5; 3790 env->dregs[6] = regs->d6; 3791 env->dregs[7] = regs->d7; 3792 env->aregs[0] = regs->a0; 3793 env->aregs[1] = regs->a1; 3794 env->aregs[2] = regs->a2; 3795 env->aregs[3] = regs->a3; 3796 env->aregs[4] = regs->a4; 3797 env->aregs[5] = regs->a5; 3798 env->aregs[6] = regs->a6; 3799 env->aregs[7] = regs->usp; 3800 env->sr = regs->sr; 3801 ts->sim_syscalls = 1; 3802 } 3803 #elif defined(TARGET_MICROBLAZE) 3804 { 3805 env->regs[0] = regs->r0; 3806 env->regs[1] = regs->r1; 3807 env->regs[2] = regs->r2; 3808 env->regs[3] = regs->r3; 3809 env->regs[4] = regs->r4; 3810 env->regs[5] = regs->r5; 3811 env->regs[6] = regs->r6; 3812 env->regs[7] = regs->r7; 3813 env->regs[8] = regs->r8; 3814 env->regs[9] = regs->r9; 3815 env->regs[10] = regs->r10; 3816 env->regs[11] = regs->r11; 3817 env->regs[12] = regs->r12; 3818 env->regs[13] = regs->r13; 3819 env->regs[14] = regs->r14; 3820 env->regs[15] = regs->r15; 3821 env->regs[16] = regs->r16; 3822 env->regs[17] = regs->r17; 3823 env->regs[18] = regs->r18; 3824 env->regs[19] = regs->r19; 3825 env->regs[20] = regs->r20; 3826 env->regs[21] = regs->r21; 3827 env->regs[22] = regs->r22; 3828 env->regs[23] = regs->r23; 3829 env->regs[24] = regs->r24; 3830 env->regs[25] = regs->r25; 3831 env->regs[26] = regs->r26; 3832 env->regs[27] = regs->r27; 3833 env->regs[28] = regs->r28; 3834 env->regs[29] = regs->r29; 3835 env->regs[30] = regs->r30; 3836 env->regs[31] = regs->r31; 3837 env->sregs[SR_PC] = regs->pc; 3838 } 3839 #elif defined(TARGET_MIPS) 3840 { 3841 int i; 3842 3843 for(i = 0; i < 32; i++) { 3844 env->active_tc.gpr[i] = regs->regs[i]; 3845 } 3846 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1; 3847 if (regs->cp0_epc & 1) { 3848 env->hflags |= MIPS_HFLAG_M16; 3849 } 3850 } 3851 #elif defined(TARGET_OPENRISC) 3852 { 3853 int i; 3854 3855 for (i = 0; i < 32; i++) { 3856 env->gpr[i] = regs->gpr[i]; 3857 } 3858 3859 env->sr = regs->sr; 3860 env->pc = regs->pc; 3861 } 3862 #elif defined(TARGET_SH4) 3863 { 3864 int i; 3865 3866 for(i = 0; i < 16; i++) { 3867 env->gregs[i] = regs->regs[i]; 3868 } 3869 env->pc = regs->pc; 3870 } 3871 #elif defined(TARGET_ALPHA) 3872 { 3873 int i; 3874 3875 for(i = 0; i < 28; i++) { 3876 env->ir[i] = ((abi_ulong *)regs)[i]; 3877 } 3878 env->ir[IR_SP] = regs->usp; 3879 env->pc = regs->pc; 3880 } 3881 #elif defined(TARGET_CRIS) 3882 { 3883 env->regs[0] = regs->r0; 3884 env->regs[1] = regs->r1; 3885 env->regs[2] = regs->r2; 3886 env->regs[3] = regs->r3; 3887 env->regs[4] = regs->r4; 3888 env->regs[5] = regs->r5; 3889 env->regs[6] = regs->r6; 3890 env->regs[7] = regs->r7; 3891 env->regs[8] = regs->r8; 3892 env->regs[9] = regs->r9; 3893 env->regs[10] = regs->r10; 3894 env->regs[11] = regs->r11; 3895 env->regs[12] = regs->r12; 3896 env->regs[13] = regs->r13; 3897 env->regs[14] = info->start_stack; 3898 env->regs[15] = regs->acr; 3899 env->pc = regs->erp; 3900 } 3901 #elif defined(TARGET_S390X) 3902 { 3903 int i; 3904 for (i = 0; i < 16; i++) { 3905 env->regs[i] = regs->gprs[i]; 3906 } 3907 env->psw.mask = regs->psw.mask; 3908 env->psw.addr = regs->psw.addr; 3909 } 3910 #else 3911 #error unsupported target CPU 3912 #endif 3913 3914 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32) 3915 ts->stack_base = info->start_stack; 3916 ts->heap_base = info->brk; 3917 /* This will be filled in on the first SYS_HEAPINFO call. */ 3918 ts->heap_limit = 0; 3919 #endif 3920 3921 if (gdbstub_port) { 3922 if (gdbserver_start(gdbstub_port) < 0) { 3923 fprintf(stderr, "qemu: could not open gdbserver on port %d\n", 3924 gdbstub_port); 3925 exit(1); 3926 } 3927 gdb_handlesig(env, 0); 3928 } 3929 cpu_loop(env); 3930 /* never exits */ 3931 return 0; 3932 } 3933