xref: /qemu/linux-user/include/host/loongarch64/host-signal.h (revision c8c89a6a30be0e6f24e6a56d4ef181ec0e4dd064)
1 /*
2  * host-signal.h: signal info dependent on the host architecture
3  *
4  * Copyright (c) 2003-2005 Fabrice Bellard
5  * Copyright (c) 2021 WANG Xuerui <git@xen0n.name>
6  *
7  * This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
8  * See the COPYING file in the top-level directory.
9  */
10 
11 #ifndef LOONGARCH64_HOST_SIGNAL_H
12 #define LOONGARCH64_HOST_SIGNAL_H
13 
14 static inline uintptr_t host_signal_pc(ucontext_t *uc)
15 {
16     return uc->uc_mcontext.__pc;
17 }
18 
19 static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
20 {
21     uc->uc_mcontext.__pc = pc;
22 }
23 
24 static inline void *host_signal_mask(ucontext_t *uc)
25 {
26     return &uc->uc_sigmask;
27 }
28 
29 static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
30 {
31     const uint32_t *pinsn = (const uint32_t *)host_signal_pc(uc);
32     uint32_t insn = pinsn[0];
33 
34     /* Detect store by reading the instruction at the program counter.  */
35     switch ((insn >> 26) & 0b111111) {
36     case 0b001000: /* {ll,sc}.[wd] */
37         switch ((insn >> 24) & 0b11) {
38         case 0b01: /* sc.w */
39         case 0b11: /* sc.d */
40             return true;
41         }
42         break;
43     case 0b001001: /* {ld,st}ox4.[wd] ({ld,st}ptr.[wd]) */
44         switch ((insn >> 24) & 0b11) {
45         case 0b01: /* stox4.w (stptr.w) */
46         case 0b11: /* stox4.d (stptr.d) */
47             return true;
48         }
49         break;
50     case 0b001010: /* {ld,st}.* family */
51         switch ((insn >> 22) & 0b1111) {
52         case 0b0100: /* st.b */
53         case 0b0101: /* st.h */
54         case 0b0110: /* st.w */
55         case 0b0111: /* st.d */
56         case 0b1101: /* fst.s */
57         case 0b1111: /* fst.d */
58             return true;
59         }
60         break;
61     case 0b001110: /* indexed, atomic, bounds-checking memory operations */
62         switch ((insn >> 15) & 0b11111111111) {
63         case 0b00000100000: /* stx.b */
64         case 0b00000101000: /* stx.h */
65         case 0b00000110000: /* stx.w */
66         case 0b00000111000: /* stx.d */
67         case 0b00001110000: /* fstx.s */
68         case 0b00001111000: /* fstx.d */
69         case 0b00011101100: /* fstgt.s */
70         case 0b00011101101: /* fstgt.d */
71         case 0b00011101110: /* fstle.s */
72         case 0b00011101111: /* fstle.d */
73         case 0b00011111000: /* stgt.b */
74         case 0b00011111001: /* stgt.h */
75         case 0b00011111010: /* stgt.w */
76         case 0b00011111011: /* stgt.d */
77         case 0b00011111100: /* stle.b */
78         case 0b00011111101: /* stle.h */
79         case 0b00011111110: /* stle.w */
80         case 0b00011111111: /* stle.d */
81         case 0b00011000000 ... 0b00011100011: /* am* insns */
82             return true;
83         }
84         break;
85     }
86 
87     return false;
88 }
89 
90 #endif
91