xref: /qemu/linux-user/arm/target_syscall.h (revision ee8e76141b4dd00f8e97fda274876a17f9a46bbe)
13622634bSMarkus Armbruster #ifndef ARM_TARGET_SYSCALL_H
23622634bSMarkus Armbruster #define ARM_TARGET_SYSCALL_H
32c0262afSbellard 
42c0262afSbellard /* this struct defines the way the registers are stored on the
52c0262afSbellard    stack during a system call. */
62c0262afSbellard 
7167e4cdcSPeter Maydell /* uregs[0..15] are r0 to r15; uregs[16] is CPSR; uregs[17] is ORIG_r0 */
82c0262afSbellard struct target_pt_regs {
9992f48a0Sblueswir1     abi_long uregs[18];
102c0262afSbellard };
112c0262afSbellard 
122c0262afSbellard #define ARM_SYSCALL_BASE	0x900000
13192c7bd9Sbellard #define ARM_THUMB_SYSCALL	0
146f1f31c0Sbellard 
15fbb4a2e3Spbrook #define ARM_NR_BASE	  0xf0000
16d5355087SHunter Laux #define ARM_NR_breakpoint (ARM_NR_BASE + 1)
17fbb4a2e3Spbrook #define ARM_NR_cacheflush (ARM_NR_BASE + 2)
18fbb4a2e3Spbrook #define ARM_NR_set_tls	  (ARM_NR_BASE + 5)
19cf720db3Sbellard 
20a4f81979Sbellard #define ARM_NR_semihosting	  0x123456
21a4f81979Sbellard #define ARM_NR_thumb_semihosting  0xAB
22a4f81979Sbellard 
23cf720db3Sbellard #if defined(TARGET_WORDS_BIGENDIAN)
2499c475abSbellard #define UNAME_MACHINE "armv5teb"
25cf720db3Sbellard #else
2699c475abSbellard #define UNAME_MACHINE "armv5tel"
27cf720db3Sbellard #endif
28cbc14e6fSRiku Voipio #define UNAME_MINIMUM_RELEASE "2.6.32"
294ce6243dSPeter Maydell 
304ce6243dSPeter Maydell #define TARGET_CLONE_BACKWARDS
310903c8beSTom Musta 
320903c8beSTom Musta #define TARGET_MINSIGSTKSZ 2048
336f6a4032STom Musta #define TARGET_MLOCKALL_MCL_CURRENT 1
346f6a4032STom Musta #define TARGET_MLOCKALL_MCL_FUTURE  2
35460c579fSLluís Vilanova 
36*ee8e7614SPeter Maydell #define TARGET_FORCE_SHMLBA
37*ee8e7614SPeter Maydell 
38*ee8e7614SPeter Maydell static inline abi_ulong target_shmlba(CPUARMState *env)
39*ee8e7614SPeter Maydell {
40*ee8e7614SPeter Maydell     return 4 * 4096;
41*ee8e7614SPeter Maydell }
42*ee8e7614SPeter Maydell 
433622634bSMarkus Armbruster #endif /* ARM_TARGET_SYSCALL_H */
44